Add Genesys Logic GL975x support

From: Ben Chuang <[email protected]>

The patches modify internal clock setup to match SD Host Controller Simplified Specifications 4.20 and support Genesys Logic GL9750/GL9755 chipsets.

v9:
- refine gli_set_9750_rx_inv()
- modify comments in sdhci_gli_voltage_switch()

v8:
refine codes in sdhci-gli-pci.c
- remove duplicate assignment
- remove redundant delay
- use '!!'(not not) logical operator to refine the true/false condition
- check end condition after outter loop
- add comments for delay 5ms in sdhci_gli_voltage_switch()
- merge two logical conditions to one line

v7:
- remove condition define CONFIG_MMC_SDHCI_IO_ACCESSORS from sdhci-pci-gli.c
- making the accessors(MMC_SDHCI_IO_ACCESSORS) always available when selecting MMC_SDHCI_PCI in Kconfig

V6:
- export sdhci_abot_tuning() function symbol
- use C-style comments
- use BIT, FIELD_{GET,PREP} and GENMASK to define bit fields of register
- use host->ops->platform_execute_tuning instead of mmc->ops->execute_tuning
- call sdhci_reset() instead of duplicating the code in sdhci_gl9750_reset
- remove .hw_reset
- use condition define CONFIG_MMC_SDHCI_IO_ACCESSORS for read_l

V5:
- add "change timeout of loop .." to a patch
- fix typo "verndor" to "vendor"

V4:
- change name from sdhci_gli_reset to sdhci_gl9750_reset
- fix sdhci_reset to sdhci_gl9750_reset in sdhci_gl9750_ops
- fix sdhci_gli_reset to sdhci_reset in sdhci_gl9755_ops

V3:
- change usleep_range to udelay
- add Genesys Logic PCI Vendor ID to a patch
- separate the Genesys Logic specific part to a patch

V2:
- change udelay to usleep_range

Ben Chuang (5):
mmc: sdhci: Change timeout of loop for checking internal clock stable
mmc: sdhci: Add PLL Enable support to internal clock setup
PCI: Add Genesys Logic, Inc. Vendor ID
mmc: sdhci: Export sdhci_abort_tuning function symbol
mmc: host: sdhci-pci: Add Genesys Logic GL975x support

 drivers/mmc/host/Kconfig          |   1 +
 drivers/mmc/host/Makefile         |   2 +-
 drivers/mmc/host/sdhci-pci-core.c |   2 +
 drivers/mmc/host/sdhci-pci-gli.c  | 353 ++++++++++++++++++++++++++++++
 drivers/mmc/host/sdhci-pci.h      |   5 +
 drivers/mmc/host/sdhci.c          |  30 ++-
 drivers/mmc/host/sdhci.h          |   2 +
 include/linux/pci_ids.h           |   2 +
 8 files changed, 393 insertions(+), 4 deletions(-)
 create mode 100644 drivers/mmc/host/sdhci-pci-gli.c

2.23.0

From: Ben Chuang <[email protected]>

According to section 3.2.1 internal clock setup in SD Host Controller Simplified Specifications 4.20, the timeout of loop for checking internal clock stable is defined as 150ms.

---
 drivers/mmc/host/sdhci.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

index 59acf8e3331e..bed0760a6c2a 100644
@@ -1636,8 +1636,8 @@ void sdhci_enable_clk(struct sdhci_host *host, u16 clk)
 	clk |= SDHCI_CLOCK_INT_EN;
 	sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
 
-	/* Wait max 20 ms */
-	timeout = ktime_add_ms(ktime_get(), 20);
+	/* Wait max 150 ms */
+	timeout = ktime_add_ms(ktime_get(), 150);
 	while (1) {
 		bool timedout = ktime_after(ktime_get(), timeout);
 

2.23.0

From: Ben Chuang <[email protected]>

The GL9750 and GL9755 chipsets, and possibly others, require PLL Enable setup as part of the internal clock setup as described in 3.2.1 Internal Clock Setup Sequence of SD Host Controller Simplified Specification Version 4.20.

---
 drivers/mmc/host/sdhci.c | 23 +++++++++++++++++++++++
 drivers/mmc/host/sdhci.h |  1 +
 2 files changed, 24 insertions(+)

index bed0760a6c2a..9106ebc7a422 100644
@@ -1653,6 +1653,29 @@ void sdhci_enable_clk(struct sdhci_host *host, u16 clk)
 		udelay(10);
 	}
 
+	if (host->version >= SDHCI_SPEC_410 && host->v4_mode) {
+		clk |= SDHCI_CLOCK_PLL_EN;
+		clk &= ~SDHCI_CLOCK_INT_STABLE;
+		sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
+
+		/* Wait max 150 ms */
+		timeout = ktime_add_ms(ktime_get(), 150);
+		while (1) {
+			bool timedout = ktime_after(ktime_get(), timeout);
+
+			clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
+			if (clk & SDHCI_CLOCK_INT_STABLE)
+				break;
+			if (timedout) {
+				pr_err("%s: PLL clock never stabilised.\n",
+				       mmc_hostname(host->mmc));
+				sdhci_dumpregs(host);
+				return;
+			}
+			udelay(10);
+		}
+	}
+
 	clk |= SDHCI_CLOCK_CARD_EN;
 	sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
 }

index 199712e7adbb..72601a4d2e95 100644
@@ -114,6 +114,7 @@
 #define  SDHCI_DIV_HI_MASK	0x300
 #define  SDHCI_PROG_CLOCK_MODE	0x0020
 #define  SDHCI_CLOCK_CARD_EN	0x0004
+#define  SDHCI_CLOCK_PLL_EN	0x0008
 #define  SDHCI_CLOCK_INT_STABLE	0x0002
 #define  SDHCI_CLOCK_INT_EN	0x0001
 

2.23.0

From: Ben Chuang <[email protected]>

Add the Genesys Logic, Inc. vendor ID to pci_ids.h.

---
 include/linux/pci_ids.h | 2 ++
 1 file changed, 2 insertions(+)

index 70e86148cb1e..4f7e12772a14 100644
@@ -2403,6 +2403,8 @@
 #define PCI_DEVICE_ID_RDC_R6061		0x6061
 #define PCI_DEVICE_ID_RDC_D1010		0x1010
 
+#define PCI_VENDOR_ID_GLI		0x17a0
+
 #define PCI_VENDOR_ID_LENOVO		0x17aa
 
 #define PCI_VENDOR_ID_QCOM		0x17cb

2.23.0

From: Ben Chuang <[email protected]>

Export sdhci_abort_tuning() function symbols which are used by other SD Host controller driver modules.

---
 drivers/mmc/host/sdhci.c | 3 ++-
 drivers/mmc/host/sdhci.h | 1 +
 2 files changed, 3 insertions(+), 1 deletion(-)

index 9106ebc7a422..0f2f110534db 100644
@@ -2328,7 +2328,7 @@ void sdhci_reset_tuning(struct sdhci_host *host)
 }
 EXPORT_SYMBOL_GPL(sdhci_reset_tuning);
 
-static void sdhci_abort_tuning(struct sdhci_host *host, u32 opcode)
+void sdhci_abort_tuning(struct sdhci_host *host, u32 opcode)
 {
 	sdhci_reset_tuning(host);
 

@@ -2339,6 +2339,7 @@ static void sdhci_abort_tuning(struct sdhci_host *host, u32 opcode)
 
 	mmc_abort_tuning(host->mmc, opcode);
 }
+EXPORT_SYMBOL_GPL(sdhci_abort_tuning);
 
 /*
  * We use sdhci_send_tuning() because mmc_send_tuning() is not a good fit. SDHCI

index 72601a4d2e95..437bab3af195 100644
@@ -797,5 +797,6 @@ void sdhci_start_tuning(struct sdhci_host *host);
 void sdhci_end_tuning(struct sdhci_host *host);
 void sdhci_reset_tuning(struct sdhci_host *host);
 void sdhci_send_tuning(struct sdhci_host *host, u32 opcode);
+void sdhci_abort_tuning(struct sdhci_host *host, u32 opcode);
 
 #endif /* __SDHCI_HW_H */

2.23.0

From: Ben Chuang <[email protected]>

Add support for the GL9750 and GL9755 chipsets.

Enable v4 mode and wait 5ms after set 1.8V signal enable for GL9750/ GL9755. Fix the value of SDHCI_MAX_CURRENT register and use the vendor tuning flow for GL9750.

---
 drivers/mmc/host/Kconfig          |   1 +
 drivers/mmc/host/Makefile         |   2 +-
 drivers/mmc/host/sdhci-pci-core.c |   2 +
 drivers/mmc/host/sdhci-pci-gli.c  | 353 ++++++++++++++++++++++++++++++
 drivers/mmc/host/sdhci-pci.h      |   5 +
 5 files changed, 362 insertions(+), 1 deletion(-)
 create mode 100644 drivers/mmc/host/sdhci-pci-gli.c

index 931770f17087..9fbfff514d6c 100644
@@ -94,6 +94,7 @@ config MMC_SDHCI_PCI
 	depends on MMC_SDHCI && PCI
 	select MMC_CQHCI
 	select IOSF_MBI if X86
+	select MMC_SDHCI_IO_ACCESSORS
 	help
 	  This selects the PCI Secure Digital Host Controller Interface.
 	  Most controllers found today are PCI devices.

index 73578718f119..661445415090 100644
@@ -13,7 +13,7 @@ obj-$(CONFIG_MMC_MXS)		+= mxs-mmc.o
 obj-$(CONFIG_MMC_SDHCI)		+= sdhci.o
 obj-$(CONFIG_MMC_SDHCI_PCI)	+= sdhci-pci.o
 sdhci-pci-y			+= sdhci-pci-core.o sdhci-pci-o2micro.o sdhci-pci-arasan.o \
-				   sdhci-pci-dwc-mshc.o
+				   sdhci-pci-dwc-mshc.o sdhci-pci-gli.o
 obj-$(subst m,y,$(CONFIG_MMC_SDHCI_PCI))	+= sdhci-pci-data.o
 obj-$(CONFIG_MMC_SDHCI_ACPI)	+= sdhci-acpi.o
 obj-$(CONFIG_MMC_SDHCI_PXAV3)	+= sdhci-pxav3.o

index 4154ee11b47d..e5835fbf73bc 100644
@@ -1682,6 +1682,8 @@ static const struct pci_device_id pci_ids[] = {
 	SDHCI_PCI_DEVICE(O2, SEABIRD1, o2),
 	SDHCI_PCI_DEVICE(ARASAN, PHY_EMMC, arasan),
 	SDHCI_PCI_DEVICE(SYNOPSYS, DWC_MSHC, snps),
+	SDHCI_PCI_DEVICE(GLI, 9750, gl9750),
+	SDHCI_PCI_DEVICE(GLI, 9755, gl9755),
 	SDHCI_PCI_DEVICE_CLASS(AMD, SYSTEM_SDHCI, PCI_CLASS_MASK, amd),
 	/* Generic SD host controller */
 	{PCI_DEVICE_CLASS(SYSTEM_SDHCI, PCI_CLASS_MASK)},

index e5dc6e44c7a4..738ba5afcc20 100644
@@ -65,6 +65,9 @@
 
 #define PCI_DEVICE_ID_SYNOPSYS_DWC_MSHC 0xc202
 
+#define PCI_DEVICE_ID_GLI_9755		0x9755
+#define PCI_DEVICE_ID_GLI_9750		0x9750
+
 /*
  * PCI device class and mask
  */

@@ -185,5 +188,7 @@ int sdhci_pci_enable_dma(struct sdhci_host *host);
 extern const struct sdhci_pci_fixes sdhci_arasan;
 extern const struct sdhci_pci_fixes sdhci_snps;
 extern const struct sdhci_pci_fixes sdhci_o2;
+extern const struct sdhci_pci_fixes sdhci_gl9750;
+extern const struct sdhci_pci_fixes sdhci_gl9755;
 
 #endif /* __SDHCI_PCI_H */

2.23.0

I see that the first four patches made it into Linus's kernel yesterday. Is there any chance of this final patch that actually enables the hardware making it into another pull request still intended for 5.4? Waiting on additional acked-by on Ben's work addressing all the review comments?

Thanks.

It is OK by me:

Thank you. Also thanks to other people who have given me their comments. Ben

...

Ulf,

Sorry to be a bother... Is anything remaining for this work to make it into a second PR for 5.4 before the merge window closes?

It would be really convenient for the microsd readers in current-generation thinkpads (for instance) to have hardware support out of the box without having to wait another kernel release cycle, if there's nothing otherwise remaining to change. I confirmed that it currently applies cleanly on top of Linus's kernel.

Thanks

I have applied this for fixes, so it will go in for 5.4, but perhaps I need to defer my PR to after rc1 as I am still on the road.

Kind regards
Uffe