powerpc/bpf: Various fixes
cover powerpc/bpf: Various fixes
This is a backport of the remaining patches from the below series:
https://lore.kernel.org/all/[email protected]/
Kindly apply to the longterm tree for v4.14
Thanks,
Naveen
Naveen N. Rao (3):
powerpc/lib: Add helper to check if offset is within conditional
branch range
powerpc/bpf: Validate branch ranges
powerpc/bpf: Fix BPF_SUB when imm == 0x80000000
arch/powerpc/include/asm/code-patching.h | 1 + arch/powerpc/lib/code-patching.c | 7 ++++- arch/powerpc/net/bpf_jit.h | 33 +++++++++++++-------- arch/powerpc/net/bpf_jit_comp64.c | 37 +++++++++++++++--------- 4 files changed, 52 insertions(+), 26 deletions(-)
base-commit: 0447aa205abe1c0c016b4f7fa9d7c08d920b5c8e
Signature · 1 line
2.33.1
PATCH 1/3 powerpc/lib: Add helper to check if offset is within conditional branch range
upstream commit 4549c3ea3160fa8b3f37dfe2f957657bb265eda9
Add a helper to check if a given offset is within the branch range for a powerpc conditional branch instruction, and update some sites to use the new helper.
--- arch/powerpc/include/asm/code-patching.h | 1 + arch/powerpc/lib/code-patching.c | 7 ++++++- arch/powerpc/net/bpf_jit.h | 7 +------ 3 files changed, 8 insertions(+), 7 deletions(-)
arch/powerpc/include/asm/code-patching.h +1 -0
@@ -25,6 +25,7 @@#define BRANCH_ABSOLUTE 0x2bool is_offset_in_branch_range (long offset); +bool is_offset_in_cond_branch_range (long offset);unsigned int create_branch (const unsigned int *addr,unsigned long target,int flags); unsigned int create_cond_branch(const unsigned int *addr,
arch/powerpc/lib/code-patching.c +6 -1
@@ -244,6 +244,11 @@ bool is_offset_in_branch_range(long offset)return (offset >=-0x2000000 && offset <=0x1fffffc && !(offset &0x3 )); } +bool is_offset_in_cond_branch_range (long offset) +{ +return offset >=-0x8000 && offset <=0x7fff && !(offset &0x3 ); +} +/* * Helper to check if a given instruction is a conditional branch * Derived from the conditional checks in analyse_instr()
@@ -297,7 +302,7 @@ unsigned int create_cond_branch(const unsigned int *addr, offset = offset - (unsigned long )addr;/* Check we can represent the target in the instruction format */ -if (offset <-0x8000 || offset >0x7FFF || offset &0x3 ) +if (!is_offset_in_cond_branch_range (offset))return 0 ;/* Mask out the flags and target, so they don't step on each other. */
arch/powerpc/net/bpf_jit.h +1 -6
@@ -221,11 +221,6 @@#define PPC_FUNC_ADDR (d,i) do { PPC_LI32(d, i); } while(0)#endif -static inline bool is_nearbranch (int offset) -{ -return (offset <32768 ) && (offset >=-32768 ); -} -/* * The fly in the ointment of code size changing from pass to pass is * avoided by padding the short branch case with a NOP. If code size differs
@@ -234,7 +229,7 @@ static inline bool is_nearbranch(int offset)* state. */ #define PPC_BCC (cond, dest) do { \ - if (is_nearbranch((dest) - (ctx->idx * 4))) { \ + if (is_offset_in_cond_branch_range((long)(dest) - (ctx->idx * 4))) { \ PPC_BCC_SHORT(cond, dest); \ PPC_NOP(); \ } else { \
Signature · 1 line
2.33.1
PATCH 2/3 powerpc/bpf: Validate branch ranges
In reply to Naveen N. Raoupstream commit 3832ba4e283d7052b783dab8311df7e3590fed93
Add checks to ensure that we never emit branch instructions with truncated branch offsets.
--- arch/powerpc/net/bpf_jit.h | 26 ++++++++++++++++++++------ arch/powerpc/net/bpf_jit_comp64.c | 10 +++++++--- 2 files changed, 27 insertions(+), 9 deletions(-)
arch/powerpc/net/bpf_jit.h +20 -6
@@ -15,6 +15,7 @@#ifndef __ASSEMBLY__#include <asm/types.h> +#include <asm/code-patching.h> #ifdef PPC64_ELF_ABI_v1#define FUNCTION_DESCR_SIZE 24
@@ -176,13 +177,26 @@#define PPC_NEG (d, a) EMIT(PPC_INST_NEG | ___PPC_RT(d) | ___PPC_RA(a))/* Long jump; (unconditional 'branch') */ -#define PPC_JMP (dest) EMIT(PPC_INST_BRANCH | \ - (((dest) - (ctx->idx * 4)) & 0x03fffffc)) +#define PPC_JMP (dest) \ + do { \ + long offset = (long)(dest) - (ctx->idx * 4); \ + if (!is_offset_in_branch_range(offset)) { \ + pr_err_ratelimited("Branch offset 0x%lx (@%u) out of range\n", offset, ctx->idx); \ + return -ERANGE; \ + } \ + EMIT(PPC_INST_BRANCH | (offset & 0x03fffffc)); \ + } while (0)/* "cond" here covers BO:BI fields. */ -#define PPC_BCC_SHORT (cond, dest) EMIT(PPC_INST_BRANCH_COND | \ - (((cond) & 0x3ff) << 16) | \ - (((dest) - (ctx->idx * 4)) & \ - 0xfffc)) +#define PPC_BCC_SHORT (cond, dest) \ + do { \ + long offset = (long)(dest) - (ctx->idx * 4); \ + if (!is_offset_in_cond_branch_range(offset)) { \ + pr_err_ratelimited("Conditional branch offset 0x%lx (@%u) out of range\n", offset, ctx->idx); \ + return -ERANGE; \ + } \ + EMIT(PPC_INST_BRANCH_COND | (((cond) & 0x3ff) << 16) | (offset & 0xfffc)); \ + } while (0) +/* Sign-extended 32-bit immediate load */ #define PPC_LI32 (d, i) do { \ if ((int)(uintptr_t)(i) >= -32768 && \
arch/powerpc/net/bpf_jit_comp64.c +7 -3
@@ -235,7 +235,7 @@ static void bpf_jit_emit_func_call(u32 *image, struct codegen_context *ctx, u64PPC_BLRL (); } -static void bpf_jit_emit_tail_call (u32 *image,struct codegen_context *ctx,u32 out) +static int bpf_jit_emit_tail_call (u32 *image,struct codegen_context *ctx,u32 out) {/* * By now, the eBPF program has already setup parameters in r3, r4 and r5
@@ -296,7 +296,9 @@ static void bpf_jit_emit_tail_call(u32 *image, struct codegen_context *ctx, u32bpf_jit_emit_common_epilogue (image, ctx);PPC_BCTR (); +/* out: */ +return 0 ; }/* Assemble the body code between the prologue & epilogue */
@@ -306,7 +308,7 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, {const struct bpf_insn *insn = fp->insnsi;int flen = fp->len; -int i; +int i, ret;/* Start of epilogue code - will only be valid 2nd pass onwards */ u32 exit_addr = addrs[flen];
@@ -956,7 +958,9 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image,*/ case BPF_JMP |BPF_TAIL_CALL : ctx->seen |=SEEN_TAILCALL ; -bpf_jit_emit_tail_call (image, ctx, addrs[i +1 ]); + ret =bpf_jit_emit_tail_call (image, ctx, addrs[i +1 ]); +if (ret <0 ) +return ret;break ;default :
Signature · 1 line
2.33.1
PATCH 3/3 powerpc/bpf: Fix BPF_SUB when imm == 0x80000000
In reply to Naveen N. Raoupstream commit 5855c4c1f415ca3ba1046e77c0b3d3dfc96c9025
We aren't handling subtraction involving an immediate value of 0x80000000 properly. Fix the same.
--- arch/powerpc/net/bpf_jit_comp64.c | 27 +++++++++++++++++---------- 1 file changed, 17 insertions(+), 10 deletions(-)
arch/powerpc/net/bpf_jit_comp64.c +17 -10
@@ -359,18 +359,25 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image,PPC_SUB (dst_reg, dst_reg, src_reg); goto bpf_alu32_trunc;case BPF_ALU |BPF_ADD |BPF_K :/* (u32) dst += (u32) imm */ -case BPF_ALU |BPF_SUB |BPF_K :/* (u32) dst -= (u32) imm */ case BPF_ALU64 |BPF_ADD |BPF_K :/* dst += imm */ +if (!imm) { + goto bpf_alu32_trunc; + }else if (imm >=-32768 && imm <32768 ) { +PPC_ADDI (dst_reg, dst_reg,IMM_L (imm)); + }else { +PPC_LI32 (b2p[TMP_REG_1 ], imm); +PPC_ADD (dst_reg, dst_reg, b2p[TMP_REG_1 ]); + } + goto bpf_alu32_trunc; +case BPF_ALU |BPF_SUB |BPF_K :/* (u32) dst -= (u32) imm */ case BPF_ALU64 |BPF_SUB |BPF_K :/* dst -= imm */ -if (BPF_OP (code) ==BPF_SUB ) - imm = -imm; -if (imm) { -if (imm >=-32768 && imm <32768 ) -PPC_ADDI (dst_reg, dst_reg,IMM_L (imm)); -else { -PPC_LI32 (b2p[TMP_REG_1 ], imm); -PPC_ADD (dst_reg, dst_reg, b2p[TMP_REG_1 ]); - } +if (!imm) { + goto bpf_alu32_trunc; + }else if (imm >-32768 && imm <=32768 ) { +PPC_ADDI (dst_reg, dst_reg,IMM_L (-imm)); + }else { +PPC_LI32 (b2p[TMP_REG_1 ], imm); +PPC_SUB (dst_reg, dst_reg, b2p[TMP_REG_1 ]); } goto bpf_alu32_trunc;case BPF_ALU |BPF_MUL |BPF_X :/* (u32) dst *= (u32) src */
Signature · 1 line
2.33.1