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Add cpuidle driver for Sunplus SP7021

PATCH Superseded Edwin Chiu 4 participants 6 messages Dec 20, 2021 – Dec 28, 2021

Subsystems (2)

v2 of 5 Superseded Latest is v5 →

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Edwin Chiu

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#0 lore raw

v2 cover Add cpuidle driver for Sunplus SP7021

This is a patch series for cpuidle driver for Sunplus SP7021 SoC.

Sunplus SP7021 is an ARM Cortex A7 (4 cores) based SoC. It integrates many peripherals (ex: UART, I2C, SPI, SDIO, eMMC, USB, SD card and etc.) into a single chip. It is designed for industrial control.

Refer to:
https://sunplus-tibbo.atlassian.net/wiki/spaces/doc/overview
https://tibbo.com/store/plus1.html

Edwin Chiu (2):
dt-bingings:arm:sunplus:add sp7021 compatible string to
sunplus,idle-state.yaml
cpuidle:sunplus:create cpuidle driver for sunplus sp7021

 .../bindings/arm/sunplus/sunplus,idle-state.yaml   |  55 +++++++
 MAINTAINERS                                        |   9 ++
 drivers/cpuidle/Kconfig.arm                        |   7 +
 drivers/cpuidle/Makefile                           |   1 +
 drivers/cpuidle/cpuidle-sunplus.c                  | 180 +++++++++++++++++++++
 include/linux/platform_data/cpuidle-sunplus.h      |  13 ++
 6 files changed, 265 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/sunplus/sunplus,idle-state.yaml
 create mode 100644 drivers/cpuidle/cpuidle-sunplus.c
 create mode 100644 include/linux/platform_data/cpuidle-sunplus.h
Signature · 1 line
2.7.4
author
#1 lore raw

PATCH v2 1/2 dt-bingings:arm:sunplus:add sp7021 compatible string to sunplus,idle-state.yaml

Add the compatible string for cpuidle state on sp7021

---
Changes in v2
- Align email address of sob and sender

 .../bindings/arm/sunplus/sunplus,idle-state.yaml   | 55 ++++++++++++++++++++++
 MAINTAINERS                                        |  5 ++
 2 files changed, 60 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/sunplus/sunplus,idle-state.yaml
Documentation/devicetree/bindings/arm/sunplus/sunplus,idle-state.yaml new file +55 -0
new file mode 100644
index 0000000..649e953
@@ -0,0 +1,55 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) Sunplus Co., Ltd. 2021
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/sunplus/sunplus,idle-state.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Sunplus cpuidle state
+
+maintainers:
+  - edwin.chiu <[email protected]>
+
+description: |
+  Sunplus SOC cpuidle state
+
+properties:
+  compatible:
+    const: arm,idle-state
+
+  entry-latency-us:
+    description:
+      Worst case latency in microseconds required to enter the idle state.
+
+  exit-latency-us:
+    description:
+      Worst case latency in microseconds required to exit the idle state.
+      The exit-latency-us duration may be guaranteed only after
+      entry-latency-us has passed.
+
+  min-residency-us:
+    description:
+      Minimum residency duration in microseconds, inclusive of preparation
+      and entry, for this idle state to be considered worthwhile energy wise
+      (refer to section 2 of this document for a complete description).
+
+required:
+  - compatible
+  - entry-latency-us
+  - exit-latency-us
+  - min-residency-us
+
+additionalProperties: true
+
+examples:
+  - |
+    idle-states {
+      CLUSTER_SLEEP_BIG: cluster-sleep-big {
+        compatible = "arm,idle-state";
+        entry-latency-us = <8000>;
+        exit-latency-us = <700>;
+        min-residency-us = <9000>;
+      };
+    };
+
+...
MAINTAINERS +5 -0
index 3b79fd4..41957c7 100644
@@ -17945,6 +17945,11 @@ L:	[email protected]
 S:	Maintained
 F:	drivers/net/ethernet/dlink/sundance.c
 
+SUNPLUS CPUIDLE DRIVER
+M:	Edwin Chiu <[email protected]>
+S:	Maintained
+F:	Documentation/devicetree/bindings/arm/sunplus/sunplus,idle-state.yaml
+
 SUPERH
 M:	Yoshinori Sato <[email protected]>
 M:	Rich Felker <[email protected]>
Signature · 1 line
2.7.4
author
#2 lore raw

PATCH v2 2/2 cpuidle:sunplus:create cpuidle driver for sunplus sp7021

In reply to Edwin Chiu

Create cpuidle driver for sunplus sp7021 chip

---
Changes in v2
- Rearrangement #include sequence
- Change // to /*~*/
- Align author email address to same as sob

 MAINTAINERS                                   |   4 +
 drivers/cpuidle/Kconfig.arm                   |   7 +
 drivers/cpuidle/Makefile                      |   1 +
 drivers/cpuidle/cpuidle-sunplus.c             | 180 ++++++++++++++++++++++++++
 include/linux/platform_data/cpuidle-sunplus.h |  13 ++
 5 files changed, 205 insertions(+)
 create mode 100644 drivers/cpuidle/cpuidle-sunplus.c
 create mode 100644 include/linux/platform_data/cpuidle-sunplus.h
MAINTAINERS +4 -0
index 41957c7..c5eab79 100644
@@ -17949,6 +17949,10 @@ SUNPLUS CPUIDLE DRIVER
 M:	Edwin Chiu <[email protected]>
 S:	Maintained
 F:	Documentation/devicetree/bindings/arm/sunplus/sunplus,idle-state.yaml
+F:	drivers/cpuidle/Kconfig.arm
+F:	drivers/cpuidle/Makefile
+F:	drivers/cpuidle/cpuidle-sunplus.c
+F:	include/linux/platform_data/cpuidle-sunplus.h
 
 SUPERH
 M:	Yoshinori Sato <[email protected]>
drivers/cpuidle/Kconfig.arm +7 -0
index 334f83e..ad9956c 100644
@@ -117,3 +117,10 @@ config ARM_QCOM_SPM_CPUIDLE
 	  The Subsystem Power Manager (SPM) controls low power modes for the
 	  CPU and L2 cores. It interface with various system drivers to put
 	  the cores in low power modes.
+
+config ARM_SUNPLUS_CPUIDLE
+	bool "CPU Idle Driver For SUNPLUS SoCs"
+	depends on !ARM64
+	select DT_IDLE_STATES
+	help
+	  Select this to enable cpuidle on SP7021 processors.
drivers/cpuidle/Makefile +1 -0
index 26bbc5e..0a020d1 100644
@@ -25,6 +25,7 @@ obj-$(CONFIG_ARM_PSCI_CPUIDLE)		+= cpuidle-psci.o
 obj-$(CONFIG_ARM_PSCI_CPUIDLE_DOMAIN)	+= cpuidle-psci-domain.o
 obj-$(CONFIG_ARM_TEGRA_CPUIDLE)		+= cpuidle-tegra.o
 obj-$(CONFIG_ARM_QCOM_SPM_CPUIDLE)	+= cpuidle-qcom-spm.o
+obj-$(CONFIG_ARM_SUNPLUS_CPUIDLE)		+= cpuidle-sunplus.o
 
 ###############################################################################
 # MIPS drivers
drivers/cpuidle/cpuidle-sunplus.c new file +180 -0

180 lines not on this page · raw message

include/linux/platform_data/cpuidle-sunplus.h new file +13 -0
new file mode 100644
index 0000000..d63efad
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __CPUIDLE_SP7021_H
+#define __CPUIDLE_SP7021_H
+
+extern int cpu_v7_do_idle(void);
+
+#endif
Signature · 1 line
2.7.4
#3 lore raw

Re: [PATCH v2 2/2] cpuidle:sunplus:create cpuidle driver for sunplus sp7021

Quoted 2 lines · Edwin Chiu

Create cpuidle driver for sunplus sp7021 chip

Based on the driver here, I couldn't understand why you can't make use of existing cpuidle-arm.c driver

Signature · 2 lines
Regards,
Sudeep
#4 lore raw

RE: [PATCH v2 2/2] cpuidle:sunplus:create cpuidle driver for sunplus sp7021

Hi Sudeep and Daniel:

Thanks your response.
My CPU is arm CA7 that is 32bits cpu.
If I directly used cpuidle-arm.c function with enable "Generic ARM/ARM64 CPU idle Driver", the cpuidle driver mount fail with "unsupported enable-method property".

This is due to linux kernel no invoke CPUIDLE_METHOD_OF_DECLARE for arm 32bits cpu. There have no define cpuidle_ops.init and cpuidle_ops.suspend function for arm 32bits cpu too.

So I create cpuidle-sunplus.c to execute my cpuidle function. Please correct me if I got mistake.

邱垂峰 EdwinChiu
智能運算專案
T: +886-3-5786005 ext.2590
[email protected]
300 新竹科學園區創新一路19號

Quoted 18 lines

-----Original Message-----
From: Sudeep Holla <[email protected]>
Sent: Monday, December 20, 2021 8:11 PM
To: Edwin Chiu <[email protected]>
Cc: [email protected]; Edwin Chiu 邱垂峰 <[email protected]>; [email protected]; [email protected]; [email protected]; Sudeep Holla <[email protected]>; [email protected]; [email protected]
Subject: Re: [PATCH v2 2/2] cpuidle:sunplus:create cpuidle driver for sunplus sp7021

Quoted 2 lines · Edwin Chiu

Create cpuidle driver for sunplus sp7021 chip

Based on the driver here, I couldn't understand why you can't make use of existing cpuidle-arm.c driver

--
Regards,
Sudeep

#5 lore raw
In reply to Edwin Chiu

Hi Edwin,

sorry but I don't get the series. The bindings and the generic cpuidle should already take into account the idle path.

Did I miss something ?

Quoted 26 lines · Edwin Chiu

This is a patch series for cpuidle driver for Sunplus SP7021 SoC.

Sunplus SP7021 is an ARM Cortex A7 (4 cores) based SoC. It integrates many peripherals (ex: UART, I2C, SPI, SDIO, eMMC, USB, SD card and etc.) into a single chip. It is designed for industrial control.

Refer to:
https://sunplus-tibbo.atlassian.net/wiki/spaces/doc/overview
https://tibbo.com/store/plus1.html

Edwin Chiu (2):
dt-bingings:arm:sunplus:add sp7021 compatible string to
sunplus,idle-state.yaml
cpuidle:sunplus:create cpuidle driver for sunplus sp7021

 .../bindings/arm/sunplus/sunplus,idle-state.yaml   |  55 +++++++
 MAINTAINERS                                        |   9 ++
 drivers/cpuidle/Kconfig.arm                        |   7 +
 drivers/cpuidle/Makefile                           |   1 +
 drivers/cpuidle/cpuidle-sunplus.c                  | 180 +++++++++++++++++++++
 include/linux/platform_data/cpuidle-sunplus.h      |  13 ++
 6 files changed, 265 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/sunplus/sunplus,idle-state.yaml
 create mode 100644 drivers/cpuidle/cpuidle-sunplus.c
 create mode 100644 include/linux/platform_data/cpuidle-sunplus.h
Signature · 5 lines
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