AMD Pstate Enhancement And Issue Fixs

PATCH Superseded Perry Yuan 3 participants 25 messages Jul 12, 2022 – Jul 13, 2022

Subsystems (8)

x86 ACPI Driver core CPU frequency scaling framework +4 more subsystems

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Perry Yuan

author reviewer

2022-07-12 15:33 UTC #0 lore raw

v3 cover AMD Pstate Enhancement And Issue Fixs

This patchsets adds support for precision boost hardware control for AMD processors.

Meanwhile the patchset fixs lowest perf query and desired perf scope issues. Update transition delay and latency default value to meet SMU firmware requirement. and do some code cleanups,
It also exports cpufreq cpu release and acquire for coming amd-pstate epp mode driver

The patch series are tested on the AMD mobile and EYPC server systems

v2->v3:
- drop cpufreq cpu release and acquire export patch
- remove the clamp_t in the amd_pstate_adjust_perf()

v1->v2:
- add two new patches to remove the acpi_disabled check
- fix some typos in the commit info
- move the clamp_t() into amd_pstate_update() function
- rebased to 5.19-rc5

[1]:https://patchwork.kernel.org/project/linux-pm/list/?series=657510 [2]:https://lore.kernel.org/lkml/[email protected]/

Perry Yuan (13):
x86/msr: Add the MSR definition for AMD CPPC hardware control.
cpufreq: amd-pstate: enable AMD Precision Boost mode switch
cpufreq: amd-pstate: cleanup the unused and duplicated headers
declaration
cpufreq: amd-pstate: prefetch cppc_req_cached value in
amd_pstate_cpu_init()
cpufreq: amd-pstate: simplify cpudata pointer assignment
cpufreq: amd_pstate: fix wrong lowest perf fetch
cpufreq: amd_pstate: map desired perf into pstate scope for powersave
governor
cpufreq: amd-pstate: fix white-space
cpufreq: amd-pstate: update pstate frequency transition delay time
cpufreq: amd-pstate: add ACPI disabled check in acpi_cpc_valid()
cpufreq: amd_pstate: update transition delay time to 1ms
arch_topology: remove the acpi_disabled check
cpufreq: CPPC: remove the acpi_disabled check

 arch/x86/include/asm/msr-index.h |  3 ++
 drivers/acpi/cppc_acpi.c         |  3 ++
 drivers/base/arch_topology.c     |  2 +-
 drivers/cpufreq/amd-pstate.c     | 59 ++++++++++++++++++--------------
 drivers/cpufreq/cppc_cpufreq.c   |  2 +-
 5 files changed, 42 insertions(+), 27 deletions(-)

Signature · 1 line

2.25.1

Perry Yuan

author reviewer

2022-07-12 15:36 UTC #1 lore raw

PATCH v3 1/13 x86/msr: Add the MSR definition for AMD CPPC hardware control.

This MSR can be used for controlling whether the CPU boost state is enabled in the hardware.

AMD Processor Programming Reference (PPR)

Link https://www.amd.com/system/files/TechDocs/40332.pdf [p1095]

Link https://www.amd.com/system/files/TechDocs/56569-A1-PUB.zip [p162]

Signed-off-by Perry Yuan <[email protected]>

---
 arch/x86/include/asm/msr-index.h | 1 +
 1 file changed, 1 insertion(+)

arch/x86/include/asm/msr-index.h +1 -0

index d27e0581b777..869508de8269 100644
@@ -548,6 +548,7 @@
 #define MSR_AMD_CPPC_CAP2		0xc00102b2
 #define MSR_AMD_CPPC_REQ		0xc00102b3
 #define MSR_AMD_CPPC_STATUS		0xc00102b4
+#define MSR_AMD_CPPC_HW_CTL		0xc0010015
 
 #define AMD_CPPC_LOWEST_PERF(x)		(((x) >> 0) & 0xff)
 #define AMD_CPPC_LOWNONLIN_PERF(x)	(((x) >> 8) & 0xff)

Signature · 1 line

2.25.1

Perry Yuan

author reviewer

2022-07-12 15:40 UTC #2 lore raw

PATCH v3 2/13 cpufreq: amd-pstate: enable AMD Precision Boost mode switch

In reply to Perry Yuan

Add support to switch AMD precision boost state to scale cpu max frequency that will help to improve the processor throughput.

when set boost state to be enabled, user will need to execute below commands, the CPU will reach absolute maximum performance level or the highest perf which CPU physical support. This performance level may not be sustainable for long durations, it will help to improve the IO workload tasks.

* turn on CPU boost state under root
echo 1 > /sys/devices/system/cpu/cpufreq/boost

If user set boost off,the CPU can reach to the maximum sustained performance level of the process, that level is the process can maintain continously working and definitely it can save some power compared to boost on mode.

* turn off CPU boost state under root
echo 0 > /sys/devices/system/cpu/cpufreq/boost

Signed-off-by Perry Yuan <[email protected]>

---
 arch/x86/include/asm/msr-index.h |  2 ++
 drivers/cpufreq/amd-pstate.c     | 22 +++++++++++++++++++---
 2 files changed, 21 insertions(+), 3 deletions(-)

arch/x86/include/asm/msr-index.h +2 -0

index 869508de8269..b952fd6d6916 100644
@@ -559,6 +559,8 @@
 #define AMD_CPPC_MIN_PERF(x)		(((x) & 0xff) << 8)
 #define AMD_CPPC_DES_PERF(x)		(((x) & 0xff) << 16)
 #define AMD_CPPC_ENERGY_PERF_PREF(x)	(((x) & 0xff) << 24)
+#define AMD_CPPC_PRECISION_BOOST_BIT	25
+#define AMD_CPPC_PRECISION_BOOST_ENABLED	BIT_ULL(AMD_CPPC_PRECISION_BOOST_BIT)
 
 /* AMD Performance Counter Global Status and Control MSRs */
 #define MSR_AMD64_PERF_CNTR_GLOBAL_STATUS	0xc0000300

drivers/cpufreq/amd-pstate.c +19 -3

index 9ac75c1cde9c..188e055e24a2 100644
@@ -122,6 +122,7 @@ struct amd_cpudata {
 
 	u64 freq;
 	bool	boost_supported;
+	u64 	cppc_hw_conf_cached;
 };
 
 static inline int pstate_enable(bool enable)

@@ -438,18 +439,27 @@ static int amd_pstate_set_boost(struct cpufreq_policy *policy, int state)
 {
 	struct amd_cpudata *cpudata = policy->driver_data;
 	int ret;
+	u64 value;
 
 	if (!cpudata->boost_supported) {
 		pr_err("Boost mode is not supported by this processor or SBIOS\n");
 		return -EINVAL;
 	}
 
-	if (state)
+	ret = rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_HW_CTL, &value);
+	if (ret)
+		return ret;
+
+	if (state) {
+		value |= AMD_CPPC_PRECISION_BOOST_ENABLED;
 		policy->cpuinfo.max_freq = cpudata->max_freq;
-	else
+	} else {
+		value &= ~AMD_CPPC_PRECISION_BOOST_ENABLED;
 		policy->cpuinfo.max_freq = cpudata->nominal_freq;
-
+	}
 	policy->max = policy->cpuinfo.max_freq;
+	WRITE_ONCE(cpudata->cppc_hw_conf_cached, value);
+	wrmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_HW_CTL, value);
 
 	ret = freq_qos_update_request(&cpudata->req[1],
 				      policy->cpuinfo.max_freq);

@@ -478,6 +488,7 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
 	int min_freq, max_freq, nominal_freq, lowest_nonlinear_freq, ret;
 	struct device *dev;
 	struct amd_cpudata *cpudata;
+	u64 value;
 
 	dev = get_cpu_device(policy->cpu);
 	if (!dev)

@@ -542,6 +553,11 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
 
 	policy->driver_data = cpudata;
 
+	ret = rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_HW_CTL, &value);
+	if (ret)
+		return ret;
+	WRITE_ONCE(cpudata->cppc_hw_conf_cached, value);
+
 	amd_pstate_boost_init(cpudata);
 
 	return 0;

Signature · 1 line

2.25.1

Perry Yuan

author reviewer

2022-07-12 15:40 UTC #3 lore raw

PATCH v3 3/13 cpufreq: amd-pstate: cleanup the unused and duplicated headers declaration

In reply to Perry Yuan

Cleanup the headers declaration which are not used actually and some duplicated declaration which is declarated in some other headers already, it will help to simplify the header part.

Signed-off-by Perry Yuan <[email protected]>

---
 drivers/cpufreq/amd-pstate.c | 5 -----
 1 file changed, 5 deletions(-)

drivers/cpufreq/amd-pstate.c +0 -5

index 188e055e24a2..43e6df9f67f6 100644
@@ -31,19 +31,14 @@
 #include <linux/compiler.h>
 #include <linux/dmi.h>
 #include <linux/slab.h>
-#include <linux/acpi.h>
 #include <linux/io.h>
 #include <linux/delay.h>
 #include <linux/uaccess.h>
 #include <linux/static_call.h>
 
-#include <acpi/processor.h>
 #include <acpi/cppc_acpi.h>
 
 #include <asm/msr.h>
-#include <asm/processor.h>
-#include <asm/cpufeature.h>
-#include <asm/cpu_device_id.h>
 #include "amd-pstate-trace.h"
 
 #define AMD_PSTATE_TRANSITION_LATENCY	0x20000

Signature · 1 line

2.25.1

Viresh Kumar

maintainer Acked-by on v3 3/13

2022-07-13 05:27 UTC #4 lore raw

Re: [PATCH v3 03/13] cpufreq: amd-pstate: cleanup the unused and duplicated headers declaration

Quoted 23 lines · Perry Yuan

Cleanup the headers declaration which are not used actually and some duplicated declaration which is declarated in some other headers already, it will help to simplify the header part.
Signed-off-by Perry Yuan <[email protected]>
---
 drivers/cpufreq/amd-pstate.c | 5 -----
 1 file changed, 5 deletions(-)
drivers/cpufreq/amd-pstate.c +0 -1
index 188e055e24a2..43e6df9f67f6 100644
@@ -31,19 +31,14 @@
 #include <linux/compiler.h>
 #include <linux/dmi.h>
 #include <linux/slab.h>
-#include <linux/acpi.h>
 #include <linux/io.h>
 #include <linux/delay.h>
 #include <linux/uaccess.h>
 #include <linux/static_call.h>
 

drivers/cpufreq/amd-pstate.c line 44

Quoted 10 lines

drivers/cpufreq/amd-pstate.c +0 -4

-#include <acpi/processor.h>
 #include <acpi/cppc_acpi.h>
 
 #include <asm/msr.h>
-#include <asm/processor.h>
-#include <asm/cpufeature.h>
-#include <asm/cpu_device_id.h>
 #include "amd-pstate-trace.h"
 
 #define AMD_PSTATE_TRANSITION_LATENCY	0x20000

Acked-by Viresh Kumar <[email protected]>

Signature · 1 line

viresh

Perry Yuan

author reviewer

2022-07-12 15:40 UTC #5 lore raw

PATCH v3 4/13 cpufreq: amd-pstate: prefetch cppc_req_cached value in amd_pstate_cpu_init()

In reply to Perry Yuan

This cppc_req_cached valued should be prefetched during amd_pstate_cpu_init call period, then the amd_pstate_update() will get correct cached value before updating the perf to change the cpu perf level.

Signed-off-by Perry Yuan <[email protected]>

---
 drivers/cpufreq/amd-pstate.c | 15 ++++++++++-----
 1 file changed, 10 insertions(+), 5 deletions(-)

drivers/cpufreq/amd-pstate.c +10 -5

index 43e6df9f67f6..e4904da54541 100644
@@ -547,12 +547,17 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
 	cpudata->lowest_nonlinear_freq = lowest_nonlinear_freq;
 
 	policy->driver_data = cpudata;
+	if (!shared_mem) {
+		ret = rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_HW_CTL, &value);
+		if (ret)
+			return ret;
+		WRITE_ONCE(cpudata->cppc_hw_conf_cached, value);
 
-	ret = rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_HW_CTL, &value);
-	if (ret)
-		return ret;
-	WRITE_ONCE(cpudata->cppc_hw_conf_cached, value);
-
+		ret = rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, &value);
+		if (ret)
+			return ret;
+		WRITE_ONCE(cpudata->cppc_req_cached, value);
+	}
 	amd_pstate_boost_init(cpudata);
 
 	return 0;

Signature · 1 line

2.25.1

Viresh Kumar

maintainer

2022-07-13 05:27 UTC #6 lore raw

Re: [PATCH v3 04/13] cpufreq: amd-pstate: prefetch cppc_req_cached value in amd_pstate_cpu_init()

Quoted 4 lines · Perry Yuan

This cppc_req_cached valued should be prefetched during amd_pstate_cpu_init call period, then the amd_pstate_update() will get correct cached value before updating the perf to change the cpu perf level.

You are doing more than this in the patch, either mention all the stuff with reasoning or split into two patches.

Quoted 10 lines

Signed-off-by Perry Yuan <[email protected]>
---
 drivers/cpufreq/amd-pstate.c | 15 ++++++++++-----
 1 file changed, 10 insertions(+), 5 deletions(-)
drivers/cpufreq/amd-pstate.c +0 -0
index 43e6df9f67f6..e4904da54541 100644

drivers/cpufreq/amd-pstate.c static int amd_pstate_cpu_init(struct cpufreq_policy *policy) · line 550

Quoted 4 lines

drivers/cpufreq/amd-pstate.c +1 -0

@@ -547,12 +547,17 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
 	cpudata->lowest_nonlinear_freq = lowest_nonlinear_freq;
 
 	policy->driver_data = cpudata;
+	if (!shared_mem) {

This is a new change, which the commit log doesn't talk about.

Quoted 20 lines

drivers/cpufreq/amd-pstate.c +9 -5

+		ret = rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_HW_CTL, &value);
+		if (ret)
+			return ret;
+		WRITE_ONCE(cpudata->cppc_hw_conf_cached, value);
 
-	ret = rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_HW_CTL, &value);
-	if (ret)
-		return ret;
-	WRITE_ONCE(cpudata->cppc_hw_conf_cached, value);
-
+		ret = rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, &value);
+		if (ret)
+			return ret;
+		WRITE_ONCE(cpudata->cppc_req_cached, value);
+	}
 	amd_pstate_boost_init(cpudata);
 
 	return 0;

Signature · 1 line

2.25.1

Signature · 1 line

viresh

Yuan, Perry

author reviewer

2022-07-13 05:57 UTC #7 lore raw

RE: [PATCH v3 04/13] cpufreq: amd-pstate: prefetch cppc_req_cached value in amd_pstate_cpu_init()

[AMD Official Use Only - General]

Hi Viresh,

Quoted 18 lines

-----Original Message-----
From: Viresh Kumar <[email protected]>
Sent: Wednesday, July 13, 2022 1:27 PM
To: Yuan, Perry <[email protected]>
Cc: [email protected]; Huang, Ray <[email protected]>; Sharma, Deepak <[email protected]>; Limonciello, Mario <[email protected]>; Fontenot, Nathan <[email protected]>; Deucher, Alexander <[email protected]>; Su, Jinzhou (Joe) <[email protected]>; Huang, Shimmer <[email protected]>; Du, Xiaojian <[email protected]>; Meng, Li (Jassmine) <[email protected]>; linux- [email protected]; [email protected]; Rafael J. Wysocki <[email protected]>
Subject: Re: [PATCH v3 04/13] cpufreq: amd-pstate: prefetch cppc_req_cached value in amd_pstate_cpu_init()
[CAUTION: External Email]

Quoted 8 lines

Quoted 4 lines · Perry Yuan
This cppc_req_cached valued should be prefetched during amd_pstate_cpu_init call period, then the amd_pstate_update() will get correct cached value before updating the perf to change the cpu perf level.
You are doing more than this in the patch, either mention all the stuff with reasoning or split into two patches.

My mistakes, the patch adds the shared_mem check which is added by another patch which is in the coming EPP driver patch set. I will add one more patch to introduce what shared_mem is used for in V4 later.

Thank you!

Perry.

Quoted 43 lines

drivers/cpufreq/amd-pstate.c static int amd_pstate_cpu_init(struct
Quoted 11 lines
Signed-off-by Perry Yuan <[email protected]>
---
 drivers/cpufreq/amd-pstate.c | 15 ++++++++++-----
 1 file changed, 10 insertions(+), 5 deletions(-)
(quoted diff) +0 -0
b/drivers/cpufreq/amd-pstate.c index 43e6df9f67f6..e4904da54541 100644
drivers/cpufreq/amd-pstate.c +0 -0
@@ -547,12 +547,17 @@ static int amd_pstate_cpu_init(struct
cpufreq_policy *policy)
drivers/cpufreq/amd-pstate.c static int amd_pstate_cpu_init(struct cpufreq_policy *policy) · line 550
Quoted 4 lines
drivers/cpufreq/amd-pstate.c +1 -0
      cpudata->lowest_nonlinear_freq = lowest_nonlinear_freq;
 
      policy->driver_data = cpudata;
+     if (!shared_mem) {
This is a new change, which the commit log doesn't talk about.
drivers/cpufreq/amd-pstate.c static int amd_pstate_cpu_init(struct · line 551
Quoted 1 line
drivers/cpufreq/amd-pstate.c +1 -0
+             ret = rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_HW_CTL,
&value);
Quoted 18 lines
drivers/cpufreq/amd-pstate.c +8 -6
+             if (ret)
+                     return ret;
+             WRITE_ONCE(cpudata->cppc_hw_conf_cached, value);
 
-     ret = rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_HW_CTL, &value);
-     if (ret)
-             return ret;
-     WRITE_ONCE(cpudata->cppc_hw_conf_cached, value);
-
+             ret = rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, &value);
+             if (ret)
+                     return ret;
+             WRITE_ONCE(cpudata->cppc_req_cached, value);
+     }
      amd_pstate_boost_init(cpudata);
 
      return 0;
--
Quoted 1 line
2.25.1
--
viresh

Perry Yuan

author reviewer

2022-07-12 15:41 UTC #8 lore raw

PATCH v3 5/13 cpufreq: amd-pstate: simplify cpudata pointer assignment

In reply to Perry Yuan

move the cpudata assignment to cpudata declaration which will simplify the functions.

No functional change intended.

Signed-off-by Perry Yuan <[email protected]>

---
 drivers/cpufreq/amd-pstate.c | 12 +++---------
 1 file changed, 3 insertions(+), 9 deletions(-)

drivers/cpufreq/amd-pstate.c +3 -9

index e4904da54541..fc0de9fd643b 100644
@@ -571,9 +571,7 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
 
 static int amd_pstate_cpu_exit(struct cpufreq_policy *policy)
 {
-	struct amd_cpudata *cpudata;
-
-	cpudata = policy->driver_data;
+	struct amd_cpudata *cpudata = policy->driver_data;
 
 	freq_qos_remove_request(&cpudata->req[1]);
 	freq_qos_remove_request(&cpudata->req[0]);

@@ -615,9 +613,7 @@ static ssize_t show_amd_pstate_max_freq(struct cpufreq_policy *policy,
 					char *buf)
 {
 	int max_freq;
-	struct amd_cpudata *cpudata;
-
-	cpudata = policy->driver_data;
+	struct amd_cpudata *cpudata = policy->driver_data;
 
 	max_freq = amd_get_max_freq(cpudata);
 	if (max_freq < 0)

@@ -630,9 +626,7 @@ static ssize_t show_amd_pstate_lowest_nonlinear_freq(struct cpufreq_policy *poli
 						     char *buf)
 {
 	int freq;
-	struct amd_cpudata *cpudata;
-
-	cpudata = policy->driver_data;
+	struct amd_cpudata *cpudata = policy->driver_data;
 
 	freq = amd_get_lowest_nonlinear_freq(cpudata);
 	if (freq < 0)

Signature · 1 line

2.25.1

Viresh Kumar

maintainer Acked-by on v3 5/13

2022-07-13 05:27 UTC #9 lore raw

Re: [PATCH v3 05/13] cpufreq: amd-pstate: simplify cpudata pointer assignment

Quoted 37 lines · Perry Yuan

move the cpudata assignment to cpudata declaration which will simplify the functions.

No functional change intended.

Signed-off-by Perry Yuan <[email protected]>

---
 drivers/cpufreq/amd-pstate.c | 12 +++---------
 1 file changed, 3 insertions(+), 9 deletions(-)

drivers/cpufreq/amd-pstate.c +2 -6

index e4904da54541..fc0de9fd643b 100644
@@ -571,9 +571,7 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
 
 static int amd_pstate_cpu_exit(struct cpufreq_policy *policy)
 {
-	struct amd_cpudata *cpudata;
-
-	cpudata = policy->driver_data;
+	struct amd_cpudata *cpudata = policy->driver_data;
 
 	freq_qos_remove_request(&cpudata->req[1]);
 	freq_qos_remove_request(&cpudata->req[0]);

@@ -615,9 +613,7 @@ static ssize_t show_amd_pstate_max_freq(struct cpufreq_policy *policy,
 					char *buf)
 {
 	int max_freq;
-	struct amd_cpudata *cpudata;
-
-	cpudata = policy->driver_data;
+	struct amd_cpudata *cpudata = policy->driver_data;
 
 	max_freq = amd_get_max_freq(cpudata);
 	if (max_freq < 0)

drivers/cpufreq/amd-pstate.c static ssize_t show_amd_pstate_lowest_nonlinear_freq(struct cpufreq_policy *poli · line 632

Quoted 10 lines

drivers/cpufreq/amd-pstate.c +1 -3

@@ -630,9 +626,7 @@ static ssize_t show_amd_pstate_lowest_nonlinear_freq(struct cpufreq_policy *poli
 						     char *buf)
 {
 	int freq;
-	struct amd_cpudata *cpudata;
-
-	cpudata = policy->driver_data;
+	struct amd_cpudata *cpudata = policy->driver_data;
 
 	freq = amd_get_lowest_nonlinear_freq(cpudata);
 	if (freq < 0)

Acked-by Viresh Kumar <[email protected]>

Signature · 1 line

viresh

Perry Yuan

author reviewer

2022-07-12 15:41 UTC #10 lore raw

PATCH v3 6/13 cpufreq: amd_pstate: fix wrong lowest perf fetch

In reply to Perry Yuan

Fix the wrong lowest perf value reading which is used for new des_perf calculation by governor requested, the incorrect min_perf will get incorrect des_perf to be set , that will cause the system frequency changing unexpectedly.

Signed-off-by Perry Yuan <[email protected]>

Signed-off-by Su Jinzhou <[email protected]>

---
 drivers/cpufreq/amd-pstate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

drivers/cpufreq/amd-pstate.c +1 -1

index fc0de9fd643b..7c51f4125263 100644
@@ -308,7 +308,7 @@ static int amd_pstate_target(struct cpufreq_policy *policy,
 		return -ENODEV;
 
 	cap_perf = READ_ONCE(cpudata->highest_perf);
-	min_perf = READ_ONCE(cpudata->lowest_nonlinear_perf);
+	min_perf = READ_ONCE(cpudata->lowest_perf);
 	max_perf = cap_perf;
 
 	freqs.old = policy->cur;

Signature · 1 line

2.25.1

Viresh Kumar

maintainer Acked-by on v3 6/13

2022-07-13 05:28 UTC #11 lore raw

Re: [PATCH v3 06/13] cpufreq: amd_pstate: fix wrong lowest perf fetch

Quoted 16 lines · Perry Yuan

Fix the wrong lowest perf value reading which is used for new des_perf calculation by governor requested, the incorrect min_perf will get incorrect des_perf to be set , that will cause the system frequency changing unexpectedly.
Signed-off-by Perry Yuan <[email protected]>
Signed-off-by Su Jinzhou <[email protected]>
---
 drivers/cpufreq/amd-pstate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/cpufreq/amd-pstate.c +0 -0
index fc0de9fd643b..7c51f4125263 100644

drivers/cpufreq/amd-pstate.c static int amd_pstate_target(struct cpufreq_policy *policy, · line 314

Quoted 8 lines

drivers/cpufreq/amd-pstate.c +1 -1

@@ -308,7 +308,7 @@ static int amd_pstate_target(struct cpufreq_policy *policy,
 		return -ENODEV;
 
 	cap_perf = READ_ONCE(cpudata->highest_perf);
-	min_perf = READ_ONCE(cpudata->lowest_nonlinear_perf);
+	min_perf = READ_ONCE(cpudata->lowest_perf);
 	max_perf = cap_perf;
 
 	freqs.old = policy->cur;

Acked-by Viresh Kumar <[email protected]>

Signature · 1 line

viresh

Perry Yuan

author reviewer

2022-07-12 15:41 UTC #12 lore raw

PATCH v3 7/13 cpufreq: amd_pstate: map desired perf into pstate scope for powersave governor

In reply to Perry Yuan

The patch will fix the invalid desired perf value for powersave governor. This issue is found when testing on one AMD EPYC system, the actual des_perf is smaller than the min_perf value, that is invalid value. because the min_perf is the lowest_perf system can support in idle state.

Signed-off-by Perry Yuan <[email protected]>

---
 drivers/cpufreq/amd-pstate.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

drivers/cpufreq/amd-pstate.c +1 -2

index 7c51f4125263..f359b1b20140 100644
@@ -265,6 +265,7 @@ static void amd_pstate_update(struct amd_cpudata *cpudata, u32 min_perf,
 	u64 prev = READ_ONCE(cpudata->cppc_req_cached);
 	u64 value = prev;
 
+	des_perf = clamp_t(unsigned long, des_perf, min_perf, max_perf);
 	value &= ~AMD_CPPC_MIN_PERF(~0L);
 	value |= AMD_CPPC_MIN_PERF(min_perf);

@@ -353,8 +354,6 @@ static void amd_pstate_adjust_perf(unsigned int cpu,
 	if (max_perf < min_perf)
 		max_perf = min_perf;
 
-	des_perf = clamp_t(unsigned long, des_perf, min_perf, max_perf);
-
 	amd_pstate_update(cpudata, min_perf, des_perf, max_perf, true);
 }

Signature · 1 line

2.25.1

Perry Yuan

author reviewer

2022-07-12 15:42 UTC #13 lore raw

PATCH v3 8/13 cpufreq: amd-pstate: fix white-space

In reply to Perry Yuan

Remove the white space and correct mixed-up indentation

Signed-off-by Perry Yuan <[email protected]>

---
 drivers/cpufreq/amd-pstate.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

drivers/cpufreq/amd-pstate.c +2 -2

index f359b1b20140..312ccef62f58 100644
@@ -115,7 +115,7 @@ struct amd_cpudata {
 	struct amd_aperf_mperf cur;
 	struct amd_aperf_mperf prev;
 
-	u64 freq;
+	u64 	freq;
 	bool	boost_supported;
 	u64 	cppc_hw_conf_cached;
 };

@@ -671,7 +671,7 @@ static struct cpufreq_driver amd_pstate_driver = {
 	.resume		= amd_pstate_cpu_resume,
 	.set_boost	= amd_pstate_set_boost,
 	.name		= "amd-pstate",
-	.attr           = amd_pstate_attr,
+	.attr		= amd_pstate_attr,
 };
 
 static int __init amd_pstate_init(void)

Signature · 1 line

2.25.1

Viresh Kumar

maintainer Acked-by on v3 8/13

2022-07-13 05:29 UTC #14 lore raw

Re: [PATCH v3 08/13] cpufreq: amd-pstate: fix white-space

Quoted 22 lines · Perry Yuan

Remove the white space and correct mixed-up indentation

Signed-off-by Perry Yuan <[email protected]>

---
 drivers/cpufreq/amd-pstate.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

drivers/cpufreq/amd-pstate.c +1 -1

index f359b1b20140..312ccef62f58 100644
@@ -115,7 +115,7 @@ struct amd_cpudata {
 	struct amd_aperf_mperf cur;
 	struct amd_aperf_mperf prev;
 
-	u64 freq;
+	u64 	freq;
 	bool	boost_supported;
 	u64 	cppc_hw_conf_cached;
 };

drivers/cpufreq/amd-pstate.c static struct cpufreq_driver amd_pstate_driver = { · line 677

Quoted 8 lines

drivers/cpufreq/amd-pstate.c +1 -1

@@ -671,7 +671,7 @@ static struct cpufreq_driver amd_pstate_driver = {
 	.resume		= amd_pstate_cpu_resume,
 	.set_boost	= amd_pstate_set_boost,
 	.name		= "amd-pstate",
-	.attr           = amd_pstate_attr,
+	.attr		= amd_pstate_attr,
 };
 
 static int __init amd_pstate_init(void)

Acked-by Viresh Kumar <[email protected]>

Signature · 1 line

viresh

Perry Yuan

author reviewer

2022-07-12 15:42 UTC #15 lore raw

PATCH v3 9/13 cpufreq: amd-pstate: update pstate frequency transition delay time

In reply to Perry Yuan

change the default transition latency to be 20ms that is more reasonable transition delay for AMD processors in non-EPP driver mode.

Signed-off-by Perry Yuan <[email protected]>

---
 drivers/cpufreq/amd-pstate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

drivers/cpufreq/amd-pstate.c +1 -1

index 312ccef62f58..1e5ca4897b7e 100644
@@ -41,7 +41,7 @@
 #include <asm/msr.h>
 #include "amd-pstate-trace.h"
 
-#define AMD_PSTATE_TRANSITION_LATENCY	0x20000
+#define AMD_PSTATE_TRANSITION_LATENCY	20000
 #define AMD_PSTATE_TRANSITION_DELAY	500
 
 /*

Signature · 1 line

2.25.1

Viresh Kumar

maintainer Acked-by on v3 9/13

2022-07-13 05:29 UTC #16 lore raw

Re: [PATCH v3 09/13] cpufreq: amd-pstate: update pstate frequency transition delay time

Quoted 13 lines · Perry Yuan

change the default transition latency to be 20ms that is more reasonable transition delay for AMD processors in non-EPP driver mode.
Signed-off-by Perry Yuan <[email protected]>
---
 drivers/cpufreq/amd-pstate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/cpufreq/amd-pstate.c +0 -0
index 312ccef62f58..1e5ca4897b7e 100644

drivers/cpufreq/amd-pstate.c line 47

Quoted 8 lines

drivers/cpufreq/amd-pstate.c +1 -1

@@ -41,7 +41,7 @@
 #include <asm/msr.h>
 #include "amd-pstate-trace.h"
 
-#define AMD_PSTATE_TRANSITION_LATENCY	0x20000
+#define AMD_PSTATE_TRANSITION_LATENCY	20000
 #define AMD_PSTATE_TRANSITION_DELAY	500
 
 /*

Acked-by Viresh Kumar <[email protected]>

Signature · 1 line

viresh

Perry Yuan

author reviewer

2022-07-12 15:42 UTC #17 lore raw

PATCH v3 10/13 cpufreq: amd-pstate: add ACPI disabled check in acpi_cpc_valid()

In reply to Perry Yuan

Add acpi function check in case ACPI is not enabled, that will cause pstate driver failed to call cppc acpi to change perf or update epp value for shared memory solution processors.

When CPPC or ACPI is invalid, warning log will be needed to tell user that AMD pstate driver failed to load and what is wrong.

Signed-off-by Perry Yuan <[email protected]>

---
 drivers/acpi/cppc_acpi.c     | 3 +++
 drivers/cpufreq/amd-pstate.c | 2 +-
 2 files changed, 4 insertions(+), 1 deletion(-)

drivers/acpi/cppc_acpi.c +3 -0

index 6ff1901d7d43..17d67e3ededf 100644
@@ -424,6 +424,9 @@ bool acpi_cpc_valid(void)
 	struct cpc_desc *cpc_ptr;
 	int cpu;
 
+	if (acpi_disabled)
+		return false;
+
 	for_each_present_cpu(cpu) {
 		cpc_ptr = per_cpu(cpc_desc_ptr, cpu);
 		if (!cpc_ptr)

drivers/cpufreq/amd-pstate.c +1 -1

index 1e5ca4897b7e..a9918728948a 100644
@@ -682,7 +682,7 @@ static int __init amd_pstate_init(void)
 		return -ENODEV;
 
 	if (!acpi_cpc_valid()) {
-		pr_debug("the _CPC object is not present in SBIOS\n");
+		pr_warn_once("the _CPC object is not present in SBIOS or ACPI disabled\n");
 		return -ENODEV;
 	}

Signature · 1 line

2.25.1

Perry Yuan

author reviewer

2022-07-12 15:43 UTC #18 lore raw

PATCH v3 11/13 cpufreq: amd_pstate: update transition delay time to 1ms

In reply to Perry Yuan

Update transition delay time to 1ms, in the AMD CPU autonomous mode and non-autonomous mode, CPPC firmware will decide frequency at 1ms timescale based on the workload utilization.

Signed-off-by Perry Yuan <[email protected]>

Signed-off-by Su Jinzhou <[email protected]>

---
 drivers/cpufreq/amd-pstate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

drivers/cpufreq/amd-pstate.c +1 -1

index a9918728948a..83570acecc78 100644
@@ -42,7 +42,7 @@
 #include "amd-pstate-trace.h"
 
 #define AMD_PSTATE_TRANSITION_LATENCY	20000
-#define AMD_PSTATE_TRANSITION_DELAY	500
+#define AMD_PSTATE_TRANSITION_DELAY	1000
 
 /*
  * TODO: We need more time to fine tune processors with shared memory solution

Signature · 1 line

2.25.1

Viresh Kumar

maintainer Acked-by on v3 11/13

2022-07-13 05:29 UTC #19 lore raw

Re: [PATCH v3 11/13] cpufreq: amd_pstate: update transition delay time to 1ms

Quoted 15 lines · Perry Yuan

Update transition delay time to 1ms, in the AMD CPU autonomous mode and non-autonomous mode, CPPC firmware will decide frequency at 1ms timescale based on the workload utilization.
Signed-off-by Perry Yuan <[email protected]>
Signed-off-by Su Jinzhou <[email protected]>
---
 drivers/cpufreq/amd-pstate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/cpufreq/amd-pstate.c +0 -0
index a9918728948a..83570acecc78 100644

drivers/cpufreq/amd-pstate.c line 48

Quoted 8 lines

drivers/cpufreq/amd-pstate.c +1 -1

@@ -42,7 +42,7 @@
 #include "amd-pstate-trace.h"
 
 #define AMD_PSTATE_TRANSITION_LATENCY	20000
-#define AMD_PSTATE_TRANSITION_DELAY	500
+#define AMD_PSTATE_TRANSITION_DELAY	1000
 
 /*
  * TODO: We need more time to fine tune processors with shared memory solution

Acked-by Viresh Kumar <[email protected]>

Signature · 1 line

viresh

Perry Yuan

author reviewer

2022-07-12 15:44 UTC #20 lore raw

PATCH v3 12/13 arch_topology: remove the acpi_disabled check

In reply to Perry Yuan

"acpi_cpc_valid" function already includes the acpi_disabled check and we can remove the duplicated check here

Signed-off-by Perry Yuan <[email protected]>

---
 drivers/base/arch_topology.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

drivers/base/arch_topology.c +1 -1

index 579c851a2bd7..73a8cb31529d 100644
@@ -352,7 +352,7 @@ void topology_init_cpu_capacity_cppc(void)
 	struct cppc_perf_caps perf_caps;
 	int cpu;
 
-	if (likely(acpi_disabled || !acpi_cpc_valid()))
+	if (likely(!acpi_cpc_valid()))
 		return;
 
 	raw_capacity = kcalloc(num_possible_cpus(), sizeof(*raw_capacity),

Signature · 1 line

2.25.1

Viresh Kumar

maintainer Acked-by on v3 12/13

2022-07-13 05:31 UTC #21 lore raw

Re: [PATCH v3 12/13] arch_topology: remove the acpi_disabled check

Quoted 13 lines · Perry Yuan

"acpi_cpc_valid" function already includes the acpi_disabled check and we can remove the duplicated check here
Signed-off-by Perry Yuan <[email protected]>
---
 drivers/base/arch_topology.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/base/arch_topology.c +0 -0
index 579c851a2bd7..73a8cb31529d 100644

drivers/base/arch_topology.c void topology_init_cpu_capacity_cppc(void) · line 358

Quoted 8 lines

drivers/base/arch_topology.c +1 -1

@@ -352,7 +352,7 @@ void topology_init_cpu_capacity_cppc(void)
 	struct cppc_perf_caps perf_caps;
 	int cpu;
 
-	if (likely(acpi_disabled || !acpi_cpc_valid()))
+	if (likely(!acpi_cpc_valid()))
 		return;
 
 	raw_capacity = kcalloc(num_possible_cpus(), sizeof(*raw_capacity),

Acked-by Viresh Kumar <[email protected]>

Signature · 1 line

viresh

Sudeep Holla

Acked-by on v3 12/13

2022-07-13 14:41 UTC #22 lore raw

Re: [PATCH v3 12/13] arch_topology: remove the acpi_disabled check

In reply to Perry Yuan

Quoted 3 lines · Perry Yuan

"acpi_cpc_valid" function already includes the acpi_disabled check and we can remove the duplicated check here

Acked-by Sudeep Holla <[email protected]>

Signature · 2 lines

Regards,
Sudeep

Perry Yuan

author reviewer

2022-07-12 15:44 UTC #23 lore raw

PATCH v3 13/13 cpufreq: CPPC: remove the acpi_disabled check

In reply to Perry Yuan

"acpi_cpc_valid" function already includes the acpi_disabled check and we can remove the duplicated check here

Signed-off-by Perry Yuan <[email protected]>

---
 drivers/cpufreq/cppc_cpufreq.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

drivers/cpufreq/cppc_cpufreq.c +1 -1

index 24eaf0ec344d..9adb7612993e 100644
@@ -947,7 +947,7 @@ static int __init cppc_cpufreq_init(void)
 {
 	int ret;
 
-	if ((acpi_disabled) || !acpi_cpc_valid())
+	if (!acpi_cpc_valid())
 		return -ENODEV;
 
 	cppc_check_hisi_workaround();

Signature · 1 line

2.25.1

Viresh Kumar

maintainer Acked-by on v3 13/13

2022-07-13 05:32 UTC #24 lore raw

Re: [PATCH v3 13/13] cpufreq: CPPC: remove the acpi_disabled check

Quoted 13 lines · Perry Yuan

"acpi_cpc_valid" function already includes the acpi_disabled check and we can remove the duplicated check here
Signed-off-by Perry Yuan <[email protected]>
---
 drivers/cpufreq/cppc_cpufreq.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/cpufreq/cppc_cpufreq.c +0 -0
index 24eaf0ec344d..9adb7612993e 100644

drivers/cpufreq/cppc_cpufreq.c static int __init cppc_cpufreq_init(void) · line 953

Quoted 8 lines

drivers/cpufreq/cppc_cpufreq.c +1 -1

@@ -947,7 +947,7 @@ static int __init cppc_cpufreq_init(void)
 {
 	int ret;
 
-	if ((acpi_disabled) || !acpi_cpc_valid())
+	if (!acpi_cpc_valid())
 		return -ENODEV;
 
 	cppc_check_hisi_workaround();

Acked-by Viresh Kumar <[email protected]>

Signature · 1 line

viresh