Add support running nested Microsoft Hypervisor

PATCH Superseded Jinank Jain 4 participants 14 messages Nov 3, 2022 – Nov 17, 2022 1 message not in the archive

Subsystems (4)

x86 Generic include/asm header files Hyper-V/Azure core and drivers Microsoft MANA RDMA driver

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Jinank Jain

author

2022-11-03 13:05 UTC #1 lore raw

v3 cover Add support running nested Microsoft Hypervisor

This patch series plans to add support for running nested Microsoft Hypervisor. In case of nested Microsoft Hypervisor there are few privileged hypercalls which need to go L0 Hypervisor instead of L1 Hypervisor. This patches series basically identifies such hypercalls and replace them with nested hypercalls.

Jinank Jain (5):
x86/hyperv: Add support for detecting nested hypervisor
Drivers: hv: Setup synic registers in case of nested root partition x86/hyperv: Add an interface to do nested hypercalls
Drivers: hv: Enable vmbus driver for nested root partition x86/hyperv: Change interrupt vector for nested root partition

 arch/x86/include/asm/hyperv-tlfs.h | 17 +++++++-
 arch/x86/include/asm/idtentry.h    |  2 +
 arch/x86/include/asm/irq_vectors.h |  6 +++
 arch/x86/include/asm/mshyperv.h    | 68 ++++++++++++++++++++++++++++--
 arch/x86/kernel/cpu/mshyperv.c     | 22 ++++++++++
 arch/x86/kernel/idt.c              |  9 ++++
 drivers/hv/hv.c                    | 18 +++++---
 drivers/hv/hv_common.c             |  7 ++-
 drivers/hv/vmbus_drv.c             |  5 ++-
 include/asm-generic/hyperv-tlfs.h  |  1 +
 10 files changed, 141 insertions(+), 14 deletions(-)

Signature · 1 line

2.25.1

Jinank Jain

author

2022-11-03 13:05 UTC #2 lore raw

PATCH v3 1/5 x86/hyperv: Add support for detecting nested hypervisor

When Linux runs as a root partition for Microsoft Hypervisor. It is possible to detect if it is running as nested hypervisor using hints exposed by mshv. While at it expose a new variable called hv_nested which can be used later for making decisions specific to nested use case.

Signed-off-by Jinank Jain <[email protected]>

---
 arch/x86/include/asm/hyperv-tlfs.h | 3 +++
 arch/x86/include/asm/mshyperv.h    | 2 ++
 arch/x86/kernel/cpu/mshyperv.c     | 7 +++++++
 drivers/hv/hv_common.c             | 7 +++++--
 4 files changed, 17 insertions(+), 2 deletions(-)

arch/x86/include/asm/hyperv-tlfs.h +3 -0

index 3089ec352743..d9a611565859 100644
@@ -114,6 +114,9 @@
 /* Recommend using the newer ExProcessorMasks interface */
 #define HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED		BIT(11)
 
+/* Indicates that the hypervisor is nested within a Hyper-V partition. */
+#define HV_X64_HYPERV_NESTED				BIT(12)
+
 /* Recommend using enlightened VMCS */
 #define HV_X64_ENLIGHTENED_VMCS_RECOMMENDED		BIT(14)

arch/x86/include/asm/mshyperv.h +2 -0

index 61f0c206bff0..3c39923e5969 100644
@@ -26,6 +26,8 @@ void hyperv_vector_handler(struct pt_regs *regs);
 #if IS_ENABLED(CONFIG_HYPERV)
 extern int hyperv_init_cpuhp;
 
+extern bool hv_nested;
+
 extern void *hv_hypercall_pg;
 
 extern u64 hv_current_partition_id;

arch/x86/kernel/cpu/mshyperv.c +7 -0

index 831613959a92..9a4204139490 100644
@@ -37,6 +37,8 @@
 
 /* Is Linux running as the root partition? */
 bool hv_root_partition;
+/* Is Linux running on nested Microsoft Hypervisor */
+bool hv_nested;
 struct ms_hyperv_info ms_hyperv;
 
 #if IS_ENABLED(CONFIG_HYPERV)

@@ -301,6 +303,11 @@ static void __init ms_hyperv_init_platform(void)
 		pr_info("Hyper-V: running as root partition\n");
 	}
 
+	if (ms_hyperv.hints & HV_X64_HYPERV_NESTED) {
+		hv_nested = true;
+		pr_info("Hyper-V: running on a nested hypervisor\n");
+	}
+
 	/*
 	 * Extract host information.
 	 */

drivers/hv/hv_common.c +5 -2

index ae68298c0dca..dcb336ce374f 100644
@@ -25,8 +25,8 @@
 #include <asm/mshyperv.h>
 
 /*
- * hv_root_partition and ms_hyperv are defined here with other Hyper-V
- * specific globals so they are shared across all architectures and are
+ * hv_root_partition, ms_hyperv and hv_nested are defined here with other
+ * Hyper-V specific globals so they are shared across all architectures and are
  * built only when CONFIG_HYPERV is defined.  But on x86,
  * ms_hyperv_init_platform() is built even when CONFIG_HYPERV is not
  * defined, and it uses these two variables.  So mark them as __weak

@@ -36,6 +36,9 @@
 bool __weak hv_root_partition;
 EXPORT_SYMBOL_GPL(hv_root_partition);
 
+bool __weak hv_nested;
+EXPORT_SYMBOL_GPL(hv_nested);
+
 struct ms_hyperv_info __weak ms_hyperv;
 EXPORT_SYMBOL_GPL(ms_hyperv);

Signature · 1 line

2.25.1

Anirudh Rayabharam

Reviewed-by on v3 1/5

2022-11-04 10:24 UTC #3 lore raw

Re: [PATCH v3 1/5] x86/hyperv: Add support for detecting nested hypervisor

Quoted 93 lines · Jinank Jain

Signed-off-by Jinank Jain <[email protected]>

---
 arch/x86/include/asm/hyperv-tlfs.h | 3 +++
 arch/x86/include/asm/mshyperv.h    | 2 ++
 arch/x86/kernel/cpu/mshyperv.c     | 7 +++++++
 drivers/hv/hv_common.c             | 7 +++++--
 4 files changed, 17 insertions(+), 2 deletions(-)

arch/x86/include/asm/hyperv-tlfs.h +3 -0

index 3089ec352743..d9a611565859 100644
@@ -114,6 +114,9 @@
 /* Recommend using the newer ExProcessorMasks interface */
 #define HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED		BIT(11)
 
+/* Indicates that the hypervisor is nested within a Hyper-V partition. */
+#define HV_X64_HYPERV_NESTED				BIT(12)
+
 /* Recommend using enlightened VMCS */
 #define HV_X64_ENLIGHTENED_VMCS_RECOMMENDED		BIT(14)

arch/x86/include/asm/mshyperv.h +2 -0

index 61f0c206bff0..3c39923e5969 100644
@@ -26,6 +26,8 @@ void hyperv_vector_handler(struct pt_regs *regs);
 #if IS_ENABLED(CONFIG_HYPERV)
 extern int hyperv_init_cpuhp;
 
+extern bool hv_nested;
+
 extern void *hv_hypercall_pg;
 
 extern u64 hv_current_partition_id;

arch/x86/kernel/cpu/mshyperv.c +7 -0

index 831613959a92..9a4204139490 100644
@@ -37,6 +37,8 @@
 
 /* Is Linux running as the root partition? */
 bool hv_root_partition;
+/* Is Linux running on nested Microsoft Hypervisor */
+bool hv_nested;
 struct ms_hyperv_info ms_hyperv;
 
 #if IS_ENABLED(CONFIG_HYPERV)

@@ -301,6 +303,11 @@ static void __init ms_hyperv_init_platform(void)
 		pr_info("Hyper-V: running as root partition\n");
 	}
 
+	if (ms_hyperv.hints & HV_X64_HYPERV_NESTED) {
+		hv_nested = true;
+		pr_info("Hyper-V: running on a nested hypervisor\n");
+	}
+
 	/*
 	 * Extract host information.
 	 */

drivers/hv/hv_common.c +5 -2

index ae68298c0dca..dcb336ce374f 100644
@@ -25,8 +25,8 @@
 #include <asm/mshyperv.h>
 
 /*
- * hv_root_partition and ms_hyperv are defined here with other Hyper-V
- * specific globals so they are shared across all architectures and are
+ * hv_root_partition, ms_hyperv and hv_nested are defined here with other
+ * Hyper-V specific globals so they are shared across all architectures and are
  * built only when CONFIG_HYPERV is defined.  But on x86,
  * ms_hyperv_init_platform() is built even when CONFIG_HYPERV is not
  * defined, and it uses these two variables.  So mark them as __weak

@@ -36,6 +36,9 @@
 bool __weak hv_root_partition;
 EXPORT_SYMBOL_GPL(hv_root_partition);
 
+bool __weak hv_nested;
+EXPORT_SYMBOL_GPL(hv_nested);
+
 struct ms_hyperv_info __weak ms_hyperv;
 EXPORT_SYMBOL_GPL(ms_hyperv);

Signature · 1 line

2.25.1

Reviewed-by <[email protected]>

Jinank Jain

author

2022-11-03 13:05 UTC #4 lore raw

PATCH v3 2/5 Drivers: hv: Setup synic registers in case of nested root partition

In reply to Jinank Jain

Child partitions are free to allocate SynIC message and event page but in case of root partition it must use the pages allocated by Microsoft Hypervisor (MSHV). Base address for these pages can be found using synthetic MSRs exposed by MSHV. There is a slight difference in those MSRs for nested vs non-nested root partition.

Signed-off-by Jinank Jain <[email protected]>

---
 arch/x86/include/asm/hyperv-tlfs.h | 11 +++++++++++
 arch/x86/include/asm/mshyperv.h    | 24 ++++++++++++++++++++++++
 drivers/hv/hv.c                    | 18 +++++++++++++-----
 3 files changed, 48 insertions(+), 5 deletions(-)

arch/x86/include/asm/hyperv-tlfs.h +11 -0

index d9a611565859..0319091e2019 100644
@@ -225,6 +225,17 @@ enum hv_isolation_type {
 #define HV_REGISTER_SINT14			0x4000009E
 #define HV_REGISTER_SINT15			0x4000009F
 
+/*
+ * Define synthetic interrupt controller model specific registers for
+ * nested hypervisor.
+ */
+#define HV_REGISTER_NESTED_SCONTROL            0x40001080
+#define HV_REGISTER_NESTED_SVERSION            0x40001081
+#define HV_REGISTER_NESTED_SIEFP               0x40001082
+#define HV_REGISTER_NESTED_SIMP                0x40001083
+#define HV_REGISTER_NESTED_EOM                 0x40001084
+#define HV_REGISTER_NESTED_SINT0               0x40001090
+
 /*
  * Synthetic Timer MSRs. Four timers per vcpu.
  */

arch/x86/include/asm/mshyperv.h +24 -0

index 3c39923e5969..b0f16d06a0c5 100644
@@ -200,10 +200,31 @@ static inline bool hv_is_synic_reg(unsigned int reg)
 	return false;
 }
 
+static inline unsigned int hv_get_nested_reg(unsigned int reg)
+{
+	switch (reg) {
+	case HV_REGISTER_SIMP:
+		return HV_REGISTER_NESTED_SIMP;
+	case HV_REGISTER_NESTED_SIEFP:
+		return HV_REGISTER_SIEFP;
+	case HV_REGISTER_SCONTROL:
+		return HV_REGISTER_NESTED_SCONTROL;
+	case HV_REGISTER_SINT0:
+		return HV_REGISTER_NESTED_SINT0;
+	case HV_REGISTER_EOM:
+		return HV_REGISTER_NESTED_EOM;
+	default:
+		return reg;
+	}
+}
+
 static inline u64 hv_get_register(unsigned int reg)
 {
 	u64 value;
 
+	if (hv_nested)
+		reg = hv_get_nested_reg(reg);
+
 	if (hv_is_synic_reg(reg) && hv_isolation_type_snp())
 		hv_ghcb_msr_read(reg, &value);
 	else

@@ -213,6 +234,9 @@ static inline u64 hv_get_register(unsigned int reg)
 
 static inline void hv_set_register(unsigned int reg, u64 value)
 {
+	if (hv_nested)
+		reg = hv_get_nested_reg(reg);
+
 	if (hv_is_synic_reg(reg) && hv_isolation_type_snp()) {
 		hv_ghcb_msr_write(reg, value);

drivers/hv/hv.c +13 -5

index 4d6480d57546..9e1eb50cc76f 100644
@@ -147,7 +147,7 @@ int hv_synic_alloc(void)
 		 * Synic message and event pages are allocated by paravisor.
 		 * Skip these pages allocation here.
 		 */
-		if (!hv_isolation_type_snp()) {
+		if (!hv_isolation_type_snp() && !hv_root_partition) {
 			hv_cpu->synic_message_page =
 				(void *)get_zeroed_page(GFP_ATOMIC);
 			if (hv_cpu->synic_message_page == NULL) {

@@ -188,8 +188,16 @@ void hv_synic_free(void)
 		struct hv_per_cpu_context *hv_cpu
 			= per_cpu_ptr(hv_context.cpu_context, cpu);
 
-		free_page((unsigned long)hv_cpu->synic_event_page);
-		free_page((unsigned long)hv_cpu->synic_message_page);
+		if (hv_root_partition) {
+			if (hv_cpu->synic_event_page != NULL)
+				memunmap(hv_cpu->synic_event_page);
+
+			if (hv_cpu->synic_message_page != NULL)
+				memunmap(hv_cpu->synic_message_page);
+		} else {
+			free_page((unsigned long)hv_cpu->synic_event_page);
+			free_page((unsigned long)hv_cpu->synic_message_page);
+		}
 		free_page((unsigned long)hv_cpu->post_msg_page);
 	}

@@ -216,7 +224,7 @@ void hv_synic_enable_regs(unsigned int cpu)
 	simp.as_uint64 = hv_get_register(HV_REGISTER_SIMP);
 	simp.simp_enabled = 1;
 
-	if (hv_isolation_type_snp()) {
+	if (hv_isolation_type_snp() || hv_root_partition) {
 		hv_cpu->synic_message_page
 			= memremap(simp.base_simp_gpa << HV_HYP_PAGE_SHIFT,
 				   HV_HYP_PAGE_SIZE, MEMREMAP_WB);

@@ -233,7 +241,7 @@ void hv_synic_enable_regs(unsigned int cpu)
 	siefp.as_uint64 = hv_get_register(HV_REGISTER_SIEFP);
 	siefp.siefp_enabled = 1;
 
-	if (hv_isolation_type_snp()) {
+	if (hv_isolation_type_snp() || hv_root_partition) {
 		hv_cpu->synic_event_page =
 			memremap(siefp.base_siefp_gpa << HV_HYP_PAGE_SHIFT,
 				 HV_HYP_PAGE_SIZE, MEMREMAP_WB);

Signature · 1 line

2.25.1

Anirudh Rayabharam

2022-11-04 10:41 UTC #5 lore raw

Re: [PATCH v3 2/5] Drivers: hv: Setup synic registers in case of nested root partition

Quoted 57 lines · Jinank Jain

Signed-off-by Jinank Jain <[email protected]>

---
 arch/x86/include/asm/hyperv-tlfs.h | 11 +++++++++++
 arch/x86/include/asm/mshyperv.h    | 24 ++++++++++++++++++++++++
 drivers/hv/hv.c                    | 18 +++++++++++++-----
 3 files changed, 48 insertions(+), 5 deletions(-)

arch/x86/include/asm/hyperv-tlfs.h +11 -0

index d9a611565859..0319091e2019 100644
@@ -225,6 +225,17 @@ enum hv_isolation_type {
 #define HV_REGISTER_SINT14			0x4000009E
 #define HV_REGISTER_SINT15			0x4000009F
 
+/*
+ * Define synthetic interrupt controller model specific registers for
+ * nested hypervisor.
+ */
+#define HV_REGISTER_NESTED_SCONTROL            0x40001080
+#define HV_REGISTER_NESTED_SVERSION            0x40001081
+#define HV_REGISTER_NESTED_SIEFP               0x40001082
+#define HV_REGISTER_NESTED_SIMP                0x40001083
+#define HV_REGISTER_NESTED_EOM                 0x40001084
+#define HV_REGISTER_NESTED_SINT0               0x40001090
+
 /*
  * Synthetic Timer MSRs. Four timers per vcpu.
  */

arch/x86/include/asm/mshyperv.h +14 -0

index 3c39923e5969..b0f16d06a0c5 100644
@@ -200,10 +200,31 @@ static inline bool hv_is_synic_reg(unsigned int reg)
 	return false;
 }
 
+static inline unsigned int hv_get_nested_reg(unsigned int reg)
+{
+	switch (reg) {
+	case HV_REGISTER_SIMP:
+		return HV_REGISTER_NESTED_SIMP;
+	case HV_REGISTER_NESTED_SIEFP:
+		return HV_REGISTER_SIEFP;
+	case HV_REGISTER_SCONTROL:
+		return HV_REGISTER_NESTED_SCONTROL;
+	case HV_REGISTER_SINT0:
+		return HV_REGISTER_NESTED_SINT0;
+	case HV_REGISTER_EOM:
+		return HV_REGISTER_NESTED_EOM;
+	default:

arch/x86/include/asm/mshyperv.h static inline bool hv_is_synic_reg(unsigned int reg) · line 226

Quoted 10 lines

arch/x86/include/asm/mshyperv.h +6 -0

+		return reg;
+	}
+}
+
 static inline u64 hv_get_register(unsigned int reg)
 {
 	u64 value;
 
+	if (hv_nested)
+		reg = hv_get_nested_reg(reg);

With this change the nested root cannot read it's own SynIC MSRs using this method. It will always read the SynIC MSRs corresponding to the nesting hypervisor. Similar is the case with hv_set_register.

Will there never be a need for nested root to read/write it's own SynIC MSRs? For e.g. to set up inter partition communication at the L2 level.

Anirudh.

Quoted 66 lines

arch/x86/include/asm/mshyperv.h +4 -0

+
 	if (hv_is_synic_reg(reg) && hv_isolation_type_snp())
 		hv_ghcb_msr_read(reg, &value);
 	else

@@ -213,6 +234,9 @@ static inline u64 hv_get_register(unsigned int reg)
 
 static inline void hv_set_register(unsigned int reg, u64 value)
 {
+	if (hv_nested)
+		reg = hv_get_nested_reg(reg);
+
 	if (hv_is_synic_reg(reg) && hv_isolation_type_snp()) {
 		hv_ghcb_msr_write(reg, value);

drivers/hv/hv.c +13 -5

index 4d6480d57546..9e1eb50cc76f 100644
@@ -147,7 +147,7 @@ int hv_synic_alloc(void)
 		 * Synic message and event pages are allocated by paravisor.
 		 * Skip these pages allocation here.
 		 */
-		if (!hv_isolation_type_snp()) {
+		if (!hv_isolation_type_snp() && !hv_root_partition) {
 			hv_cpu->synic_message_page =
 				(void *)get_zeroed_page(GFP_ATOMIC);
 			if (hv_cpu->synic_message_page == NULL) {

@@ -188,8 +188,16 @@ void hv_synic_free(void)
 		struct hv_per_cpu_context *hv_cpu
 			= per_cpu_ptr(hv_context.cpu_context, cpu);
 
-		free_page((unsigned long)hv_cpu->synic_event_page);
-		free_page((unsigned long)hv_cpu->synic_message_page);
+		if (hv_root_partition) {
+			if (hv_cpu->synic_event_page != NULL)
+				memunmap(hv_cpu->synic_event_page);
+
+			if (hv_cpu->synic_message_page != NULL)
+				memunmap(hv_cpu->synic_message_page);
+		} else {
+			free_page((unsigned long)hv_cpu->synic_event_page);
+			free_page((unsigned long)hv_cpu->synic_message_page);
+		}
 		free_page((unsigned long)hv_cpu->post_msg_page);
 	}

@@ -216,7 +224,7 @@ void hv_synic_enable_regs(unsigned int cpu)
 	simp.as_uint64 = hv_get_register(HV_REGISTER_SIMP);
 	simp.simp_enabled = 1;
 
-	if (hv_isolation_type_snp()) {
+	if (hv_isolation_type_snp() || hv_root_partition) {
 		hv_cpu->synic_message_page
 			= memremap(simp.base_simp_gpa << HV_HYP_PAGE_SHIFT,
 				   HV_HYP_PAGE_SIZE, MEMREMAP_WB);

@@ -233,7 +241,7 @@ void hv_synic_enable_regs(unsigned int cpu)
 	siefp.as_uint64 = hv_get_register(HV_REGISTER_SIEFP);
 	siefp.siefp_enabled = 1;
 
-	if (hv_isolation_type_snp()) {
+	if (hv_isolation_type_snp() || hv_root_partition) {
 		hv_cpu->synic_event_page =
 			memremap(siefp.base_siefp_gpa << HV_HYP_PAGE_SHIFT,
 				 HV_HYP_PAGE_SIZE, MEMREMAP_WB);

Signature · 1 line

2.25.1

Jinank Jain

author

2022-11-15 05:27 UTC #6 lore raw

Re: [PATCH v3 2/5] Drivers: hv: Setup synic registers in case of nested root partition

Quoted 72 lines · Anirudh Rayabharam

Quoted 57 lines · Jinank Jain

Signed-off-by Jinank Jain <[email protected]>

---
  arch/x86/include/asm/hyperv-tlfs.h | 11 +++++++++++
  arch/x86/include/asm/mshyperv.h    | 24 ++++++++++++++++++++++++
  drivers/hv/hv.c                    | 18 +++++++++++++-----
  3 files changed, 48 insertions(+), 5 deletions(-)

arch/x86/include/asm/hyperv-tlfs.h +11 -0

index d9a611565859..0319091e2019 100644
@@ -225,6 +225,17 @@ enum hv_isolation_type {
  #define HV_REGISTER_SINT14			0x4000009E
  #define HV_REGISTER_SINT15			0x4000009F
 
+/*
+ * Define synthetic interrupt controller model specific registers for
+ * nested hypervisor.
+ */
+#define HV_REGISTER_NESTED_SCONTROL            0x40001080
+#define HV_REGISTER_NESTED_SVERSION            0x40001081
+#define HV_REGISTER_NESTED_SIEFP               0x40001082
+#define HV_REGISTER_NESTED_SIMP                0x40001083
+#define HV_REGISTER_NESTED_EOM                 0x40001084
+#define HV_REGISTER_NESTED_SINT0               0x40001090
+
  /*
   * Synthetic Timer MSRs. Four timers per vcpu.
   */

arch/x86/include/asm/mshyperv.h +14 -0

index 3c39923e5969..b0f16d06a0c5 100644
@@ -200,10 +200,31 @@ static inline bool hv_is_synic_reg(unsigned int reg)
  	return false;
  }
 
+static inline unsigned int hv_get_nested_reg(unsigned int reg)
+{
+	switch (reg) {
+	case HV_REGISTER_SIMP:
+		return HV_REGISTER_NESTED_SIMP;
+	case HV_REGISTER_NESTED_SIEFP:
+		return HV_REGISTER_SIEFP;
+	case HV_REGISTER_SCONTROL:
+		return HV_REGISTER_NESTED_SCONTROL;
+	case HV_REGISTER_SINT0:
+		return HV_REGISTER_NESTED_SINT0;
+	case HV_REGISTER_EOM:
+		return HV_REGISTER_NESTED_EOM;
+	default:

arch/x86/include/asm/mshyperv.h static inline bool hv_is_synic_reg(unsigned int reg) · line 226

Quoted 10 lines

arch/x86/include/asm/mshyperv.h +6 -0

+		return reg;
+	}
+}
+
  static inline u64 hv_get_register(unsigned int reg)
  {
  	u64 value;
 
+	if (hv_nested)
+		reg = hv_get_nested_reg(reg);

Quoted 4 lines

Will there never be a need for nested root to read/write it's own SynIC MSRs? For e.g. to set up inter partition communication at the L2 level.
Anirudh.

As far as the current use case goes I doubt there would be a use case like that. In future if such a scneario arises, I think we can add an additional parameter to hv_(get|set)_register, called nested and depending on the value of that parameter we can return the value of nested or non-nested registers. This would be very similar to the design I posted in revision 1 of this patch series.

Jinank.

Quoted 67 lines

arch/x86/include/asm/mshyperv.h +4 -0

+
  	if (hv_is_synic_reg(reg) && hv_isolation_type_snp())
  		hv_ghcb_msr_read(reg, &value);
  	else

@@ -213,6 +234,9 @@ static inline u64 hv_get_register(unsigned int reg)
 
  static inline void hv_set_register(unsigned int reg, u64 value)
  {
+	if (hv_nested)
+		reg = hv_get_nested_reg(reg);
+
  	if (hv_is_synic_reg(reg) && hv_isolation_type_snp()) {
  		hv_ghcb_msr_write(reg, value);

drivers/hv/hv.c +13 -5

index 4d6480d57546..9e1eb50cc76f 100644
@@ -147,7 +147,7 @@ int hv_synic_alloc(void)
  		 * Synic message and event pages are allocated by paravisor.
  		 * Skip these pages allocation here.
  		 */
-		if (!hv_isolation_type_snp()) {
+		if (!hv_isolation_type_snp() && !hv_root_partition) {
  			hv_cpu->synic_message_page =
  				(void *)get_zeroed_page(GFP_ATOMIC);
  			if (hv_cpu->synic_message_page == NULL) {

@@ -188,8 +188,16 @@ void hv_synic_free(void)
  		struct hv_per_cpu_context *hv_cpu
  			= per_cpu_ptr(hv_context.cpu_context, cpu);
 
-		free_page((unsigned long)hv_cpu->synic_event_page);
-		free_page((unsigned long)hv_cpu->synic_message_page);
+		if (hv_root_partition) {
+			if (hv_cpu->synic_event_page != NULL)
+				memunmap(hv_cpu->synic_event_page);
+
+			if (hv_cpu->synic_message_page != NULL)
+				memunmap(hv_cpu->synic_message_page);
+		} else {
+			free_page((unsigned long)hv_cpu->synic_event_page);
+			free_page((unsigned long)hv_cpu->synic_message_page);
+		}
  		free_page((unsigned long)hv_cpu->post_msg_page);
  	}

@@ -216,7 +224,7 @@ void hv_synic_enable_regs(unsigned int cpu)
  	simp.as_uint64 = hv_get_register(HV_REGISTER_SIMP);
  	simp.simp_enabled = 1;
 
-	if (hv_isolation_type_snp()) {
+	if (hv_isolation_type_snp() || hv_root_partition) {
  		hv_cpu->synic_message_page
  			= memremap(simp.base_simp_gpa << HV_HYP_PAGE_SHIFT,
  				   HV_HYP_PAGE_SIZE, MEMREMAP_WB);

@@ -233,7 +241,7 @@ void hv_synic_enable_regs(unsigned int cpu)
  	siefp.as_uint64 = hv_get_register(HV_REGISTER_SIEFP);
  	siefp.siefp_enabled = 1;
 
-	if (hv_isolation_type_snp()) {
+	if (hv_isolation_type_snp() || hv_root_partition) {
  		hv_cpu->synic_event_page =
  			memremap(siefp.base_siefp_gpa << HV_HYP_PAGE_SHIFT,
  				 HV_HYP_PAGE_SIZE, MEMREMAP_WB);

Signature · 1 line

2.25.1

Jinank Jain

author

2022-11-03 13:05 UTC #7 lore raw

PATCH v3 3/5 x86/hyperv: Add an interface to do nested hypercalls

In reply to Jinank Jain

According to TLFS, in order to communicate to L0 hypervisor there needs to be an additional bit set in the control register. This communication is required to perform priviledged instructions which can only be performed by L0 hypervisor. An example of that could be setting up the VMBus infrastructure.

Signed-off-by Jinank Jain <[email protected]>

---
 arch/x86/include/asm/hyperv-tlfs.h |  3 ++-
 arch/x86/include/asm/mshyperv.h    | 42 +++++++++++++++++++++++++++---
 include/asm-generic/hyperv-tlfs.h  |  1 +
 3 files changed, 41 insertions(+), 5 deletions(-)

arch/x86/include/asm/hyperv-tlfs.h +2 -1

index 0319091e2019..fd066226f12b 100644
@@ -380,7 +380,8 @@ struct hv_nested_enlightenments_control {
 		__u32 reserved:31;
 	} features;
 	struct {
-		__u32 reserved;
+		__u32 inter_partition_comm:1;
+		__u32 reserved:31;
 	} hypercallControls;
 } __packed;

arch/x86/include/asm/mshyperv.h +38 -4

64 lines not on this page · raw message

include/asm-generic/hyperv-tlfs.h +1 -0

index fdce7a4cfc6f..3840958201cd 100644
@@ -185,6 +185,7 @@ enum HV_GENERIC_SET_FORMAT {
 #define HV_HYPERCALL_VARHEAD_OFFSET	17
 #define HV_HYPERCALL_VARHEAD_MASK	GENMASK_ULL(26, 17)
 #define HV_HYPERCALL_RSVD0_MASK		GENMASK_ULL(31, 27)
+#define HV_HYPERCALL_NESTED		BIT_ULL(31)
 #define HV_HYPERCALL_REP_COMP_OFFSET	32
 #define HV_HYPERCALL_REP_COMP_1		BIT_ULL(32)
 #define HV_HYPERCALL_REP_COMP_MASK	GENMASK_ULL(43, 32)

Signature · 1 line

2.25.1

Anirudh Rayabharam

Reviewed-by on v3 3/5

2022-11-04 10:50 UTC #8 lore raw

Re: [PATCH v3 3/5] x86/hyperv: Add an interface to do nested hypercalls

Quoted 112 lines · Jinank Jain

Signed-off-by Jinank Jain <[email protected]>

---
 arch/x86/include/asm/hyperv-tlfs.h |  3 ++-
 arch/x86/include/asm/mshyperv.h    | 42 +++++++++++++++++++++++++++---
 include/asm-generic/hyperv-tlfs.h  |  1 +
 3 files changed, 41 insertions(+), 5 deletions(-)

arch/x86/include/asm/hyperv-tlfs.h +2 -1

index 0319091e2019..fd066226f12b 100644
@@ -380,7 +380,8 @@ struct hv_nested_enlightenments_control {
 		__u32 reserved:31;
 	} features;
 	struct {
-		__u32 reserved;
+		__u32 inter_partition_comm:1;
+		__u32 reserved:31;
 	} hypercallControls;
 } __packed;

arch/x86/include/asm/mshyperv.h +38 -4

index b0f16d06a0c5..32f6bed68e88 100644
@@ -76,10 +76,16 @@ static inline u64 hv_do_hypercall(u64 control, void *input, void *output)
 	return hv_status;
 }
 
+/* Hypercall to the L0 hypervisor */
+static inline u64 hv_do_nested_hypercall(u64 control, void *input, void *output)
+{
+	return hv_do_hypercall(control | HV_HYPERCALL_NESTED, input, output);
+}
+
 /* Fast hypercall with 8 bytes of input and no output */
-static inline u64 hv_do_fast_hypercall8(u16 code, u64 input1)
+static inline u64 _hv_do_fast_hypercall8(u64 control, u16 code, u64 input1)
 {
-	u64 hv_status, control = (u64)code | HV_HYPERCALL_FAST_BIT;
+	u64 hv_status;
 
 #ifdef CONFIG_X86_64
 	{

@@ -107,10 +113,24 @@ static inline u64 hv_do_fast_hypercall8(u16 code, u64 input1)
 		return hv_status;
 }
 
+static inline u64 hv_do_fast_hypercall8(u16 code, u64 input1)
+{
+	u64 control = (u64)code | HV_HYPERCALL_FAST_BIT;
+
+	return _hv_do_fast_hypercall8(control, code, input1);
+}
+
+static inline u64 hv_do_fast_nested_hypercall8(u16 code, u64 input1)
+{
+	u64 control = (u64)code | HV_HYPERCALL_FAST_BIT | HV_HYPERCALL_NESTED;
+
+	return _hv_do_fast_hypercall8(control, code, input1);
+}
+
 /* Fast hypercall with 16 bytes of input */
-static inline u64 hv_do_fast_hypercall16(u16 code, u64 input1, u64 input2)
+static inline u64 _hv_do_fast_hypercall16(u64 control, u16 code, u64 input1, u64 input2)
 {
-	u64 hv_status, control = (u64)code | HV_HYPERCALL_FAST_BIT;
+	u64 hv_status;
 
 #ifdef CONFIG_X86_64
 	{

@@ -141,6 +161,20 @@ static inline u64 hv_do_fast_hypercall16(u16 code, u64 input1, u64 input2)
 	return hv_status;
 }
 
+static inline u64 hv_do_fast_hypercall16(u16 code, u64 input1, u64 input2)
+{
+	u64 control = (u64)code | HV_HYPERCALL_FAST_BIT;
+
+	return _hv_do_fast_hypercall16(control, code, input1, input2);
+}
+
+static inline u64 hv_do_fast_nested_hypercall16(u16 code, u64 input1, u64 input2)
+{
+	u64 control = (u64)code | HV_HYPERCALL_FAST_BIT | HV_HYPERCALL_NESTED;
+
+	return _hv_do_fast_hypercall16(control, code, input1, input2);
+}
+
 extern struct hv_vp_assist_page **hv_vp_assist_page;
 
 static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)

include/asm-generic/hyperv-tlfs.h +1 -0

index fdce7a4cfc6f..3840958201cd 100644
@@ -185,6 +185,7 @@ enum HV_GENERIC_SET_FORMAT {
 #define HV_HYPERCALL_VARHEAD_OFFSET	17
 #define HV_HYPERCALL_VARHEAD_MASK	GENMASK_ULL(26, 17)
 #define HV_HYPERCALL_RSVD0_MASK		GENMASK_ULL(31, 27)
+#define HV_HYPERCALL_NESTED		BIT_ULL(31)
 #define HV_HYPERCALL_REP_COMP_OFFSET	32
 #define HV_HYPERCALL_REP_COMP_1		BIT_ULL(32)
 #define HV_HYPERCALL_REP_COMP_MASK	GENMASK_ULL(43, 32)

Signature · 1 line

2.25.1

Reviewed-by <[email protected]>

Jinank Jain

author

2022-11-03 13:06 UTC #9 lore raw

PATCH v3 4/5 Drivers: hv: Enable vmbus driver for nested root partition

In reply to Jinank Jain

Currently VMBus driver is not initialized for root partition but we need to enable the VMBus driver for nested root partition. This is required, so that L2 root can use the VMBus devices.

Signed-off-by Jinank Jain <[email protected]>

---
 drivers/hv/vmbus_drv.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

drivers/hv/vmbus_drv.c +1 -1

index 8b2e413bf19c..2f0cf75e811b 100644
@@ -2723,7 +2723,7 @@ static int __init hv_acpi_init(void)
 	if (!hv_is_hyperv_initialized())
 		return -ENODEV;
 
-	if (hv_root_partition)
+	if (hv_root_partition && !hv_nested)
 		return 0;
 
 	/*

Signature · 1 line

2.25.1

Jinank Jain

author

2022-11-03 13:06 UTC #10 lore raw

PATCH v3 5/5 x86/hyperv: Change interrupt vector for nested root partition

In reply to Jinank Jain

Traditionally we have been using the HYPERVISOR_CALLBACK_VECTOR to relay the VMBus interrupt. But this does not work in case of nested hypervisor. Microsoft Hypervisor reserves 0x31 to 0x34 as the interrupt vector range for VMBus and thus we have to use one of the vectors from that range and setup the IDT accordingly.

Signed-off-by Jinank Jain <[email protected]>

---
 arch/x86/include/asm/idtentry.h    |  2 ++
 arch/x86/include/asm/irq_vectors.h |  6 ++++++
 arch/x86/kernel/cpu/mshyperv.c     | 15 +++++++++++++++
 arch/x86/kernel/idt.c              |  9 +++++++++
 drivers/hv/vmbus_drv.c             |  3 ++-
 5 files changed, 34 insertions(+), 1 deletion(-)

arch/x86/include/asm/idtentry.h +2 -0

index 72184b0b2219..c0648e3e4d4a 100644
@@ -686,6 +686,8 @@ DECLARE_IDTENTRY_SYSVEC(POSTED_INTR_NESTED_VECTOR,	sysvec_kvm_posted_intr_nested
 DECLARE_IDTENTRY_SYSVEC(HYPERVISOR_CALLBACK_VECTOR,	sysvec_hyperv_callback);
 DECLARE_IDTENTRY_SYSVEC(HYPERV_REENLIGHTENMENT_VECTOR,	sysvec_hyperv_reenlightenment);
 DECLARE_IDTENTRY_SYSVEC(HYPERV_STIMER0_VECTOR,	sysvec_hyperv_stimer0);
+DECLARE_IDTENTRY_SYSVEC(HYPERV_INTR_NESTED_VMBUS_VECTOR,
+			sysvec_hyperv_nested_vmbus_intr);
 #endif
 
 #if IS_ENABLED(CONFIG_ACRN_GUEST)

arch/x86/include/asm/irq_vectors.h +6 -0

index 43dcb9284208..729d19eab7f5 100644
@@ -102,6 +102,12 @@
 #if IS_ENABLED(CONFIG_HYPERV)
 #define HYPERV_REENLIGHTENMENT_VECTOR	0xee
 #define HYPERV_STIMER0_VECTOR		0xed
+/*
+ * FIXME: Change this, once Microsoft Hypervisor changes its assumption
+ * around VMBus interrupt vector allocation for nested root partition.
+ * Or provides a better interface to detect this instead of hardcoding.
+ */
+#define HYPERV_INTR_NESTED_VMBUS_VECTOR	0x31
 #endif
 
 #define LOCAL_TIMER_VECTOR		0xec

arch/x86/kernel/cpu/mshyperv.c +15 -0

index 9a4204139490..703642bce423 100644
@@ -61,6 +61,21 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_callback)
 	set_irq_regs(old_regs);
 }
 
+DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_nested_vmbus_intr)
+{
+	struct pt_regs *old_regs = set_irq_regs(regs);
+
+	inc_irq_stat(irq_hv_callback_count);
+
+	if (vmbus_handler)
+		vmbus_handler();
+
+	if (ms_hyperv.hints & HV_DEPRECATING_AEOI_RECOMMENDED)
+		ack_APIC_irq();
+
+	set_irq_regs(old_regs);
+}
+
 void hv_setup_vmbus_handler(void (*handler)(void))
 {
 	vmbus_handler = handler;

arch/x86/kernel/idt.c +9 -0

index a58c6bc1cd68..ace648856a0b 100644
@@ -160,6 +160,15 @@ static const __initconst struct idt_data apic_idts[] = {
 # endif
 	INTG(SPURIOUS_APIC_VECTOR,		asm_sysvec_spurious_apic_interrupt),
 	INTG(ERROR_APIC_VECTOR,			asm_sysvec_error_interrupt),
+#ifdef CONFIG_HYPERV
+	/*
+	 * This is a hack because we cannot install this interrupt handler via alloc_intr_gate
+	 * as it does not allow interrupt vector less than FIRST_SYSTEM_VECTORS. And hyperv
+	 * does not want anything other than 0x31-0x34 as the interrupt vector for vmbus
+	 * interrupt in case of nested setup.
+	 */
+	INTG(HYPERV_INTR_NESTED_VMBUS_VECTOR, asm_sysvec_hyperv_nested_vmbus_intr),
+#endif
 #endif
 };

drivers/hv/vmbus_drv.c +2 -1

index 2f0cf75e811b..e6fb77fb44b9 100644
@@ -2746,7 +2746,8 @@ static int __init hv_acpi_init(void)
 	 * normal Linux IRQ mechanism is not used in this case.
 	 */
 #ifdef HYPERVISOR_CALLBACK_VECTOR
-	vmbus_interrupt = HYPERVISOR_CALLBACK_VECTOR;
+	vmbus_interrupt = hv_nested ? HYPERV_INTR_NESTED_VMBUS_VECTOR :
+					    HYPERVISOR_CALLBACK_VECTOR;
 	vmbus_irq = -1;
 #endif

Signature · 1 line

2.25.1

Borislav Petkov

maintainer

2022-11-03 14:01 UTC #11 lore raw

In reply to Jinank Jain

Quoted 1 line · Jinank Jain

...

Please stop spamming people with patches every day:

From: Documentation/process/submitting-patches.rst

Don't get discouraged - or impatient
------------------------------------

After you have submitted your change, be patient and wait. Reviewers are busy people and may not get to your patch right away.

Once upon a time, patches used to disappear into the void without comment, but the development process works more smoothly than that now. You should receive comments within a week or so; if that does not happen, make sure that you have sent your patches to the right place. Wait for a minimum of

						     ^^^^^^^^^^^^^^^^^^^^^

one week before resubmitting or pinging reviewers - possibly longer during ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

busy times like merge windows.

Signature · 4 lines

Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

Anirudh Rayabharam

2022-11-03 15:43 UTC #12 lore raw

In reply to Jinank Jain

Quoted 5 lines · Jinank Jain

This patch series plans to add support for running nested Microsoft Hypervisor. In case of nested Microsoft Hypervisor there are few privileged hypercalls which need to go L0 Hypervisor instead of L1 Hypervisor. This patches series basically identifies such hypercalls and replace them with nested hypercalls.

In the future, please include a changelog in your cover letter explaining what changed in each version of the series.

Anirudh.

Quoted 22 lines

Jinank Jain (5):
x86/hyperv: Add support for detecting nested hypervisor
Drivers: hv: Setup synic registers in case of nested root partition x86/hyperv: Add an interface to do nested hypercalls
Drivers: hv: Enable vmbus driver for nested root partition x86/hyperv: Change interrupt vector for nested root partition
 arch/x86/include/asm/hyperv-tlfs.h | 17 +++++++-
 arch/x86/include/asm/idtentry.h    |  2 +
 arch/x86/include/asm/irq_vectors.h |  6 +++
 arch/x86/include/asm/mshyperv.h    | 68 ++++++++++++++++++++++++++++--
 arch/x86/kernel/cpu/mshyperv.c     | 22 ++++++++++
 arch/x86/kernel/idt.c              |  9 ++++
 drivers/hv/hv.c                    | 18 +++++---
 drivers/hv/hv_common.c             |  7 ++-
 drivers/hv/vmbus_drv.c             |  5 ++-
 include/asm-generic/hyperv-tlfs.h  |  1 +
 10 files changed, 141 insertions(+), 14 deletions(-)
Signature · 1 line
2.25.1

Wei Liu

maintainer

2022-11-16 12:17 UTC #13 lore raw

In reply to Jinank Jain

Quoted 8 lines · Jinank Jain

This patch series plans to add support for running nested Microsoft Hypervisor. In case of nested Microsoft Hypervisor there are few privileged hypercalls which need to go L0 Hypervisor instead of L1 Hypervisor. This patches series basically identifies such hypercalls and replace them with nested hypercalls.
Jinank Jain (5):
x86/hyperv: Add support for detecting nested hypervisor

I see __weak hv_nested in this patch.

I guess this version has fixed ARM64 build?

Quoted 20 lines

Drivers: hv: Setup synic registers in case of nested root partition x86/hyperv: Add an interface to do nested hypercalls
Drivers: hv: Enable vmbus driver for nested root partition x86/hyperv: Change interrupt vector for nested root partition
 arch/x86/include/asm/hyperv-tlfs.h | 17 +++++++-
 arch/x86/include/asm/idtentry.h    |  2 +
 arch/x86/include/asm/irq_vectors.h |  6 +++
 arch/x86/include/asm/mshyperv.h    | 68 ++++++++++++++++++++++++++++--
 arch/x86/kernel/cpu/mshyperv.c     | 22 ++++++++++
 arch/x86/kernel/idt.c              |  9 ++++
 drivers/hv/hv.c                    | 18 +++++---
 drivers/hv/hv_common.c             |  7 ++-
 drivers/hv/vmbus_drv.c             |  5 ++-
 include/asm-generic/hyperv-tlfs.h  |  1 +
 10 files changed, 141 insertions(+), 14 deletions(-)
Signature · 1 line
2.25.1

Jinank Jain

author

2022-11-17 04:07 UTC #14 lore raw

Quoted 7 lines · Wei Liu

Quoted 6 lines · Jinank Jain
This patch series plans to add support for running nested Microsoft Hypervisor. In case of nested Microsoft Hypervisor there are few privileged hypercalls which need to go L0 Hypervisor instead of L1 Hypervisor. This patches series basically identifies such hypercalls and replace them with nested hypercalls.

Quoted 5 lines

Quoted 2 lines
Jinank Jain (5):
x86/hyperv: Add support for detecting nested hypervisor
I see __weak hv_nested in this patch.
I guess this version has fixed ARM64 build?

It is fixed in v4 of the patch series.

Regards,

Jinank

Quoted 21 lines

Quoted 21 lines
Drivers: hv: Setup synic registers in case of nested root partition x86/hyperv: Add an interface to do nested hypercalls
Drivers: hv: Enable vmbus driver for nested root partition x86/hyperv: Change interrupt vector for nested root partition
  arch/x86/include/asm/hyperv-tlfs.h | 17 +++++++-
  arch/x86/include/asm/idtentry.h    |  2 +
  arch/x86/include/asm/irq_vectors.h |  6 +++
  arch/x86/include/asm/mshyperv.h    | 68 ++++++++++++++++++++++++++++--
  arch/x86/kernel/cpu/mshyperv.c     | 22 ++++++++++
  arch/x86/kernel/idt.c              |  9 ++++
  drivers/hv/hv.c                    | 18 +++++---
  drivers/hv/hv_common.c             |  7 ++-
  drivers/hv/vmbus_drv.c             |  5 ++-
  include/asm-generic/hyperv-tlfs.h  |  1 +
  10 files changed, 141 insertions(+), 14 deletions(-)
Signature · 1 line
2.25.1