clk: mediatek: de-duplicate MT798x drivers
Subsystems (3)
cover clk: mediatek: de-duplicate MT798x drivers
De-duplicate the clock drivers of MT7981 and MT7986 which currently both implement identical drivers and bindings for apmixed and ethsys.
Daniel Golle (4):
dt-bindings: clock: rename mt7986-clk.h to mediatek,mt7986-clk.h
dt-bindings: clock: break out mediatek,ethsys into its own header
dt-bindings: clock: break out mediatek,filogic-apmixed
clk: mediatek: de-duplicate MT7981 and MT7986 clock drivers
arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 4 +-
drivers/clk/mediatek/Kconfig | 16 +--
drivers/clk/mediatek/Makefile | 3 +-
drivers/clk/mediatek/clk-mt7981-apmixed.c | 104 ---------------
drivers/clk/mediatek/clk-mt7981-eth.c | 119 ------------------
drivers/clk/mediatek/clk-mt7986-apmixed.c | 3 +-
drivers/clk/mediatek/clk-mt7986-eth.c | 5 +-
drivers/clk/mediatek/clk-mt7986-infracfg.c | 2 +-
drivers/clk/mediatek/clk-mt7986-topckgen.c | 2 +-
include/dt-bindings/clock/mediatek,ethsys.h | 32 +++++
.../clock/mediatek,filogic-apmixed.h | 21 ++++
.../dt-bindings/clock/mediatek,mt7981-clk.h | 28 -----
.../{mt7986-clk.h => mediatek,mt7986-clk.h} | 33 -----
13 files changed, 69 insertions(+), 303 deletions(-)
delete mode 100644 drivers/clk/mediatek/clk-mt7981-apmixed.c
delete mode 100644 drivers/clk/mediatek/clk-mt7981-eth.c
create mode 100644 include/dt-bindings/clock/mediatek,ethsys.h
create mode 100644 include/dt-bindings/clock/mediatek,filogic-apmixed.h
rename include/dt-bindings/clock/{mt7986-clk.h => mediatek,mt7986-clk.h} (85%)base-commit: 465461cf48465b8a0a54025db5ae2b3df7a04577
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Signature · 1 line
2.39.2
RFC PATCH 1/4 dt-bindings: clock: rename mt7986-clk.h to mediatek,mt7986-clk.h
Rename dt-bindings header file mt7986-clk.h to mediatek,mt7986-clk.h, propagate this change also to mt7986a.dtsi which is the only user.
---
arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 2 +-
drivers/clk/mediatek/clk-mt7986-infracfg.c | 2 +-
drivers/clk/mediatek/clk-mt7986-topckgen.c | 2 +-
.../dt-bindings/clock/{mt7986-clk.h => mediatek,mt7986-clk.h} | 0
4 files changed, 3 insertions(+), 3 deletions(-)
rename include/dt-bindings/clock/{mt7986-clk.h => mediatek,mt7986-clk.h} (100%)arch/arm64/boot/dts/mediatek/mt7986a.dtsi +1 -1
@@ -6,7 +6,7 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/clock/mt7986-clk.h> +#include <dt-bindings/clock/mediatek,mt7986-clk.h> #include <dt-bindings/reset/mt7986-resets.h> #include <dt-bindings/phy/phy.h> #include <dt-bindings/thermal/thermal.h>
drivers/clk/mediatek/clk-mt7986-infracfg.c +1 -1
@@ -14,7 +14,7 @@#include "clk-gate.h" #include "clk-mux.h" -#include <dt-bindings/clock/mt7986-clk.h> +#include <dt-bindings/clock/mediatek,mt7986-clk.h> #include <linux/clk.h> static DEFINE_SPINLOCK (mt7986_clk_lock);
drivers/clk/mediatek/clk-mt7986-topckgen.c +1 -1
@@ -14,7 +14,7 @@#include "clk-gate.h" #include "clk-mux.h" -#include <dt-bindings/clock/mt7986-clk.h> +#include <dt-bindings/clock/mediatek,mt7986-clk.h> #include <linux/clk.h> static DEFINE_SPINLOCK (mt7986_clk_lock);
include/dt-bindings/clock/mediatek,mt7986-clk.h renamed from include/dt-bindings/clock/mt7986-clk.h +0 -0
Signature · 1 line
2.39.2
Re: [PATCH RFC 1/4] dt-bindings: clock: rename mt7986-clk.h to mediatek,mt7986-clk.h
Quoted 9 lines · Daniel Golle
Rename dt-bindings header file
mt7986-clk.hto mediatek,mt7986-clk.h, propagate this change also tomt7986a.dtsiwhich is the only user.Signed-off-by Daniel Golle <[email protected]>--- arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 2 +- drivers/clk/mediatek/clk-mt7986-infracfg.c | 2 +- drivers/clk/mediatek/clk-mt7986-topckgen.c | 2 +- .../dt-bindings/clock/{mt7986-clk.h => mediatek,mt7986-clk.h} | 0
You cannot have bindings and DTS and drivers mixed together. Which points to fact - you cannot make such change... Also your commit msg does not justify "why" you are doing it.
Best regards,
Krzysztof
Re: [PATCH RFC 1/4] dt-bindings: clock: rename mt7986-clk.h to mediatek,mt7986-clk.h
Quoted 11 lines · Krzysztof Kozlowski
Quoted 9 lines · Daniel Golle
Rename dt-bindings header file
mt7986-clk.hto mediatek,mt7986-clk.h, propagate this change also tomt7986a.dtsiwhich is the only user.Signed-off-by Daniel Golle <[email protected]>--- arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 2 +- drivers/clk/mediatek/clk-mt7986-infracfg.c | 2 +- drivers/clk/mediatek/clk-mt7986-topckgen.c | 2 +- .../dt-bindings/clock/{mt7986-clk.h => mediatek,mt7986-clk.h} | 0
Quoted 3 lines
You cannot have bindings and DTS and drivers mixed together. Which points to fact - you cannot make such change... Also your commit msg does not justify "why" you are doing it.
The reason is simply consistency with most other SoCs.
So to make such a change possible, I should do it in three steps, right? Step 1: dt-bindings: copy mt7986-clk.h to mediatek,mt7986-clk.h Step 2: changes in drivers
Step 3: dt-bindings: remove mt7986-clk.h
Would this change be acceptable if carried out in 3 commits? And using the same strategy also the other changes suggested in the series?
Thank you!
Best regards
Daniel
Re: [PATCH RFC 1/4] dt-bindings: clock: rename mt7986-clk.h to mediatek,mt7986-clk.h
Quoted 16 lines · Daniel Golle
Quoted 11 lines · Krzysztof Kozlowski
Quoted 9 lines · Daniel Golle
Rename dt-bindings header file
mt7986-clk.hto mediatek,mt7986-clk.h, propagate this change also tomt7986a.dtsiwhich is the only user.Signed-off-by Daniel Golle <[email protected]>--- arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 2 +- drivers/clk/mediatek/clk-mt7986-infracfg.c | 2 +- drivers/clk/mediatek/clk-mt7986-topckgen.c | 2 +- .../dt-bindings/clock/{mt7986-clk.h => mediatek,mt7986-clk.h} | 0Quoted 3 lines
You cannot have bindings and DTS and drivers mixed together. Which points to fact - you cannot make such change... Also your commit msg does not justify "why" you are doing it.
Quoted 8 lines
The reason is simply consistency with most other SoCs.
So to make such a change possible, I should do it in three steps, right? Step 1: dt-bindings: copy
mt7986-clk.hto mediatek,mt7986-clk.h Step 2: changes in drivers
Step 3: dt-bindings: removemt7986-clk.hWould this change be acceptable if carried out in 3 commits?
For new code - it would have to be in three commits. For existing code, how you are going to achieve it with keeping full bisectability? Remember that each commits goes to different branch and/or tree! It's probably doable within two Linux releases with some header wrappers... but is it worth the effort just for "consistency"?
Quoted 2 lines
And using the same strategy also the other changes suggested in the series?
All of them have the same bisectability problems...
Best regards,
Krzysztof
RFC PATCH 2/4 dt-bindings: clock: break out mediatek,ethsys into its own header
In reply to Daniel GolleThe ethsys clocks of MT7981 and MT7986 are identical. In order to de-duplicate both clock drivers, start with putting ethsys into a header files of its own, so it can be used by both SoCs. Propagate this change also to mt7986a.dtsi which is the only user.
--- arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 1 + drivers/clk/mediatek/clk-mt7986-eth.c | 2 +- include/dt-bindings/clock/mediatek,ethsys.h | 32 +++++++++++++++++++ .../dt-bindings/clock/mediatek,mt7981-clk.h | 18 ----------- .../dt-bindings/clock/mediatek,mt7986-clk.h | 22 ------------- 5 files changed, 34 insertions(+), 41 deletions(-) create mode 100644 include/dt-bindings/clock/mediatek,ethsys.h
arch/arm64/boot/dts/mediatek/mt7986a.dtsi +1 -0
@@ -7,6 +7,7 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/mediatek,mt7986-clk.h> +#include <dt-bindings/clock/mediatek,ethsys.h> #include <dt-bindings/reset/mt7986-resets.h> #include <dt-bindings/phy/phy.h> #include <dt-bindings/thermal/thermal.h>
drivers/clk/mediatek/clk-mt7986-eth.c +1 -1
@@ -14,7 +14,7 @@#include "clk-mtk.h" #include "clk-gate.h" -#include <dt-bindings/clock/mt7986-clk.h> +#include <dt-bindings/clock/mediatek,ethsys.h> static const struct mtk_gate_regs sgmii0_cg_regs = { .set_ofs =0xe4 ,
include/dt-bindings/clock/mediatek,ethsys.h new file +32 -0
@@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* +* Copyright (c) 2021 MediaTek Inc. +* Author: Sam Shih <[email protected]> +*/ + +#ifndef _DT_BINDINGS_CLK_MEDIATEK_ETHSYS_H +#define _DT_BINDINGS_CLK_MEDIATEK_ETHSYS_H + +/* SGMIISYS_0 */ + +#define CLK_SGMII0_TX250M_EN 0 +#define CLK_SGMII0_RX250M_EN 1 +#define CLK_SGMII0_CDR_REF 2 +#define CLK_SGMII0_CDR_FB 3 + +/* SGMIISYS_1 */ + +#define CLK_SGMII1_TX250M_EN 0 +#define CLK_SGMII1_RX250M_EN 1 +#define CLK_SGMII1_CDR_REF 2 +#define CLK_SGMII1_CDR_FB 3 + +/* ETHSYS */ + +#define CLK_ETH_FE_EN 0 +#define CLK_ETH_GP2_EN 1 +#define CLK_ETH_GP1_EN 2 +#define CLK_ETH_WOCPU1_EN 3 +#define CLK_ETH_WOCPU0_EN 4 + +#endif
include/dt-bindings/clock/mediatek,mt7981-clk.h +0 -18
@@ -194,22 +194,4 @@#define CLK_APMIXED_MPLL 6#define CLK_APMIXED_APLL2 7 -/* SGMIISYS_0 */ -#define CLK_SGM0_TX_EN 0 -#define CLK_SGM0_RX_EN 1 -#define CLK_SGM0_CK0_EN 2 -#define CLK_SGM0_CDR_CK0_EN 3 - -/* SGMIISYS_1 */ -#define CLK_SGM1_TX_EN 0 -#define CLK_SGM1_RX_EN 1 -#define CLK_SGM1_CK1_EN 2 -#define CLK_SGM1_CDR_CK1_EN 3 - -/* ETHSYS */ -#define CLK_ETH_FE_EN 0 -#define CLK_ETH_GP2_EN 1 -#define CLK_ETH_GP1_EN 2 -#define CLK_ETH_WOCPU0_EN 3 -#endif /* _DT_BINDINGS_CLK_MT7981_H */
include/dt-bindings/clock/mediatek,mt7986-clk.h +0 -22
@@ -144,26 +144,4 @@#define CLK_INFRA_IPCIEB_CK 54#define CLK_INFRA_TRNG_CK 55 -/* SGMIISYS_0 */ - -#define CLK_SGMII0_TX250M_EN 0 -#define CLK_SGMII0_RX250M_EN 1 -#define CLK_SGMII0_CDR_REF 2 -#define CLK_SGMII0_CDR_FB 3 - -/* SGMIISYS_1 */ - -#define CLK_SGMII1_TX250M_EN 0 -#define CLK_SGMII1_RX250M_EN 1 -#define CLK_SGMII1_CDR_REF 2 -#define CLK_SGMII1_CDR_FB 3 - -/* ETHSYS */ - -#define CLK_ETH_FE_EN 0 -#define CLK_ETH_GP2_EN 1 -#define CLK_ETH_GP1_EN 2 -#define CLK_ETH_WOCPU1_EN 3 -#define CLK_ETH_WOCPU0_EN 4 -#endif /* _DT_BINDINGS_CLK_MT7986_H */
Signature · 1 line
2.39.2
Re: [PATCH RFC 2/4] dt-bindings: clock: break out mediatek,ethsys into its own header
Quoted 10 lines · Daniel Golle
The ethsys clocks of MT7981 and MT7986 are identical. In order to de-duplicate both clock drivers, start with putting ethsys into a header files of its own, so it can be used by both SoCs. Propagate this change also to
mt7986a.dtsiwhich is the only user.Signed-off-by Daniel Golle <[email protected]>--- arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 1 + drivers/clk/mediatek/clk-mt7986-eth.c | 2 +- include/dt-bindings/clock/mediatek,ethsys.h | 32 +++++++++++++++++++
A bit too generic name. Are you sure it will fit all of eth on all Mediatek SoCs? Current and future?
Quoted 2 lines
.../dt-bindings/clock/mediatek,mt7981-clk.h | 18 ----------- .../dt-bindings/clock/mediatek,mt7986-clk.h | 22 -------------
Same problems as previous patch. You cannot mix bindings and DTS and drivers.
Best regards,
Krzysztof
RFC PATCH 3/4 dt-bindings: clock: break out mediatek,filogic-apmixed
In reply to Daniel GolleThe apmixed clocks of MT7981 and MT7986 are identical. In order to de-duplicate both clock drivers, start with putting apmixed into a header files of its own, so it can be used by both SoCs. Propagate this change also to mt7986a.dtsi which is the only user.
--- arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 1 + drivers/clk/mediatek/clk-mt7986-apmixed.c | 2 +- .../clock/mediatek,filogic-apmixed.h | 21 +++++++++++++++++++ .../dt-bindings/clock/mediatek,mt7981-clk.h | 10 --------- .../dt-bindings/clock/mediatek,mt7986-clk.h | 11 ---------- 5 files changed, 23 insertions(+), 22 deletions(-) create mode 100644 include/dt-bindings/clock/mediatek,filogic-apmixed.h
arch/arm64/boot/dts/mediatek/mt7986a.dtsi +1 -0
@@ -8,6 +8,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/mediatek,mt7986-clk.h> #include <dt-bindings/clock/mediatek,ethsys.h> +#include <dt-bindings/clock/mediatek,filogic-apmixed.h> #include <dt-bindings/reset/mt7986-resets.h> #include <dt-bindings/phy/phy.h> #include <dt-bindings/thermal/thermal.h>
drivers/clk/mediatek/clk-mt7986-apmixed.c +1 -1
@@ -16,7 +16,7 @@#include "clk-mux.h" #include "clk-pll.h" -#include <dt-bindings/clock/mt7986-clk.h> +#include <dt-bindings/clock/mediatek,filogic-apmixed.h> #include <linux/clk.h> #define MT7986_PLL_FMAX (2500UL * MHZ)
include/dt-bindings/clock/mediatek,filogic-apmixed.h new file +21 -0
@@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* +* Copyright (c) 2021 MediaTek Inc. +* Author: Sam Shih <[email protected]> +*/ + +#ifndef _DT_BINDINGS_CLK_MEDIATEK_FILOGIC_APMIXED_H +#define _DT_BINDINGS_CLK_MEDIATEK_FILOGIC_APMIXED_H + +/* APMIXEDSYS */ + +#define CLK_APMIXED_ARMPLL 0 +#define CLK_APMIXED_NET2PLL 1 +#define CLK_APMIXED_MMPLL 2 +#define CLK_APMIXED_SGMPLL 3 +#define CLK_APMIXED_WEDMCUPLL 4 +#define CLK_APMIXED_NET1PLL 5 +#define CLK_APMIXED_MPLL 6 +#define CLK_APMIXED_APLL2 7 + +#endif
include/dt-bindings/clock/mediatek,mt7981-clk.h +0 -10
@@ -184,14 +184,4 @@#define CLK_INFRA_IPCIER_CK 59#define CLK_INFRA_IPCIEB_CK 60 -/* APMIXEDSYS */ -#define CLK_APMIXED_ARMPLL 0 -#define CLK_APMIXED_NET2PLL 1 -#define CLK_APMIXED_MMPLL 2 -#define CLK_APMIXED_SGMPLL 3 -#define CLK_APMIXED_WEDMCUPLL 4 -#define CLK_APMIXED_NET1PLL 5 -#define CLK_APMIXED_MPLL 6 -#define CLK_APMIXED_APLL2 7 -#endif /* _DT_BINDINGS_CLK_MT7981_H */
include/dt-bindings/clock/mediatek,mt7986-clk.h +0 -11
@@ -7,17 +7,6 @@#ifndef _DT_BINDINGS_CLK_MT7986_H#define _DT_BINDINGS_CLK_MT7986_H -/* APMIXEDSYS */ - -#define CLK_APMIXED_ARMPLL 0 -#define CLK_APMIXED_NET2PLL 1 -#define CLK_APMIXED_MMPLL 2 -#define CLK_APMIXED_SGMPLL 3 -#define CLK_APMIXED_WEDMCUPLL 4 -#define CLK_APMIXED_NET1PLL 5 -#define CLK_APMIXED_MPLL 6 -#define CLK_APMIXED_APLL2 7 -/* TOPCKGEN */ #define CLK_TOP_XTAL 0
Signature · 1 line
2.39.2
Re: [PATCH RFC 3/4] dt-bindings: clock: break out mediatek,filogic-apmixed
Quoted 5 lines · Daniel Golle
The apmixed clocks of MT7981 and MT7986 are identical. In order to de-duplicate both clock drivers, start with putting apmixed into a header files of its own, so it can be used by both SoCs. Propagate this change also to
mt7986a.dtsiwhich is the only user.
Quoted 8 lines
Signed-off-by Daniel Golle <[email protected]>--- arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 1 + drivers/clk/mediatek/clk-mt7986-apmixed.c | 2 +- .../clock/mediatek,filogic-apmixed.h | 21 +++++++++++++++++++ .../dt-bindings/clock/mediatek,mt7981-clk.h | 10 --------- .../dt-bindings/clock/mediatek,mt7986-clk.h | 11 ---------- 5 files changed, 23 insertions(+), 22 deletions(-)
Same comments as previous patch:
1. Too generic name.
2. Mixed code with bindings with DTS.
Best regards,
Krzysztof
RFC PATCH 4/4 clk: mediatek: de-duplicate MT7981 and MT7986 clock drivers
In reply to Daniel GolleThe MediaTek MT7981 and MT7986 SoCs have identical apmixed and ethsys clocks. De-duplicate the drivers in favor of sharing code on these two SoCs.
--- drivers/clk/mediatek/Kconfig | 16 +-- drivers/clk/mediatek/Makefile | 3 +- drivers/clk/mediatek/clk-mt7981-apmixed.c | 104 ------------------- drivers/clk/mediatek/clk-mt7981-eth.c | 119 ---------------------- drivers/clk/mediatek/clk-mt7986-apmixed.c | 1 + drivers/clk/mediatek/clk-mt7986-eth.c | 3 + 6 files changed, 9 insertions(+), 237 deletions(-) delete mode 100644 drivers/clk/mediatek/clk-mt7981-apmixed.c delete mode 100644 drivers/clk/mediatek/clk-mt7981-eth.c
drivers/clk/mediatek/Kconfig +4 -12
@@ -397,14 +397,6 @@ config COMMON_CLK_MT7981 This driver supports MediaTek MT7981 basic clocks and clocks required for various peripherals found on this SoC. -config COMMON_CLK_MT7981_ETHSYS - tristate "Clock driver for MediaTek MT7981 ETHSYS" - depends on COMMON_CLK_MT7981 - default COMMON_CLK_MT7981 - help - This driver adds support for clocks for Ethernet and SGMII - required on MediaTek MT7981 SoC. - config COMMON_CLK_MT7986 tristate "Clock driver for MediaTek MT7986" depends on ARCH_MEDIATEK || COMPILE_TEST
@@ -415,12 +407,12 @@ config COMMON_CLK_MT7986 required for various peripherals found on MediaTek. config COMMON_CLK_MT7986_ETHSYS - tristate "Clock driver for MediaTek MT7986 ETHSYS" - depends on COMMON_CLK_MT7986 - default COMMON_CLK_MT7986 + tristate "Clock driver for MediaTek MT7981 and MT7986 ETHSYS" + depends on COMMON_CLK_MT7981 || COMMON_CLK_MT7986 + default COMMON_CLK_MT7981 || COMMON_CLK_MT7986 help This driver adds support for clocks for Ethernet and SGMII - required on MediaTek MT7986 SoC. + required on MediaTek MT7981 and MT7986 SoC. config COMMON_CLK_MT8135 tristate "Clock driver for MediaTek MT8135"
drivers/clk/mediatek/Makefile +1 -2
@@ -54,10 +54,9 @@ obj-$(CONFIG_COMMON_CLK_MT7622_AUDSYS) += clk-mt7622-aud.o obj-$(CONFIG_COMMON_CLK_MT7629) += clk-mt7629.o obj-$(CONFIG_COMMON_CLK_MT7629_ETHSYS) += clk-mt7629-eth.o obj-$(CONFIG_COMMON_CLK_MT7629_HIFSYS) += clk-mt7629-hif.o -obj-$(CONFIG_COMMON_CLK_MT7981) += clk-mt7981-apmixed.o +obj-$(CONFIG_COMMON_CLK_MT7981) += clk-mt7986-apmixed.o obj-$(CONFIG_COMMON_CLK_MT7981) += clk-mt7981-topckgen.o obj-$(CONFIG_COMMON_CLK_MT7981) += clk-mt7981-infracfg.o -obj-$(CONFIG_COMMON_CLK_MT7981_ETHSYS) += clk-mt7981-eth.o obj-$(CONFIG_COMMON_CLK_MT7986) += clk-mt7986-apmixed.o obj-$(CONFIG_COMMON_CLK_MT7986) += clk-mt7986-topckgen.o obj-$(CONFIG_COMMON_CLK_MT7986) += clk-mt7986-infracfg.o
drivers/clk/mediatek/clk-mt7981-apmixed.c deleted +0 -104
104 lines not on this page · raw message
drivers/clk/mediatek/clk-mt7981-eth.c deleted +0 -119
119 lines not on this page · raw message
drivers/clk/mediatek/clk-mt7986-apmixed.c +1 -0
@@ -61,6 +61,7 @@ static const struct mtk_pll_data plls[] = { };static const struct of_device_id of_match_clk_mt7986_apmixed[] = { + { .compatible ="mediatek,mt7981-apmixedsys" , }, { .compatible ="mediatek,mt7986-apmixedsys" , }, { } };
drivers/clk/mediatek/clk-mt7986-eth.c +3 -0
@@ -81,6 +81,9 @@ static const struct mtk_clk_desc sgmii1_desc = { };static const struct of_device_id of_match_clk_mt7986_eth[] = { + { .compatible ="mediatek,mt7981-ethsys" , .data = ð_desc }, + { .compatible ="mediatek,mt7981-sgmiisys_0" , .data = &sgmii0_desc }, + { .compatible ="mediatek,mt7981-sgmiisys_1" , .data = &sgmii1_desc }, { .compatible ="mediatek,mt7986-ethsys" , .data = ð_desc }, { .compatible ="mediatek,mt7986-sgmiisys_0" , .data = &sgmii0_desc }, { .compatible ="mediatek,mt7986-sgmiisys_1" , .data = &sgmii1_desc },
Signature · 1 line
2.39.2