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LoongArch: Add built-in dtb support

PATCH Superseded Binbin Zhou 4 participants 17 messages Dec 18, 2023 – Dec 21, 2023

Subsystems (2)

v5 of 6 Superseded Latest is v6 →

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#0 lore raw

v5 cover LoongArch: Add built-in dtb support

Hi all:

This patchset introduces LoongArch's built-in dtb support.

During the upstream progress of those DT-based drivers, DT properties are changed a lot so very different from those in existing bootloaders. It is inevitably that some existing systems do not provide a standard, canonical device tree to the kernel at boot time. So let's provide a device tree table in the kernel, keyed by the dts filename, containing the relevant DTBs.

We can use the built-in dts files as references. Each SoC has only one built-in dts file which describes all possible device information of that SoC, so the dts files are good examples during development.

And as a reference, our built-in dts file only enables the most basic bootable combinations (so it is generic enough), acts as an alternative in case the dts in the bootloader is unexpected.

In the past while, we resolved the DTC_CHK warning for the v4 patchset, and the relevant patchset has either been received or had the Reviewed-by tag added.
Now, we need to rely on the following patch sets:
1. liointc
https://lore.kernel.org/all/[email protected]/
Reviewed-by tag has been added.
2. pmc
https://lore.kernel.org/all/[email protected]/
has been received by Daniel.

Thanks.

-----
V5:
patch(1/7):
- Add reviewed-by tag.
patch(3/7):
- Rewrite commit message to describe the reason for needing the build-in DTB.
patch(4/7):
- Add Power-Manager node.
patch(5/7):
- Add Power-Manager node.
- Add spi node.
- Add pmc node.
patch(6/7):
- Add Power-Manager node.

Link to V4:
https://lore.kernel.org/all/[email protected]/

V4:
patch(1/7):
- Drop device_type property.
patch(2/7):
- Rename board.yaml to loongson.yaml.
patch(4/7):
- Keep the ranges attribute after compatible;
- Add bootargs = "ttyS0,115200", which is needed for reference board;
patch(5/7):
- Keep the ranges attribute after compatible;
- Add bootargs = "ttyS0,115200", which is needed for reference board;
- Change node name global-utilities to chipid.
patch(6/7):
- Keep the ranges attribute after compatible;
- Add bootargs = "ttyS0,115200", which is needed for reference board.

Link to V3:
https://lore.kernel.org/all/[email protected]/

V3:
patch(1/7):
- Add reference to the common cpu schema.
patch(2/7):
- Add reviewed-by tag.
patch(4/7):
- Drop bootargs;
- Move the cpus node to dtsi, which is part of the SoC.
patch(5/7):
- Drop bootargs;
- Move the cpus node to dtsi, which is part of the SoC;
- Fix gmac0/1-mdio node: compatible is always the first property;
- Drop i2c-gpio node.
patch(6/7):
- Drop bootargs;
- Move the cpus node to dtsi, which is part of the SoC.
- Changes liointc to liointc-1.0, for Loongson-2K2000 has 32 interrupt sources.

Link to V2:
https://lore.kernel.org/all/[email protected]/

V2:
patch(1/7):
- Drop model and clock-frequency properties;
- Add clocks property;
- Rewrite the description.
patch(2/7):
- Add the proper compatibles for boards.
patch(4/7)(5/7)(6/7):
- Format commit message head;
- Drop undocumented compatible, such as pci_bridge compatible;
- Distinguish the attributes, put SoC-related into DTSI and

    board-related into DTS;

- Check DTS with 'make dtbs_check W=1'.
patch(7/7)
- New patch;
- Parses Molde name and CPU MHz from the DTS attribute.

Link to V1:
https://lore.kernel.org/loongarch/[email protected]/

Binbin Zhou (7):
dt-bindings: loongarch: Add CPU bindings for LoongArch
dt-bindings: loongarch: Add Loongson SoC boards compatibles
LoongArch: Allow device trees to be built into the kernel
LoongArch: dts: DeviceTree for Loongson-2K0500
LoongArch: dts: DeviceTree for Loongson-2K1000
LoongArch: dts: DeviceTree for Loongson-2K2000
LoongArch: Parsing CPU-related information from DTS

 .../devicetree/bindings/loongarch/cpus.yaml   |  61 +++
 .../bindings/loongarch/loongson.yaml          |  34 ++
 arch/loongarch/Kconfig                        |  18 +
 arch/loongarch/Makefile                       |  10 +-
 arch/loongarch/boot/dts/Makefile              |   7 +-
 .../boot/dts/loongson-2k0500-ref.dts          |  89 ++++
 arch/loongarch/boot/dts/loongson-2k0500.dtsi  | 274 +++++++++++
 .../boot/dts/loongson-2k1000-ref.dts          | 184 +++++++
 arch/loongarch/boot/dts/loongson-2k1000.dtsi  | 453 ++++++++++++++++++
 .../boot/dts/loongson-2k2000-ref.dts          |  73 +++
 arch/loongarch/boot/dts/loongson-2k2000.dtsi  | 311 ++++++++++++
 arch/loongarch/kernel/env.c                   |  34 +-
 arch/loongarch/kernel/setup.c                 |   9 +-
 13 files changed, 1550 insertions(+), 7 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/loongarch/cpus.yaml
 create mode 100644 Documentation/devicetree/bindings/loongarch/loongson.yaml
 create mode 100644 arch/loongarch/boot/dts/loongson-2k0500-ref.dts
 create mode 100644 arch/loongarch/boot/dts/loongson-2k0500.dtsi
 create mode 100644 arch/loongarch/boot/dts/loongson-2k1000-ref.dts
 create mode 100644 arch/loongarch/boot/dts/loongson-2k1000.dtsi
 create mode 100644 arch/loongarch/boot/dts/loongson-2k2000-ref.dts
 create mode 100644 arch/loongarch/boot/dts/loongson-2k2000.dtsi
Signature · 1 line
2.39.3
#1 lore raw

PATCH v5 1/7 dt-bindings: loongarch: Add CPU bindings for LoongArch

Add the available CPUs in LoongArch binding with DT schema format using json-schema.

---
 .../devicetree/bindings/loongarch/cpus.yaml   | 61 +++++++++++++++++++
 1 file changed, 61 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/loongarch/cpus.yaml
Documentation/devicetree/bindings/loongarch/cpus.yaml new file +61 -0
new file mode 100644
index 000000000000..f175872995e1
@@ -0,0 +1,61 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/loongarch/cpus.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: LoongArch CPUs
+
+maintainers:
+  - Binbin Zhou <[email protected]>
+
+description:
+  This document describes the list of LoongArch CPU cores that support FDT,
+  it describe the layout of CPUs in a system through the "cpus" node.
+
+allOf:
+  - $ref: /schemas/cpu.yaml#
+
+properties:
+  compatible:
+    enum:
+      - loongson,la264
+      - loongson,la364
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - clocks
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/loongson,ls2k-clk.h>
+
+    cpus {
+        #size-cells = <0>;
+        #address-cells = <1>;
+
+        cpu@0 {
+            compatible = "loongson,la264";
+            device_type = "cpu";
+            reg = <0>;
+            clocks = <&clk LOONGSON2_NODE_CLK>;
+        };
+
+        cpu@1 {
+            compatible = "loongson,la264";
+            device_type = "cpu";
+            reg = <1>;
+            clocks = <&clk LOONGSON2_NODE_CLK>;
+        };
+    };
+
+...
Signature · 1 line
2.39.3
#2 lore raw

PATCH v5 2/7 dt-bindings: loongarch: Add Loongson SoC boards compatibles

In reply to Binbin Zhou

Add Loongson SoC boards binding with DT schema format using json-schema.

---
 .../bindings/loongarch/loongson.yaml          | 34 +++++++++++++++++++
 1 file changed, 34 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/loongarch/loongson.yaml
Documentation/devicetree/bindings/loongarch/loongson.yaml new file +34 -0
new file mode 100644
index 000000000000..e1a4a97b7576
@@ -0,0 +1,34 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/loongarch/loongson.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Loongson SoC-based boards
+
+maintainers:
+  - Binbin Zhou <[email protected]>
+
+properties:
+  $nodename:
+    const: '/'
+  compatible:
+    oneOf:
+      - description: Loongson-2K0500 processor based boards
+        items:
+          - const: loongson,ls2k0500-ref
+          - const: loongson,ls2k0500
+
+      - description: Loongson-2K1000 processor based boards
+        items:
+          - const: loongson,ls2k1000-ref
+          - const: loongson,ls2k1000
+
+      - description: Loongson-2K2000 processor based boards
+        items:
+          - const: loongson,ls2k2000-ref
+          - const: loongson,ls2k2000
+
+additionalProperties: true
+
+...
Signature · 1 line
2.39.3
#3 lore raw

PATCH v5 3/7 LoongArch: Allow device trees to be built into the kernel

In reply to Binbin Zhou

During the upstream progress of those DT-based drivers, DT properties are changed a lot so very different from those in existing bootloaders. It is inevitably that some existing systems do not provide a standard, canonical device tree to the kernel at boot time. So let's provide a device tree table in the kernel, keyed by the dts filename, containing the relevant DTBs.

We can use the built-in dts files as references. Each SoC has only one built-in dts file which describes all possible device information of that SoC, so the dts files are good examples during development.

And as a reference, our built-in dts file only enables the most basic bootable combinations (so it is generic enough), acts as an alternative in case the dts in the bootloader is unexpected.

---
 arch/loongarch/Kconfig           | 18 ++++++++++++++++++
 arch/loongarch/Makefile          | 10 ++++++++--
 arch/loongarch/boot/dts/Makefile |  3 +--
 arch/loongarch/kernel/setup.c    |  9 +++++++--
 4 files changed, 34 insertions(+), 6 deletions(-)
arch/loongarch/Kconfig +18 -0
index ee123820a476..267de6191dfc 100644
@@ -331,6 +331,24 @@ config 64KB_3LEVEL
 
 endchoice
 
+config BUILTIN_DTB
+	bool "Enable builtin dtb in kernel"
+	depends on OF
+	help
+	  Some existing systems do not provide a canonical device tree to the
+	  kernel at boot time. Let's provide a device tree table in the kernel,
+	  keyed by the dts filename, containing the relevant DTBs.
+
+	  Built-in DTBs are generic enough and can be used as references.
+
+config BUILTIN_DTB_NAME
+	string "Source file for LoongArch builtin dtb"
+	depends on BUILTIN_DTB
+	help
+	  Base name (without suffix, relative to arch/loongarch/boot/dts/)
+	  for the DTS file that will be used to produce the DTB linked into the
+	  kernel.
+
 config CMDLINE
 	string "Built-in kernel command line"
 	help
arch/loongarch/Makefile +8 -2
index 4ba8d67ddb09..5b84f43adb98 100644
@@ -5,7 +5,8 @@
 
 boot	:= arch/loongarch/boot
 
-KBUILD_DEFCONFIG := loongson3_defconfig
+KBUILD_DEFCONFIG		:= loongson3_defconfig
+KBUILD_DTBS			:= dtbs
 
 image-name-y			:= vmlinux
 image-name-$(CONFIG_EFI_ZBOOT)	:= vmlinuz
@@ -141,13 +142,16 @@ endif
 
 vdso-install-y += arch/loongarch/vdso/vdso.so.dbg
 
-all:	$(notdir $(KBUILD_IMAGE))
+all:	$(notdir $(KBUILD_IMAGE)) $(KBUILD_DTBS)
 
 vmlinuz.efi: vmlinux.efi
 
 vmlinux.elf vmlinux.efi vmlinuz.efi: vmlinux
 	$(Q)$(MAKE) $(build)=$(boot) $(bootvars-y) $(boot)/$@
 
+# device-trees
+core-y += arch/loongarch/boot/dts/
+
 install:
 	$(Q)install -D -m 755 $(KBUILD_IMAGE) $(INSTALL_PATH)/$(image-name-y)-$(KERNELRELEASE)
 	$(Q)install -D -m 644 .config $(INSTALL_PATH)/config-$(KERNELRELEASE)
@@ -155,5 +159,7 @@ install:
 
 define archhelp
 	echo '  install              - install kernel into $(INSTALL_PATH)'
+	echo '  dtbs                 - Device-tree blobs for enabled boards'
+	echo '  dtbs_install         - Install dtbs to $(INSTALL_DTBS_PATH)'
 	echo
 endef
arch/loongarch/boot/dts/Makefile +1 -2
index 5f1f55e911ad..1e24cdb5180a 100644
@@ -1,4 +1,3 @@
 # SPDX-License-Identifier: GPL-2.0-only
-dtstree	:= $(srctree)/$(src)
 
-dtb-y := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts))
+obj-$(CONFIG_BUILTIN_DTB)	+= $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))
arch/loongarch/kernel/setup.c +7 -2
index d183a745fb85..6cf3b1e045f6 100644
@@ -295,8 +295,13 @@ static void __init fdt_setup(void)
 	if (acpi_os_get_root_pointer())
 		return;
 
-	/* Look for a device tree configuration table entry */
-	fdt_pointer = efi_fdt_pointer();
+	/* We prefer to try to use built-in dtb, checking its legality first. */
+	if (!fdt_check_header(__dtb_start))
+		fdt_pointer = __dtb_start;
+	else
+		/* Fallback to efi dtb, when built-in dtb is not available. */
+		fdt_pointer = efi_fdt_pointer();
+
 	if (!fdt_pointer || fdt_check_header(fdt_pointer))
 		return;
 
Signature · 1 line
2.39.3
#4 lore raw

PATCH v5 4/7 LoongArch: dts: DeviceTree for Loongson-2K0500

In reply to Binbin Zhou

Add DeviceTree file for Loongson-2K0500 processor, which integrates one 64-bit dual emission superscalar LA264 processor core.

---
 arch/loongarch/boot/dts/Makefile              |   2 +
 .../boot/dts/loongson-2k0500-ref.dts          |  89 ++++++
 arch/loongarch/boot/dts/loongson-2k0500.dtsi  | 274 ++++++++++++++++++
 3 files changed, 365 insertions(+)
 create mode 100644 arch/loongarch/boot/dts/loongson-2k0500-ref.dts
 create mode 100644 arch/loongarch/boot/dts/loongson-2k0500.dtsi
arch/loongarch/boot/dts/Makefile +2 -0
index 1e24cdb5180a..aa0b21d73d4e 100644
@@ -1,3 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0-only
 
+dtb-$(CONFIG_MACH_LOONGSON64)	= loongson-2k0500-ref.dtb
+
 obj-$(CONFIG_BUILTIN_DTB)	+= $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))
arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +89 -0

89 lines not on this page · raw message

arch/loongarch/boot/dts/loongson-2k0500.dtsi new file +274 -0

274 lines not on this page · raw message

Signature · 1 line
2.39.3
#5 lore raw

Re: [PATCH v5 4/7] LoongArch: dts: DeviceTree for Loongson-2K0500

Quoted 40 lines · Binbin Zhou

Add DeviceTree file for Loongson-2K0500 processor, which integrates one 64-bit dual emission superscalar LA264 processor core.

---
 arch/loongarch/boot/dts/Makefile              |   2 +
 .../boot/dts/loongson-2k0500-ref.dts          |  89 ++++++
 arch/loongarch/boot/dts/loongson-2k0500.dtsi  | 274 ++++++++++++++++++
 3 files changed, 365 insertions(+)
 create mode 100644 arch/loongarch/boot/dts/loongson-2k0500-ref.dts
 create mode 100644 arch/loongarch/boot/dts/loongson-2k0500.dtsi
arch/loongarch/boot/dts/Makefile +2 -0
index 1e24cdb5180a..aa0b21d73d4e 100644
@@ -1,3 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0-only
 
+dtb-$(CONFIG_MACH_LOONGSON64)	= loongson-2k0500-ref.dtb
+
 obj-$(CONFIG_BUILTIN_DTB)	+= $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))
arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +12 -0
new file mode 100644
index 000000000000..52483127a419
@@ -0,0 +1,89 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2023 Loongson Technology Corporation Limited
+ */
+
+/dts-v1/;
+
+#include "loongson-2k0500.dtsi"
+
+/ {
+	compatible = "loongson,ls2k0500-ref", "loongson,ls2k0500";
+	model = "Loongson-2K0500 Reference Board";

arch/loongarch/boot/dts/loongson-2k0500-ref.dts line 22

Quoted 10 lines
arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +10 -0
+
+	aliases {
+		ethernet0 = &gmac0;
+		ethernet1 = &gmac1;
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+		bootargs = "console=ttyS0,115200";

You received here comments already:
https://lore.kernel.org/all/[email protected]/

Don't waste our time to re-review the same mistakes over and over again.

...

arch/loongarch/boot/dts/loongson-2k0500-ref.dts line 33

Quoted 11 lines
arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +11 -0
+
+		i2c@1ff4a800 {
+			compatible = "loongson,ls2k-i2c";
+			reg = <0x0 0x1ff4a800 0x0 0x0800>;
+			interrupt-parent = <&eiointc>;
+			interrupts = <19>;
+			status = "disabled";
+		};
+
+		pmc: power-management@1ff6c000 {
+			compatible = "loongson,ls2k0500-pmc", "syscon";

It does not look like you tested the DTS against bindings. Please run make dtbs_check W=1 (see Documentation/devicetree/bindings/writing-schema.rst or
https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
for instructions).

Or you did not test your DTS on the hardware.

arch/loongarch/boot/dts/loongson-2k0500-ref.dts line 39

Quoted 6 lines
arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +6 -0
+			reg = <0x0 0x1ff6c000 0x0 0x58>;
+			interrupt-parent = <&eiointc>;
+			interrupts = <56>;
+			loongson,suspend-address = <0x0 0x1c000500>;
+
+			syscon-reboot {

Best regards,
Krzysztof

#6 lore raw

Re: [PATCH v5 4/7] LoongArch: dts: DeviceTree for Loongson-2K0500

Quoted 56 lines · Krzysztof Kozlowski
Quoted 40 lines · Binbin Zhou

Add DeviceTree file for Loongson-2K0500 processor, which integrates one 64-bit dual emission superscalar LA264 processor core.

---
 arch/loongarch/boot/dts/Makefile              |   2 +
 .../boot/dts/loongson-2k0500-ref.dts          |  89 ++++++
 arch/loongarch/boot/dts/loongson-2k0500.dtsi  | 274 ++++++++++++++++++
 3 files changed, 365 insertions(+)
 create mode 100644 arch/loongarch/boot/dts/loongson-2k0500-ref.dts
 create mode 100644 arch/loongarch/boot/dts/loongson-2k0500.dtsi
arch/loongarch/boot/dts/Makefile +2 -0
index 1e24cdb5180a..aa0b21d73d4e 100644
@@ -1,3 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0-only
 
+dtb-$(CONFIG_MACH_LOONGSON64)        = loongson-2k0500-ref.dtb
+
 obj-$(CONFIG_BUILTIN_DTB)    += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))
arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +12 -0
new file mode 100644
index 000000000000..52483127a419
@@ -0,0 +1,89 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2023 Loongson Technology Corporation Limited
+ */
+
+/dts-v1/;
+
+#include "loongson-2k0500.dtsi"
+
+/ {
+     compatible = "loongson,ls2k0500-ref", "loongson,ls2k0500";
+     model = "Loongson-2K0500 Reference Board";

arch/loongarch/boot/dts/loongson-2k0500-ref.dts line 22

Quoted 10 lines
arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +10 -0
+
+     aliases {
+             ethernet0 = &gmac0;
+             ethernet1 = &gmac1;
+             serial0 = &uart0;
+     };
+
+     chosen {
+             stdout-path = "serial0:115200n8";
+             bootargs = "console=ttyS0,115200";

You received here comments already:
https://lore.kernel.org/all/[email protected]/

Quoted 3 lines

Don't waste our time to re-review the same mistakes over and over again.

Hi Krzysztof:

I am sorry for this, I misunderstood before that earlycon is not allowed. BTW, is there a note about not using the bootargs attribute? I didn't find it in the Documentation.

Quoted 12 lines

...

Quoted 9 lines
arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +9 -0
+
+             i2c@1ff4a800 {
+                     compatible = "loongson,ls2k-i2c";
+                     reg = <0x0 0x1ff4a800 0x0 0x0800>;
+                     interrupt-parent = <&eiointc>;
+                     interrupts = <19>;
+                     status = "disabled";
+             };
+
Quoted 8 lines

arch/loongarch/boot/dts/loongson-2k0500-ref.dts

Quoted 2 lines
arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +2 -0
+             pmc: power-management@1ff6c000 {
+                     compatible = "loongson,ls2k0500-pmc", "syscon";

It does not look like you tested the DTS against bindings. Please run make dtbs_check W=1 (see Documentation/devicetree/bindings/writing-schema.rst or
https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
for instructions).

Emm...
Here is the compatible description from the latest kernel:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/soc/loongson/loongson,ls2k-pmc.yaml#n13

I think this compatible should be fine, also, I ensure that make dtbs_check W=1 is fine before committing.

Thanks.
Binbin

Quoted 15 lines

Or you did not test your DTS on the hardware.

arch/loongarch/boot/dts/loongson-2k0500-ref.dts

Quoted 6 lines
arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +6 -0
+                     reg = <0x0 0x1ff6c000 0x0 0x58>;
+                     interrupt-parent = <&eiointc>;
+                     interrupts = <56>;
+                     loongson,suspend-address = <0x0 0x1c000500>;
+
+                     syscon-reboot {

Best regards,
Krzysztof

#7 lore raw

Re: [PATCH v5 4/7] LoongArch: dts: DeviceTree for Loongson-2K0500

Quoted 58 lines · Binbin Zhou
Quoted 56 lines · Krzysztof Kozlowski
Quoted 40 lines · Binbin Zhou

Add DeviceTree file for Loongson-2K0500 processor, which integrates one 64-bit dual emission superscalar LA264 processor core.

---
 arch/loongarch/boot/dts/Makefile              |   2 +
 .../boot/dts/loongson-2k0500-ref.dts          |  89 ++++++
 arch/loongarch/boot/dts/loongson-2k0500.dtsi  | 274 ++++++++++++++++++
 3 files changed, 365 insertions(+)
 create mode 100644 arch/loongarch/boot/dts/loongson-2k0500-ref.dts
 create mode 100644 arch/loongarch/boot/dts/loongson-2k0500.dtsi
arch/loongarch/boot/dts/Makefile +2 -0
index 1e24cdb5180a..aa0b21d73d4e 100644
@@ -1,3 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0-only
 
+dtb-$(CONFIG_MACH_LOONGSON64)        = loongson-2k0500-ref.dtb
+
 obj-$(CONFIG_BUILTIN_DTB)    += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))
arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +12 -0
new file mode 100644
index 000000000000..52483127a419
@@ -0,0 +1,89 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2023 Loongson Technology Corporation Limited
+ */
+
+/dts-v1/;
+
+#include "loongson-2k0500.dtsi"
+
+/ {
+     compatible = "loongson,ls2k0500-ref", "loongson,ls2k0500";
+     model = "Loongson-2K0500 Reference Board";

arch/loongarch/boot/dts/loongson-2k0500-ref.dts line 22

Quoted 10 lines
arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +10 -0
+
+     aliases {
+             ethernet0 = &gmac0;
+             ethernet1 = &gmac1;
+             serial0 = &uart0;
+     };
+
+     chosen {
+             stdout-path = "serial0:115200n8";
+             bootargs = "console=ttyS0,115200";

You received here comments already:
https://lore.kernel.org/all/[email protected]/

Quoted 8 lines
Quoted 3 lines

Don't waste our time to re-review the same mistakes over and over again.

Hi Krzysztof:

I am sorry for this, I misunderstood before that earlycon is not allowed. BTW, is there a note about not using the bootargs attribute? I didn't find it in the Documentation.

This is a common sense, not a "note". If you think otherwise, please provide me the reasons why duplicated information is necessary in this particular case.

Quoted 22 lines
Quoted 13 lines

...

Quoted 9 lines
arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +9 -0
+
+             i2c@1ff4a800 {
+                     compatible = "loongson,ls2k-i2c";
+                     reg = <0x0 0x1ff4a800 0x0 0x0800>;
+                     interrupt-parent = <&eiointc>;
+                     interrupts = <19>;
+                     status = "disabled";
+             };
+
Quoted 8 lines

arch/loongarch/boot/dts/loongson-2k0500-ref.dts

Quoted 2 lines
arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +2 -0
+             pmc: power-management@1ff6c000 {
+                     compatible = "loongson,ls2k0500-pmc", "syscon";

It does not look like you tested the DTS against bindings. Please run make dtbs_check W=1 (see Documentation/devicetree/bindings/writing-schema.rst or
https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
for instructions).

Quoted 6 lines

Emm...
Here is the compatible description from the latest kernel:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/soc/loongson/loongson,ls2k-pmc.yaml#n13

I think this compatible should be fine, also, I ensure that make dtbs_check W=1 is fine before committing.

Hm, that's fine then.

Best regards,
Krzysztof

#8 lore raw

Re: [PATCH v5 4/7] LoongArch: dts: DeviceTree for Loongson-2K0500

Quoted 65 lines · Krzysztof Kozlowski
Quoted 63 lines · Binbin Zhou
Quoted 56 lines · Krzysztof Kozlowski
Quoted 40 lines · Binbin Zhou

Add DeviceTree file for Loongson-2K0500 processor, which integrates one 64-bit dual emission superscalar LA264 processor core.

---
 arch/loongarch/boot/dts/Makefile              |   2 +
 .../boot/dts/loongson-2k0500-ref.dts          |  89 ++++++
 arch/loongarch/boot/dts/loongson-2k0500.dtsi  | 274 ++++++++++++++++++
 3 files changed, 365 insertions(+)
 create mode 100644 arch/loongarch/boot/dts/loongson-2k0500-ref.dts
 create mode 100644 arch/loongarch/boot/dts/loongson-2k0500.dtsi
arch/loongarch/boot/dts/Makefile +2 -0
index 1e24cdb5180a..aa0b21d73d4e 100644
@@ -1,3 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0-only
 
+dtb-$(CONFIG_MACH_LOONGSON64)        = loongson-2k0500-ref.dtb
+
 obj-$(CONFIG_BUILTIN_DTB)    += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))
arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +12 -0
new file mode 100644
index 000000000000..52483127a419
@@ -0,0 +1,89 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2023 Loongson Technology Corporation Limited
+ */
+
+/dts-v1/;
+
+#include "loongson-2k0500.dtsi"
+
+/ {
+     compatible = "loongson,ls2k0500-ref", "loongson,ls2k0500";
+     model = "Loongson-2K0500 Reference Board";

arch/loongarch/boot/dts/loongson-2k0500-ref.dts line 22

Quoted 10 lines
arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +10 -0
+
+     aliases {
+             ethernet0 = &gmac0;
+             ethernet1 = &gmac1;
+             serial0 = &uart0;
+     };
+
+     chosen {
+             stdout-path = "serial0:115200n8";
+             bootargs = "console=ttyS0,115200";

You received here comments already:
https://lore.kernel.org/all/[email protected]/

Quoted 3 lines

Don't waste our time to re-review the same mistakes over and over again.

Hi Krzysztof:

Quoted 8 lines
Quoted 3 lines

I am sorry for this, I misunderstood before that earlycon is not allowed. BTW, is there a note about not using the bootargs attribute? I didn't find it in the Documentation.

This is a common sense, not a "note". If you think otherwise, please provide me the reasons why duplicated information is necessary in this particular case.

Hi Krzysztof:

I checked the relevant code and the console parameter is already in the stdout-path property. Sorry I didn't get the logic here before, thanks for pointing it out.
The previous attempt to leave it because it would affect the boot cmdline proved not to be the right way to do it, so we fixed it some other way.
Anyway, I'll fix it in the next patch set.

Thanks.
Binbin

Quoted 34 lines
Quoted 22 lines
Quoted 13 lines

...

Quoted 9 lines
arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +9 -0
+
+             i2c@1ff4a800 {
+                     compatible = "loongson,ls2k-i2c";
+                     reg = <0x0 0x1ff4a800 0x0 0x0800>;
+                     interrupt-parent = <&eiointc>;
+                     interrupts = <19>;
+                     status = "disabled";
+             };
+
Quoted 8 lines

arch/loongarch/boot/dts/loongson-2k0500-ref.dts

Quoted 2 lines
arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +2 -0
+             pmc: power-management@1ff6c000 {
+                     compatible = "loongson,ls2k0500-pmc", "syscon";

It does not look like you tested the DTS against bindings. Please run make dtbs_check W=1 (see Documentation/devicetree/bindings/writing-schema.rst or
https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
for instructions).

Quoted 6 lines

Emm...
Here is the compatible description from the latest kernel:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/soc/loongson/loongson,ls2k-pmc.yaml#n13

I think this compatible should be fine, also, I ensure that make dtbs_check W=1 is fine before committing.

Hm, that's fine then.

Best regards,
Krzysztof

#9 lore raw

Re: [PATCH v5 4/7] LoongArch: dts: DeviceTree for Loongson-2K0500

In reply to Binbin Zhou
Quoted 20 lines · Binbin Zhou
arch/loongarch/boot/dts/loongson-2k0500.dtsi new file +14 -0
new file mode 100644
index 000000000000..1dcb6a20fc6c
@@ -0,0 +1,274 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2023 Loongson Technology Corporation Limited
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	cpus {

arch/loongarch/boot/dts/loongson-2k0500.dtsi line 24

Quoted 10 lines
arch/loongarch/boot/dts/loongson-2k0500.dtsi new file +10 -0
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu-map {
+			cluster0 {
+				core0 {
+					cpu = <&cpu0>;
+				};
+			};
+		};

You have only one CPU, this should not be needed.

arch/loongarch/boot/dts/loongson-2k0500.dtsi line 30

Quoted 6 lines
arch/loongarch/boot/dts/loongson-2k0500.dtsi new file +6 -0
+
+		cpu0: cpu@0 {
+			compatible = "loongson,la264";
+			device_type = "cpu";
+			reg = <0x0>;
+			clocks = <&cpu_clk>;

Is this actually a complete description of the cpu? Are there i/d caches etc?

Cheers,
Conor.

#10 lore raw

Re: [PATCH v5 4/7] LoongArch: dts: DeviceTree for Loongson-2K0500

Hi Conor:

Quoted 26 lines · Conor Dooley
Quoted 24 lines · Binbin Zhou
arch/loongarch/boot/dts/loongson-2k0500.dtsi new file +18 -0
new file mode 100644
index 000000000000..1dcb6a20fc6c
@@ -0,0 +1,274 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2023 Loongson Technology Corporation Limited
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+     #address-cells = <2>;
+     #size-cells = <2>;
+
+     cpus {
+             #address-cells = <1>;
+             #size-cells = <0>;
+
+             cpu-map {
Quoted 8 lines

arch/loongarch/boot/dts/loongson-2k0500.dtsi line 24

Quoted 6 lines
arch/loongarch/boot/dts/loongson-2k0500.dtsi new file +6 -0
+                     cluster0 {
+                             core0 {
+                                     cpu = <&cpu0>;
+                             };
+                     };
+             };

You have only one CPU, this should not be needed.

OK!

Quoted 10 lines

arch/loongarch/boot/dts/loongson-2k0500.dtsi line 30

Quoted 7 lines
arch/loongarch/boot/dts/loongson-2k0500.dtsi new file +6 -0
+
+             cpu0: cpu@0 {
+                     compatible = "loongson,la264";
+                     device_type = "cpu";
+                     reg = <0x0>;
+                     clocks = <&cpu_clk>;

Is this actually a complete description of the cpu? Are there i/d caches etc?

The cpu i/d caches are present, but the architecture gets the values through a particular instruction (cpucfg). So I didn't describe it here.

Thanks.
Binbin

Quoted 3 lines

Cheers,
Conor.

#11 lore raw

PATCH v5 5/7 LoongArch: dts: DeviceTree for Loongson-2K1000

In reply to Binbin Zhou

Add DeviceTree file for Loongson-2K1000 processor, which integrates two 64-bit dual emission superscalar LA264 processor cores.

---
 arch/loongarch/boot/dts/Makefile              |   3 +-
 .../boot/dts/loongson-2k1000-ref.dts          | 184 +++++++
 arch/loongarch/boot/dts/loongson-2k1000.dtsi  | 453 ++++++++++++++++++
 3 files changed, 639 insertions(+), 1 deletion(-)
 create mode 100644 arch/loongarch/boot/dts/loongson-2k1000-ref.dts
 create mode 100644 arch/loongarch/boot/dts/loongson-2k1000.dtsi
arch/loongarch/boot/dts/Makefile +2 -1
index aa0b21d73d4e..dc0782315bed 100644
@@ -1,5 +1,6 @@
 # SPDX-License-Identifier: GPL-2.0-only
 
-dtb-$(CONFIG_MACH_LOONGSON64)	= loongson-2k0500-ref.dtb
+dtb-$(CONFIG_MACH_LOONGSON64)	= loongson-2k0500-ref.dtb \
+				  loongson-2k1000-ref.dtb
 
 obj-$(CONFIG_BUILTIN_DTB)	+= $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))
arch/loongarch/boot/dts/loongson-2k1000-ref.dts new file +184 -0

184 lines not on this page · raw message

arch/loongarch/boot/dts/loongson-2k1000.dtsi new file +453 -0

453 lines not on this page · raw message

Signature · 1 line
2.39.3
#12 lore raw

Re: [PATCH v5 5/7] LoongArch: dts: DeviceTree for Loongson-2K1000

Quoted 40 lines · Binbin Zhou

Add DeviceTree file for Loongson-2K1000 processor, which integrates two 64-bit dual emission superscalar LA264 processor cores.

---
 arch/loongarch/boot/dts/Makefile              |   3 +-
 .../boot/dts/loongson-2k1000-ref.dts          | 184 +++++++
 arch/loongarch/boot/dts/loongson-2k1000.dtsi  | 453 ++++++++++++++++++
 3 files changed, 639 insertions(+), 1 deletion(-)
 create mode 100644 arch/loongarch/boot/dts/loongson-2k1000-ref.dts
 create mode 100644 arch/loongarch/boot/dts/loongson-2k1000.dtsi
arch/loongarch/boot/dts/Makefile +2 -1
index aa0b21d73d4e..dc0782315bed 100644
@@ -1,5 +1,6 @@
 # SPDX-License-Identifier: GPL-2.0-only
 
-dtb-$(CONFIG_MACH_LOONGSON64)	= loongson-2k0500-ref.dtb
+dtb-$(CONFIG_MACH_LOONGSON64)	= loongson-2k0500-ref.dtb \
+				  loongson-2k1000-ref.dtb
 
 obj-$(CONFIG_BUILTIN_DTB)	+= $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))
arch/loongarch/boot/dts/loongson-2k1000-ref.dts new file +10 -0
new file mode 100644
index 000000000000..95346bcbea71
@@ -0,0 +1,184 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2023 Loongson Technology Corporation Limited
+ */
+
+/dts-v1/;
+
+#include "loongson-2k1000.dtsi"
+
+/ {

arch/loongarch/boot/dts/loongson-2k1000-ref.dts line 20

Quoted 10 lines
arch/loongarch/boot/dts/loongson-2k1000-ref.dts new file +10 -0
+	compatible = "loongson,ls2k1000-ref", "loongson,ls2k1000";
+	model = "Loongson-2K1000 Reference Board";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+		bootargs = "console=ttyS0,115200";

NAK. Don't ignore the review.

Best regards,
Krzysztof

#13 lore raw

Re: [PATCH v5 5/7] LoongArch: dts: DeviceTree for Loongson-2K1000

In reply to Binbin Zhou
Quoted 23 lines · Binbin Zhou
arch/loongarch/boot/dts/loongson-2k1000.dtsi new file +23 -0
+/ {
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu-map {
+			cluster0 {
+				core0 {
+					cpu = <&cpu0>;
+				};
+				core1 {
+					cpu = <&cpu1>;
+				};
+			};
+		};
+
+		cpu0: cpu@0 {
+			compatible = "loongson,la264";
+			device_type = "cpu";
+			reg= <0x0>;

arch/loongarch/boot/dts/loongson-2k1000.dtsi line 44

Quoted 10 lines
arch/loongarch/boot/dts/loongson-2k1000.dtsi new file +10 -0
+			clocks = <&clk LOONGSON2_NODE_CLK>;
+		};
+
+		cpu1: cpu@1 {
+			compatible = "loongson,la264";
+			device_type = "cpu";
+			reg = <0x1>;
+			clocks = <&clk LOONGSON2_NODE_CLK>;
+		};
+	};

Even with 2 CPUs, the cpu-map should not really be needed. The generic topology code that is used by riscv and arm64 should be able to determine that these two cpus are in the same cluster (See CONFIG_GENERIC_ARCH_TOPOLOGY) provided you populate the next level cache in the cpu devicetree nodes. As with the ls2k0500, you have no i, d or next level cache information in these nodes, which I suspect your hardware actually has?

I wired this generic "fallback" code up for riscv in this series here:
https://lore.kernel.org/all/[email protected]/

Cheers,
Conor.

#14 lore raw

PATCH v5 6/7 LoongArch: dts: DeviceTree for Loongson-2K2000

In reply to Binbin Zhou

Add DeviceTree file for Loongson-2K2000 processor, which integrates two 64-bit triple emission superscalar LA364 processor cores.

---
 arch/loongarch/boot/dts/Makefile              |   3 +-
 .../boot/dts/loongson-2k2000-ref.dts          |  73 ++++
 arch/loongarch/boot/dts/loongson-2k2000.dtsi  | 311 ++++++++++++++++++
 3 files changed, 386 insertions(+), 1 deletion(-)
 create mode 100644 arch/loongarch/boot/dts/loongson-2k2000-ref.dts
 create mode 100644 arch/loongarch/boot/dts/loongson-2k2000.dtsi
arch/loongarch/boot/dts/Makefile +2 -1
index dc0782315bed..c019d6676f7e 100644
@@ -1,6 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0-only
 
 dtb-$(CONFIG_MACH_LOONGSON64)	= loongson-2k0500-ref.dtb \
-				  loongson-2k1000-ref.dtb
+				  loongson-2k1000-ref.dtb \
+				  loongson-2k2000-ref.dtb
 
 obj-$(CONFIG_BUILTIN_DTB)	+= $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))
arch/loongarch/boot/dts/loongson-2k2000-ref.dts new file +73 -0

73 lines not on this page · raw message

arch/loongarch/boot/dts/loongson-2k2000.dtsi new file +311 -0

311 lines not on this page · raw message

Signature · 1 line
2.39.3
#15 lore raw

Re: [PATCH v5 6/7] LoongArch: dts: DeviceTree for Loongson-2K2000

Quoted 41 lines · Binbin Zhou

Add DeviceTree file for Loongson-2K2000 processor, which integrates two 64-bit triple emission superscalar LA364 processor cores.

---
 arch/loongarch/boot/dts/Makefile              |   3 +-
 .../boot/dts/loongson-2k2000-ref.dts          |  73 ++++
 arch/loongarch/boot/dts/loongson-2k2000.dtsi  | 311 ++++++++++++++++++
 3 files changed, 386 insertions(+), 1 deletion(-)
 create mode 100644 arch/loongarch/boot/dts/loongson-2k2000-ref.dts
 create mode 100644 arch/loongarch/boot/dts/loongson-2k2000.dtsi
arch/loongarch/boot/dts/Makefile +2 -1
index dc0782315bed..c019d6676f7e 100644
@@ -1,6 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0-only
 
 dtb-$(CONFIG_MACH_LOONGSON64)	= loongson-2k0500-ref.dtb \
-				  loongson-2k1000-ref.dtb
+				  loongson-2k1000-ref.dtb \
+				  loongson-2k2000-ref.dtb
 
 obj-$(CONFIG_BUILTIN_DTB)	+= $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))
arch/loongarch/boot/dts/loongson-2k2000-ref.dts new file +10 -0
new file mode 100644
index 000000000000..ac6b370800fa
@@ -0,0 +1,73 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2023 Loongson Technology Corporation Limited
+ */
+
+/dts-v1/;
+
+#include "loongson-2k2000.dtsi"
+
+/ {

arch/loongarch/boot/dts/loongson-2k2000-ref.dts line 20

Quoted 10 lines
arch/loongarch/boot/dts/loongson-2k2000-ref.dts new file +10 -0
+	compatible = "loongson,ls2k2000-ref", "loongson,ls2k2000";
+	model = "Loongson-2K2000 Reference Board";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+		bootargs = "console=ttyS0,115200";

Nope.

Best regards,
Krzysztof

#16 lore raw

PATCH v5 7/7 LoongArch: Parsing CPU-related information from DTS

In reply to Binbin Zhou

Generally, we can get cpu-related information, such as model name, from /proc/cpuinfo. for DT-based systems, we need to parse the relevant information from DTS.

---
 arch/loongarch/kernel/env.c | 34 +++++++++++++++++++++++++++++++++-
 1 file changed, 33 insertions(+), 1 deletion(-)
arch/loongarch/kernel/env.c +33 -1
index 6b3bfb0092e6..3264b2f07388 100644
@@ -5,13 +5,16 @@
  * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
  */
 #include <linux/acpi.h>
+#include <linux/clk.h>
 #include <linux/efi.h>
 #include <linux/export.h>
 #include <linux/memblock.h>
+#include <linux/of_clk.h>
 #include <asm/early_ioremap.h>
 #include <asm/bootinfo.h>
 #include <asm/loongson.h>
 #include <asm/setup.h>
+#include <asm/time.h>
 
 u64 efi_system_table;
 struct loongson_system_configuration loongson_sysconf;
@@ -34,9 +37,38 @@ void __init init_environ(void)
 	efi_system_table = fw_arg2;
 }
 
+static int __init fdt_cpu_clk_init(void)
+{
+	struct clk *clk;
+	struct device_node *np;
+
+	np = of_get_cpu_node(0, NULL);
+	if (!np)
+		return -ENODEV;
+
+	clk = of_clk_get(np, 0);
+	if (IS_ERR(clk))
+		return -ENODEV;
+
+	cpu_clock_freq = clk_get_rate(clk);
+	clk_put(clk);
+
+	return 0;
+}
+late_initcall(fdt_cpu_clk_init);
+
 static int __init init_cpu_fullname(void)
 {
-	int cpu;
+	struct device_node *root;
+	int cpu, ret;
+	char *model;
+
+	/* Parsing cpuname from DTS model property */
+	root = of_find_node_by_path("/");
+	ret = of_property_read_string(root, "model", (const char **)&model);
+	of_node_put(root);
+	if (!ret)
+		loongson_sysconf.cpuname = strsep(&model, " ");
 
 	if (loongson_sysconf.cpuname && !strncmp(loongson_sysconf.cpuname, "Loongson", 8)) {
 		for (cpu = 0; cpu < NR_CPUS; cpu++)
Signature · 1 line
2.39.3