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usb: dwc3: Revert host soft-reset changes

PATCH New Thinh Nguyen 1 participant 3 messages Dec 22, 2023

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Stable branch USB DesignWare USB3 DRD IP driver
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Thinh Nguyen

author maintainer
#0 lore raw

cover usb: dwc3: Revert host soft-reset changes

There are regression reports of soft-reset issue due to the recent changes. Revert them as they are incomplete/incorrect fix [*].

[*] https://lore.kernel.org/linux-usb/ZW8sJoTEKVmDdk5Y@xhacker/

Thinh Nguyen (2):
Revert "usb: dwc3: Soft reset phy on probe for host"
Revert "usb: dwc3: don't reset device side if dwc3 was configured as host-only"

 drivers/usb/dwc3/core.c | 39 +--------------------------------------
 1 file changed, 1 insertion(+), 38 deletions(-)

base-commit: ab241a0ab5abd70036c3d959146e534a02447d17

Signature · 1 line
2.28.0
author maintainer
#1 lore raw

PATCH 1/2 Revert "usb: dwc3: Soft reset phy on probe for host"

This reverts commit 8bea147dfdf823eaa8d3baeccc7aeb041b41944b.

The phy soft reset GUSB2PHYCFG.PHYSOFTRST only applies to UTMI phy, not ULPI. This fix is incomplete.

Cc [email protected]
Fixes 8bea147dfdf8 ("usb: dwc3: Soft reset phy on probe for host")
Reported-by Köry Maincent <[email protected]>
Closes https://lore.kernel.org/linux-usb/20231205151959.5236c231@kmaincent-XPS-13-7390 open here
Signed-off-by Thinh Nguyen <[email protected]>
---
 drivers/usb/dwc3/core.c | 39 +--------------------------------------
 1 file changed, 1 insertion(+), 38 deletions(-)
drivers/usb/dwc3/core.c +1 -38
index b101dbf8c5dc..832c41fec4f7 100644
@@ -279,46 +279,9 @@ int dwc3_core_soft_reset(struct dwc3 *dwc)
 	 * XHCI driver will reset the host block. If dwc3 was configured for
 	 * host-only mode or current role is host, then we can return early.
 	 */
-	if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST)
+	if (dwc->dr_mode == USB_DR_MODE_HOST || dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST)
 		return 0;
 
-	/*
-	 * If the dr_mode is host and the dwc->current_dr_role is not the
-	 * corresponding DWC3_GCTL_PRTCAP_HOST, then the dwc3_core_init_mode
-	 * isn't executed yet. Ensure the phy is ready before the controller
-	 * updates the GCTL.PRTCAPDIR or other settings by soft-resetting
-	 * the phy.
-	 *
-	 * Note: GUSB3PIPECTL[n] and GUSB2PHYCFG[n] are port settings where n
-	 * is port index. If this is a multiport host, then we need to reset
-	 * all active ports.
-	 */
-	if (dwc->dr_mode == USB_DR_MODE_HOST) {
-		u32 usb3_port;
-		u32 usb2_port;
-
-		usb3_port = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
-		usb3_port |= DWC3_GUSB3PIPECTL_PHYSOFTRST;
-		dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), usb3_port);
-
-		usb2_port = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
-		usb2_port |= DWC3_GUSB2PHYCFG_PHYSOFTRST;
-		dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), usb2_port);
-
-		/* Small delay for phy reset assertion */
-		usleep_range(1000, 2000);
-
-		usb3_port &= ~DWC3_GUSB3PIPECTL_PHYSOFTRST;
-		dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), usb3_port);
-
-		usb2_port &= ~DWC3_GUSB2PHYCFG_PHYSOFTRST;
-		dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), usb2_port);
-
-		/* Wait for clock synchronization */
-		msleep(50);
-		return 0;
-	}
-
 	reg = dwc3_readl(dwc->regs, DWC3_DCTL);
 	reg |= DWC3_DCTL_CSFTRST;
 	reg &= ~DWC3_DCTL_RUN_STOP;
Signature · 1 line
2.28.0
author maintainer
#2 lore raw

PATCH 2/2 Revert "usb: dwc3: don't reset device side if dwc3 was configured as host-only"

In reply to Thinh Nguyen

This reverts commit e835c0a4e23c38531dcee5ef77e8d1cf462658c7.

Don't omit soft-reset. During initialization, the driver may need to perform a soft reset to ensure the phy is ready when the controller updates the GCTL.PRTCAPDIR or other settings by issuing phy soft-reset. Many platforms often have access to DCTL register for soft-reset despite being host-only. If there are actual reported issues from the platforms that don't expose DCTL registers, then we will need to revisit (perhaps to teach dwc3 to perform xhci's soft-reset USBCMD.HCRST).

Cc [email protected]
Fixes e835c0a4e23c ("usb: dwc3: don't reset device side if dwc3 was configured as host-only")
Signed-off-by Thinh Nguyen <[email protected]>
---
 drivers/usb/dwc3/core.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/usb/dwc3/core.c +2 -2
index 832c41fec4f7..f50b5575d588 100644
@@ -277,9 +277,9 @@ int dwc3_core_soft_reset(struct dwc3 *dwc)
 	/*
 	 * We're resetting only the device side because, if we're in host mode,
 	 * XHCI driver will reset the host block. If dwc3 was configured for
-	 * host-only mode or current role is host, then we can return early.
+	 * host-only mode, then we can return early.
 	 */
-	if (dwc->dr_mode == USB_DR_MODE_HOST || dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST)
+	if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST)
 		return 0;
 
 	reg = dwc3_readl(dwc->regs, DWC3_DCTL);
Signature · 1 line
2.28.0