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Cleanup Spreadtum/Unisoc ARM64 DT

PATCH Applied Stanislav Jakubek 3 participants 6 messages Jul 4, 2024 – Aug 12, 2024

Subsystems (2)
Device tree bindings Arm/spreadtrum SoC support

v1 of 2 Applied Latest is v2 →

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Stanislav Jakubek

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#0 lore raw

cover Cleanup Spreadtum/Unisoc ARM64 DT

This series contains various minor cleanups for Spreadtum/Unisoc ARM64 DeviceTrees.

Stanislav Jakubek (3):
arm64: dts: sprd: rename SDHCI nodes to mmc
arm64: dts: sprd: reorder clock-names after clocks
arm64: dts: sprd: move/add SPDX license to top of the file

 arch/arm64/boot/dts/sprd/sc2731.dtsi          |  3 +-
 arch/arm64/boot/dts/sprd/sc9836-openphone.dts |  3 +-
 arch/arm64/boot/dts/sprd/sc9836.dtsi          |  3 +-
 arch/arm64/boot/dts/sprd/sc9860.dtsi          |  3 +-
 arch/arm64/boot/dts/sprd/sc9863a.dtsi         |  8 ++--
 arch/arm64/boot/dts/sprd/sharkl64.dtsi        |  3 +-
 arch/arm64/boot/dts/sprd/sp9860g-1h10.dts     |  3 +-
 arch/arm64/boot/dts/sprd/ums512.dtsi          |  4 +-
 arch/arm64/boot/dts/sprd/whale2.dtsi          | 43 ++++++++++---------
 9 files changed, 35 insertions(+), 38 deletions(-)
Signature · 1 line
2.34.1
author
#1 lore raw

PATCH 1/3 arm64: dts: sprd: rename SDHCI nodes to mmc

DT bindings expect SDHCI/MMC nodes to be called 'mmc', rename them.

Signed-off-by Stanislav Jakubek <[email protected]>
---
 arch/arm64/boot/dts/sprd/sc9863a.dtsi | 4 ++--
 arch/arm64/boot/dts/sprd/whale2.dtsi  | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)
arch/arm64/boot/dts/sprd/sc9863a.dtsi +2 -2
index 53e5b77d70b5..a7b897966882 100644
@@ -551,7 +551,7 @@ ap-ahb {
 			#size-cells = <2>;
 			ranges;
 
-			sdio0: sdio@20300000 {
+			sdio0: mmc@20300000 {
 				compatible = "sprd,sdhci-r11";
 				reg = <0 0x20300000 0 0x1000>;
 				interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;

@@ -567,7 +567,7 @@ sdio0: sdio@20300000 {
 				no-mmc;
 			};
 
-			sdio3: sdio@20600000 {
+			sdio3: mmc@20600000 {
 				compatible = "sprd,sdhci-r11";
 				reg = <0 0x20600000 0 0x1000>;
 				interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
arch/arm64/boot/dts/sprd/whale2.dtsi +1 -1
index 7068bfd2f4c3..cdf52fd78ee4 100644
@@ -133,7 +133,7 @@ ap_dma: dma-controller@20100000 {
 				clocks = <&apahb_gate CLK_DMA_EB>;
 			};
 
-			sdio3: sdio@50430000 {
+			sdio3: mmc@50430000 {
 				compatible = "sprd,sdhci-r11";
 				reg = <0 0x50430000 0 0x1000>;
 				interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
Signature · 1 line
2.34.1
author
#2 lore raw

PATCH 2/3 arm64: dts: sprd: reorder clock-names after clocks

In reply to Stanislav Jakubek

DT convention is to have property-names after property. While at it, cleanup indentation for some clocks. No functional change.

Signed-off-by Stanislav Jakubek <[email protected]>
---
 arch/arm64/boot/dts/sprd/sc9863a.dtsi |  4 +--
 arch/arm64/boot/dts/sprd/ums512.dtsi  |  4 +--
 arch/arm64/boot/dts/sprd/whale2.dtsi  | 38 +++++++++++++++------------
 3 files changed, 25 insertions(+), 21 deletions(-)
arch/arm64/boot/dts/sprd/sc9863a.dtsi +2 -2
index a7b897966882..e5a2857721e2 100644
@@ -556,9 +556,9 @@ sdio0: mmc@20300000 {
 				reg = <0 0x20300000 0 0x1000>;
 				interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
 
-				clock-names = "sdio", "enable";
 				clocks = <&aon_clk CLK_SDIO0_2X>,
 					 <&apahb_gate CLK_SDIO0_EB>;
+				clock-names = "sdio", "enable";
 				assigned-clocks = <&aon_clk CLK_SDIO0_2X>;
 				assigned-clock-parents = <&rpll CLK_RPLL_390M>;
 

@@ -572,9 +572,9 @@ sdio3: mmc@20600000 {
 				reg = <0 0x20600000 0 0x1000>;
 				interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
 
-				clock-names = "sdio", "enable";
 				clocks = <&aon_clk CLK_EMMC_2X>,
 					 <&apahb_gate CLK_EMMC_EB>;
+				clock-names = "sdio", "enable";
 				assigned-clocks = <&aon_clk CLK_EMMC_2X>;
 				assigned-clock-parents = <&rpll CLK_RPLL_390M>;
arch/arm64/boot/dts/sprd/ums512.dtsi +2 -2
index 4c080df48724..efa14309cc4e 100644
@@ -849,9 +849,9 @@ sdio0: mmc@1100000 {
 				compatible = "sprd,sdhci-r11";
 				reg = <0x1100000 0x1000>;
 				interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
-				clock-names = "sdio", "enable";
 				clocks = <&ap_clk CLK_SDIO0_2X>,
 					 <&apapb_gate CLK_SDIO0_EB>;
+				clock-names = "sdio", "enable";
 				assigned-clocks = <&ap_clk CLK_SDIO0_2X>;
 				assigned-clock-parents = <&pll1 CLK_RPLL>;
 				status = "disabled";

@@ -861,9 +861,9 @@ sdio3: mmc@1400000 {
 				compatible = "sprd,sdhci-r11";
 				reg = <0x1400000 0x1000>;
 				interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
-				clock-names = "sdio", "enable";
 				clocks = <&ap_clk CLK_EMMC_2X>,
 					 <&apapb_gate CLK_EMMC_EB>;
+				clock-names = "sdio", "enable";
 				assigned-clocks = <&ap_clk CLK_EMMC_2X>;
 				assigned-clock-parents = <&pll1 CLK_RPLL>;
 				status = "disabled";
arch/arm64/boot/dts/sprd/whale2.dtsi +21 -17
index cdf52fd78ee4..a28f995fb3ff 100644
@@ -75,9 +75,10 @@ uart0: serial@0 {
 					     "sprd,sc9836-uart";
 				reg = <0x0 0x100>;
 				interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
-				clock-names = "enable", "uart", "source";
 				clocks = <&apapb_gate CLK_UART0_EB>,
-				       <&ap_clk CLK_UART0>, <&ext_26m>;
+					 <&ap_clk CLK_UART0>,
+					 <&ext_26m>;
+				clock-names = "enable", "uart", "source";
 				status = "disabled";
 			};
 

@@ -86,9 +87,10 @@ uart1: serial@100000 {
 					     "sprd,sc9836-uart";
 				reg = <0x100000 0x100>;
 				interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
-				clock-names = "enable", "uart", "source";
 				clocks = <&apapb_gate CLK_UART1_EB>,
-				       <&ap_clk CLK_UART1>, <&ext_26m>;
+					 <&ap_clk CLK_UART1>,
+					 <&ext_26m>;
+				clock-names = "enable", "uart", "source";
 				status = "disabled";
 			};
 

@@ -97,9 +99,10 @@ uart2: serial@200000 {
 					     "sprd,sc9836-uart";
 				reg = <0x200000 0x100>;
 				interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
-				clock-names = "enable", "uart", "source";
 				clocks = <&apapb_gate CLK_UART2_EB>,
-				       <&ap_clk CLK_UART2>, <&ext_26m>;
+					 <&ap_clk CLK_UART2>,
+					 <&ext_26m>;
+				clock-names = "enable", "uart", "source";
 				status = "disabled";
 			};
 

@@ -108,9 +111,10 @@ uart3: serial@300000 {
 					     "sprd,sc9836-uart";
 				reg = <0x300000 0x100>;
 				interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
-				clock-names = "enable", "uart", "source";
 				clocks = <&apapb_gate CLK_UART3_EB>,
-				       <&ap_clk CLK_UART3>, <&ext_26m>;
+					 <&ap_clk CLK_UART3>,
+					 <&ext_26m>;
+				clock-names = "enable", "uart", "source";
 				status = "disabled";
 			};
 		};

@@ -129,8 +133,8 @@ ap_dma: dma-controller@20100000 {
 				/* For backwards compatibility: */
 				#dma-channels = <32>;
 				dma-channels = <32>;
-				clock-names = "enable";
 				clocks = <&apahb_gate CLK_DMA_EB>;
+				clock-names = "enable";
 			};
 
 			sdio3: mmc@50430000 {

@@ -138,10 +142,10 @@ sdio3: mmc@50430000 {
 				reg = <0 0x50430000 0 0x1000>;
 				interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
 
-				clock-names = "sdio", "enable", "2x_enable";
 				clocks = <&aon_prediv CLK_EMMC_2X>,
-				       <&apahb_gate CLK_EMMC_EB>,
-				       <&aon_gate CLK_EMMC_2X_EN>;
+					 <&apahb_gate CLK_EMMC_EB>,
+					 <&aon_gate CLK_EMMC_2X_EN>;
+				clock-names = "sdio", "enable", "2x_enable";
 				assigned-clocks = <&aon_prediv CLK_EMMC_2X>;
 				assigned-clock-parents = <&clk_l0_409m6>;
 

@@ -194,8 +198,8 @@ hwlock: hwspinlock@40500000 {
 				compatible = "sprd,hwspinlock-r3p0";
 				reg = <0 0x40500000 0 0x1000>;
 				#hwlock-cells = <1>;
-				clock-names = "enable";
 				clocks = <&aon_gate CLK_SPLK_EB>;
+				clock-names = "enable";
 			};
 
 			eic_debounce: gpio@40210000 {

@@ -258,9 +262,9 @@ watchdog@40310000 {
 				reg = <0 0x40310000 0 0x1000>;
 				interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
 				timeout-sec = <12>;
-				clock-names = "enable", "rtc_enable";
 				clocks = <&aon_gate CLK_APCPU_WDG_EB>,
-				       <&aon_gate CLK_AP_WDG_RTC_EB>;
+					 <&aon_gate CLK_AP_WDG_RTC_EB>;
+				clock-names = "enable", "rtc_enable";
 			};
 		};
 

@@ -277,9 +281,9 @@ agcp_dma: dma-controller@41580000 {
 				/* For backwards compatibility: */
 				#dma-channels = <32>;
 				dma-channels = <32>;
-				clock-names = "enable", "ashb_eb";
 				clocks = <&agcp_gate CLK_AGCP_DMAAP_EB>,
-				       <&agcp_gate CLK_AGCP_AP_ASHB_EB>;
+					 <&agcp_gate CLK_AGCP_AP_ASHB_EB>;
+				clock-names = "enable", "ashb_eb";
 			};
 		};
 	};
Signature · 1 line
2.34.1
author
#3 lore raw

PATCH 3/3 arm64: dts: sprd: move/add SPDX license to top of the file

In reply to Stanislav Jakubek

Checkpatch complains about the SPDX-License-Identifier being in the wrong place. Move it to the top of the file to fix these warnings. In cases of the license being specified only in text, convert these to the SPDX-License-Identifier.

Signed-off-by Stanislav Jakubek <[email protected]>
---
 arch/arm64/boot/dts/sprd/sc2731.dtsi          | 3 +--
 arch/arm64/boot/dts/sprd/sc9836-openphone.dts | 3 +--
 arch/arm64/boot/dts/sprd/sc9836.dtsi          | 3 +--
 arch/arm64/boot/dts/sprd/sc9860.dtsi          | 3 +--
 arch/arm64/boot/dts/sprd/sharkl64.dtsi        | 3 +--
 arch/arm64/boot/dts/sprd/sp9860g-1h10.dts     | 3 +--
 arch/arm64/boot/dts/sprd/whale2.dtsi          | 3 +--
 7 files changed, 7 insertions(+), 14 deletions(-)
arch/arm64/boot/dts/sprd/sc2731.dtsi +1 -2
index e15409f55f43..fc4e2b1e160e 100644
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
  * Spreadtrum SC2731 PMIC dts file
  *
  * Copyright (C) 2018, Spreadtrum Communications Inc.
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  */
 
 &adi_bus {
arch/arm64/boot/dts/sprd/sc9836-openphone.dts +1 -2
index e5657c35cd10..b98589ea5ac2 100644
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
 /*
  * Spreadtrum SC9836 openphone board DTS file
  *
  * Copyright (C) 2014, Spreadtrum Communications Inc.
- *
- * This file is licensed under a dual GPLv2 or X11 license.
  */
 
 /dts-v1/;
arch/arm64/boot/dts/sprd/sc9836.dtsi +1 -2
index 8bb8a70966d2..bc3fc9fc3d90 100644
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
 /*
  * Spreadtrum SC9836 SoC DTS file
  *
  * Copyright (C) 2014, Spreadtrum Communications Inc.
- *
- * This file is licensed under a dual GPLv2 or X11 license.
  */
 
 #include "sharkl64.dtsi"
arch/arm64/boot/dts/sprd/sc9860.dtsi +1 -2
index 31952d361a8a..d2456d633c39 100644
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
  * Spreadtrum SC9860 SoC
  *
  * Copyright (C) 2016, Spreadtrum Communications Inc.
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  */
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
arch/arm64/boot/dts/sprd/sharkl64.dtsi +1 -2
index 69f64e7fce7c..bf58702c4e07 100644
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
 /*
  * Spreadtrum Sharkl64 platform DTS file
  *
  * Copyright (C) 2014, Spreadtrum Communications Inc.
- *
- * This file is licensed under a dual GPLv2 or X11 license.
  */
 
 / {
arch/arm64/boot/dts/sprd/sp9860g-1h10.dts +1 -2
index 1ce3cbbd9668..095b24a31313 100644
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
  * Spreadtrum SP9860g board
  *
  * Copyright (C) 2017, Spreadtrum Communications Inc.
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  */
 
 /dts-v1/;
arch/arm64/boot/dts/sprd/whale2.dtsi +1 -2
index a28f995fb3ff..a551e14ce826 100644
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
  * Spreadtrum Whale2 platform peripherals
  *
  * Copyright (C) 2016, Spreadtrum Communications Inc.
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  */
 
 #include <dt-bindings/clock/sprd,sc9860-clk.h>
Signature · 1 line
2.34.1
Reviewed-by on the v1 series
#4 lore raw
In reply to Stanislav Jakubek
Quoted 2 lines · Stanislav Jakubek

This series contains various minor cleanups for Spreadtum/Unisoc ARM64 DeviceTrees.

Thanks. All look good to me. For the whole series:

Reviewed-by Baolin Wang <[email protected]>
Quoted 16 lines

Stanislav Jakubek (3):
arm64: dts: sprd: rename SDHCI nodes to mmc
arm64: dts: sprd: reorder clock-names after clocks
arm64: dts: sprd: move/add SPDX license to top of the file

  arch/arm64/boot/dts/sprd/sc2731.dtsi          |  3 +-
  arch/arm64/boot/dts/sprd/sc9836-openphone.dts |  3 +-
  arch/arm64/boot/dts/sprd/sc9836.dtsi          |  3 +-
  arch/arm64/boot/dts/sprd/sc9860.dtsi          |  3 +-
  arch/arm64/boot/dts/sprd/sc9863a.dtsi         |  8 ++--
  arch/arm64/boot/dts/sprd/sharkl64.dtsi        |  3 +-
  arch/arm64/boot/dts/sprd/sp9860g-1h10.dts     |  3 +-
  arch/arm64/boot/dts/sprd/ums512.dtsi          |  4 +-
  arch/arm64/boot/dts/sprd/whale2.dtsi          | 43 ++++++++++---------
  9 files changed, 35 insertions(+), 38 deletions(-)
Applied
#5 lore raw
In reply to Stanislav Jakubek
Quoted 9 lines · Stanislav Jakubek

This series contains various minor cleanups for Spreadtum/Unisoc ARM64 DeviceTrees.

Stanislav Jakubek (3):
arm64: dts: sprd: rename SDHCI nodes to mmc
arm64: dts: sprd: reorder clock-names after clocks
arm64: dts: sprd: move/add SPDX license to top of the file

[...]

No one took this patch and it waits on the list for very long.

Applied, thanks!

[1/3] arm64: dts: sprd: rename SDHCI nodes to mmc
(no commit info)
[2/3] arm64: dts: sprd: reorder clock-names after clocks

      https://git.kernel.org/krzk/linux-dt/c/e2e0d4554de7182f4843415343b8888dac8a4f72
[3/3] arm64: dts: sprd: move/add SPDX license to top of the file
      https://git.kernel.org/krzk/linux-dt/c/a4b3f197bcd17ea81605f3121a459dece448e877

Best regards,

Signature · 1 line
Krzysztof Kozlowski <[email protected]>