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arm64: versal-net: Add description for VN-X board

PATCH Applied Michal Simek 2 participants 5 messages Feb 4, 2025 – Feb 17, 2025

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Device tree bindings Arm/Zynq architecture
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Michal Simek

author maintainer
#0 lore raw

v2 cover arm64: versal-net: Add description for VN-X board

Hi,

add description for VN-X board with Versal NET SoC to see how that SoC look like. DT binding patch was sent already as v1 but make more sense to send it together also with board description to see full description.

v1 of DT binding patch is at
https://lore.kernel.org/all/[email protected]/

That's why this series is sent as v2.

Thanks,
Michal

Changes in v2:
- Remove | from description
- Change description
- Update subject to match VN-X
- Add description for VN-X
- New patch in series

Michal Simek (1):
arm64: versal-net: Add description for b2197-00 revA board

Shubhrajyoti Datta (1):
dt-bindings: soc: Add new VN-X board description based on Versal NET

 .../bindings/soc/xilinx/xilinx.yaml           |  11 +-
 arch/arm64/boot/dts/xilinx/Makefile           |   2 +
 .../arm64/boot/dts/xilinx/versal-net-clk.dtsi | 231 ++++++
 .../xilinx/versal-net-vn-x-b2197-01-revA.dts  | 116 +++
 arch/arm64/boot/dts/xilinx/versal-net.dtsi    | 752 ++++++++++++++++++
 5 files changed, 1110 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm64/boot/dts/xilinx/versal-net-clk.dtsi
 create mode 100644 arch/arm64/boot/dts/xilinx/versal-net-vn-x-b2197-01-revA.dts
 create mode 100644 arch/arm64/boot/dts/xilinx/versal-net.dtsi
Signature · 1 line
2.43.0
author maintainer
#1 lore raw

PATCH v2 1/2 dt-bindings: soc: Add new VN-X board description based on Versal NET

From: Shubhrajyoti Datta <[email protected]>

The Versal NET (Networked Adaptive Compute Acceleration Platform) from AMD/Xilinx is a next-generation adaptive platform designed for high performance computing, networking, and AI acceleration. It is part of the Versal ACAP (Adaptive Compute Acceleration Platform) family.

Signed-off-by Shubhrajyoti Datta <[email protected]>
Signed-off-by Michal Simek <[email protected]>

---

Changes in v2:
- Remove | from description
- Change description
- Update subject to match VN-X
- Add description for VN-X

 .../devicetree/bindings/soc/xilinx/xilinx.yaml        | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml +9 -2
index 131aba5ed9f4..fb5c39c79d28 100644
@@ -9,8 +9,8 @@ title: Xilinx Zynq Platforms
 maintainers:
   - Michal Simek <[email protected]>
 
-description: |
-  Xilinx boards with Zynq-7000 SOC or Zynq UltraScale+ MPSoC
+description:
+  AMD/Xilinx boards with ARM 32/64bits cores
 
 properties:
   $nodename:

@@ -187,6 +187,13 @@ properties:
           - const: qemu,mbv
           - const: amd,mbv
 
+      - description: Xilinx Versal NET VN-X revA platform
+        items:
+          enum:
+            - xlnx,versal-net-vnx-revA
+            - xlnx,versal-net-vnx
+            - xlnx,versal-net
+
 additionalProperties: true
 
 ...
Signature · 1 line
2.43.0
Acked-by on v2 1/2
#2 lore raw

Re: [PATCH v2 1/2] dt-bindings: soc: Add new VN-X board description based on Versal NET

Quoted 9 lines · Michal Simek

From: Shubhrajyoti Datta <[email protected]>

The Versal NET (Networked Adaptive Compute Acceleration Platform) from AMD/Xilinx is a next-generation adaptive platform designed for high performance computing, networking, and AI acceleration. It is part of the Versal ACAP (Adaptive Compute Acceleration Platform) family.

Signed-off-by Shubhrajyoti Datta <[email protected]>
Signed-off-by Michal Simek <[email protected]>
Acked-by Conor Dooley <[email protected]>
author maintainer
#3 lore raw

PATCH v2 2/2 arm64: versal-net: Add description for b2197-00 revA board

In reply to Michal Simek

Add description for VN-X board. The board is using Versal NET SoC which has 16 a78 cores with additional IPs.

Signed-off-by Michal Simek <[email protected]>

---

Changes in v2:
- New patch in series

 arch/arm64/boot/dts/xilinx/Makefile           |   2 +
 .../arm64/boot/dts/xilinx/versal-net-clk.dtsi | 231 ++++++
 .../xilinx/versal-net-vn-x-b2197-01-revA.dts  | 116 +++
 arch/arm64/boot/dts/xilinx/versal-net.dtsi    | 752 ++++++++++++++++++
 4 files changed, 1101 insertions(+)
 create mode 100644 arch/arm64/boot/dts/xilinx/versal-net-clk.dtsi
 create mode 100644 arch/arm64/boot/dts/xilinx/versal-net-vn-x-b2197-01-revA.dts
 create mode 100644 arch/arm64/boot/dts/xilinx/versal-net.dtsi
arch/arm64/boot/dts/xilinx/Makefile +2 -0
index 1068b0fa8e98..7f5a8801cad1 100644
@@ -29,3 +29,5 @@ zynqmp-smk-k26-revA-sck-kv-g-revA-dtbs := zynqmp-smk-k26-revA.dtb zynqmp-sck-kv-
 dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k26-revA-sck-kv-g-revA.dtb
 zynqmp-smk-k26-revA-sck-kv-g-revB-dtbs := zynqmp-smk-k26-revA.dtb zynqmp-sck-kv-g-revB.dtbo
 dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k26-revA-sck-kv-g-revB.dtb
+
+dtb-$(CONFIG_ARCH_ZYNQMP) += versal-net-vn-x-b2197-01-revA.dtb
arch/arm64/boot/dts/xilinx/versal-net-clk.dtsi new file +231 -0

231 lines not on this page · raw message

arch/arm64/boot/dts/xilinx/versal-net-vn-x-b2197-01-revA.dts new file +116 -0

116 lines not on this page · raw message

arch/arm64/boot/dts/xilinx/versal-net.dtsi new file +752 -0

752 lines not on this page · raw message

Signature · 1 line
2.43.0
author maintainer Applied
#4 lore raw
In reply to Michal Simek
Quoted 33 lines · Michal Simek

Hi,

add description for VN-X board with Versal NET SoC to see how that SoC look like. DT binding patch was sent already as v1 but make more sense to send it together also with board description to see full description.

v1 of DT binding patch is at
https://lore.kernel.org/all/[email protected]/

That's why this series is sent as v2.

Thanks,
Michal

Changes in v2:
- Remove | from description
- Change description
- Update subject to match VN-X
- Add description for VN-X
- New patch in series

Michal Simek (1):
arm64: versal-net: Add description for b2197-00 revA board

Shubhrajyoti Datta (1):
dt-bindings: soc: Add new VN-X board description based on Versal NET

  .../bindings/soc/xilinx/xilinx.yaml           |  11 +-
  arch/arm64/boot/dts/xilinx/Makefile           |   2 +
  .../arm64/boot/dts/xilinx/versal-net-clk.dtsi | 231 ++++++
  .../xilinx/versal-net-vn-x-b2197-01-revA.dts  | 116 +++
  arch/arm64/boot/dts/xilinx/versal-net.dtsi    | 752 ++++++++++++++++++
  5 files changed, 1110 insertions(+), 2 deletions(-)
Quoted 4 lines

create mode 100644 arch/arm64/boot/dts/xilinx/versal-net-clk.dtsi create mode 100644 arch/arm64/boot/dts/xilinx/versal-net-vn-x-b2197-01-revA.dts create mode 100644 arch/arm64/boot/dts/xilinx/versal-net.dtsi

Applied.
M