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Support ROHM BD79104 ADC

PATCH Superseded Matti Vaittinen 3 participants 18 messages Mar 31, 2025 – Apr 7, 2025

Subsystems (3)

v1 of 3 Superseded Latest is v3 →

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Matti Vaittinen

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#0 lore raw

cover Support ROHM BD79104 ADC

The ROHM BD79104 ADC is a 12 bit, 8-channel ADC controlled via SPI.

The communication over SPI uses similar protocol as the ti-adc128s052. In order to avoid code duplication, the support for the ROHM IC is added in the same driver.

The driver side differencies between the ti-adc128s052 and the ROHM BD79104 are related to the supply regulator handling. The BD79104 requires supplies for the VDD and IOVDD. The ti-adc128s052 driver handles only the reference voltage supply, even though the TI data-sheet indicates it can also have separate supplies.

Hardware vise the ROHM BD79104 requires SPI MODE 3, and has also some SPI frequency limitations.

I decided to add own binding document for the ROHM BD79104 so it is easier to document the SPI limitations. It also allows using the supply names from the data sheet. And finally, it gives users of this IC a better hint that it is supported.

Finally, I didn't find maintainer information for this driver from the MAINTAINERS file. I would like to add myself as a reviewer for the driver, so I can stay on track of the changes to it. AFAIR, having R-entry without M-entry was not appreciated. Any suggestions how to handle this?

This series was based on the v6.14, but it should apply cleanly on iio/testing - please let me know if I should rebase.

---

Matti Vaittinen (6):
dt-bindings: ROHM BD79104 ADC
iio: adc: ti-adc128s052: Fix ADC value on BE systems
iio: adc: ti-adc128s052: Be consistent with arrays
iio: adc: ti-adc128s052: Use devm_mutex_init()
iio: adc: ti-adc128s052: Simplify using guard(mutex)
iio: adc: ti-adc128s052: Support ROHM BD79104

 .../bindings/iio/adc/rohm,bd79104.yaml        | 69 +++++++++++++++++++
 drivers/iio/adc/Kconfig                       |  2 +-
 drivers/iio/adc/ti-adc128s052.c               | 66 +++++++++++++-----
 3 files changed, 118 insertions(+), 19 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/iio/adc/rohm,bd79104.yaml

base-commit: 7eb172143d5508b4da468ed59ee857c6e5e01da6

Signature · 1 line
2.48.1
author maintainer
#1 lore raw

PATCH 1/6 dt-bindings: ROHM BD79104 ADC

The ROHM BD79104 is a 12-bit, 8-channel ADC with two power supply pins, connected to SPI. It's worth noting the IC requires SPI MODE 3, (CPHA = 1, CPOL = 1).

I used an evaluation board "BD79104FV-EVK-001" from ROHM. With this board I had problems to have things working correctly with higher SPI clock frequencies. I didn't do thorough testing for maximum frequency though. First attempt was 40M, then 20M and finally 4M. With 20M it seemed as if the read values were shifted by 1 bit. With 4M it worked fine.

The component data-sheet is not exact what comes to the maximum SPI frequency. It says SPI frequency is 20M - "unless othervice specified". Additionally, it says that maximum sampling rate is 1Mhz, and since reading a sample requires writing the channel (16 bits) and reading data (16 bits) - we get some upper limit from this.

From the "frequency is 20M, unless othervice specified" I picked the maximum frequency 20M - and did assumption that my problems with 20M weren't related to the BD79104 - but to the evaluation board "BD79104FV-EVK-001".

Add bindings for the ROHM BD79104 ADC.

---
 .../bindings/iio/adc/rohm,bd79104.yaml        | 69 +++++++++++++++++++
 1 file changed, 69 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/iio/adc/rohm,bd79104.yaml
Documentation/devicetree/bindings/iio/adc/rohm,bd79104.yaml new file +69 -0
new file mode 100644
index 000000000000..2a8ad4fdfc6b
@@ -0,0 +1,69 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/adc/rohm,bd79104.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ROHM Semiconductor BD79104 ADC
+
+maintainers:
+  - Matti Vaittinen <[email protected]>
+
+description: |
+  12 bit SPI ADC with 8 channels.
+
+properties:
+  compatible:
+    const: rohm,bd79104
+
+  reg:
+    maxItems: 1
+
+  vdd-supply: true
+  iovdd-supply: true
+
+# The component data-sheet says the frequency is 20M. I, however, found
+# that the ROHM evaluation board BD79104FV-EVK-001 had problems with 20M.
+# I have successfully used it with 4M. My _assumption_ is that this is not
+# the limitation of the component itself, but a limitation of the EVK.
+  spi-max-frequency:
+    maximum: 20000000
+
+  "#io-channel-cells":
+    const: 1
+
+  spi-cpha: true
+  spi-cpol: true
+
+required:
+  - compatible
+  - reg
+  - vdd-supply
+  - iovdd-supply
+  - spi-cpha
+  - spi-cpol
+
+allOf:
+  - $ref: /schemas/spi/spi-peripheral-props.yaml#
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/irq.h>
+    spi {
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        adc@0 {
+            compatible = "rohm,bd79104";
+            reg = <0>;
+            vdd-supply = <&vdd_supply>;
+            iovdd-supply = <&iovdd_supply>;
+            spi-max-frequency = <4000000>;
+            spi-cpha;
+            spi-cpol;
+            #io-channel-cells = <1>;
+        };
+    };
+...
Signature · 1 line
2.48.1
Reviewed-by on v1 1/6
#2 lore raw

Re: [PATCH 1/6] dt-bindings: ROHM BD79104 ADC

Quoted 17 lines · Matti Vaittinen

The ROHM BD79104 is a 12-bit, 8-channel ADC with two power supply pins, connected to SPI. It's worth noting the IC requires SPI MODE 3, (CPHA = 1, CPOL = 1).

I used an evaluation board "BD79104FV-EVK-001" from ROHM. With this board I had problems to have things working correctly with higher SPI clock frequencies. I didn't do thorough testing for maximum frequency though. First attempt was 40M, then 20M and finally 4M. With 20M it seemed as if the read values were shifted by 1 bit. With 4M it worked fine.

The component data-sheet is not exact what comes to the maximum SPI frequency. It says SPI frequency is 20M - "unless othervice specified". Additionally, it says that maximum sampling rate is 1Mhz, and since reading a sample requires writing the channel (16 bits) and reading data (16 bits) - we get some upper limit from this.

Quoted 8 lines

From the "frequency is 20M, unless othervice specified" I picked the maximum frequency 20M - and did assumption that my problems with 20M weren't related to the BD79104 - but to the evaluation board "BD79104FV-EVK-001".

Add bindings for the ROHM BD79104 ADC.

Quoted 83 lines
---
 .../bindings/iio/adc/rohm,bd79104.yaml        | 69 +++++++++++++++++++
 1 file changed, 69 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/iio/adc/rohm,bd79104.yaml
Documentation/devicetree/bindings/iio/adc/rohm,bd79104.yaml new file +69 -0
new file mode 100644
index 000000000000..2a8ad4fdfc6b
@@ -0,0 +1,69 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/adc/rohm,bd79104.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ROHM Semiconductor BD79104 ADC
+
+maintainers:
+  - Matti Vaittinen <[email protected]>
+
+description: |
+  12 bit SPI ADC with 8 channels.
+
+properties:
+  compatible:
+    const: rohm,bd79104
+
+  reg:
+    maxItems: 1
+
+  vdd-supply: true
+  iovdd-supply: true
+
+# The component data-sheet says the frequency is 20M. I, however, found
+# that the ROHM evaluation board BD79104FV-EVK-001 had problems with 20M.
+# I have successfully used it with 4M. My _assumption_ is that this is not
+# the limitation of the component itself, but a limitation of the EVK.
+  spi-max-frequency:
+    maximum: 20000000
+
+  "#io-channel-cells":
+    const: 1
+
+  spi-cpha: true
+  spi-cpol: true
+
+required:
+  - compatible
+  - reg
+  - vdd-supply
+  - iovdd-supply
+  - spi-cpha
+  - spi-cpol
+
+allOf:
+  - $ref: /schemas/spi/spi-peripheral-props.yaml#
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/irq.h>
+    spi {
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        adc@0 {
+            compatible = "rohm,bd79104";
+            reg = <0>;
+            vdd-supply = <&vdd_supply>;
+            iovdd-supply = <&iovdd_supply>;
+            spi-max-frequency = <4000000>;
+            spi-cpha;
+            spi-cpol;
+            #io-channel-cells = <1>;
+        };
+    };
+...
Signature · 1 line
2.48.1
author maintainer
#3 lore raw

PATCH 2/6 iio: adc: ti-adc128s052: Fix ADC value on BE systems

In reply to Matti Vaittinen

ADCs supported by the ti-adc128s052 driver do return the ADC data in 16 bits using big-endian format. The driver does unconditionally swap the bytes. This leads to wrong values being reported to users on big endian systems.

Fix this by using the be16_to_cpu() instead of doing unconditional byte swapping.

Fixes 913b86468674 ("iio: adc: Add TI ADC128S052")

---
I have no big endian machines on my hands to test this. Problem was spotted by reading the code, which leaves some room for errors. Careful reviewing is appreciated!

---
 drivers/iio/adc/ti-adc128s052.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)
drivers/iio/adc/ti-adc128s052.c +7 -6
index a456ea78462f..d1e31122ea0d 100644
@@ -28,19 +28,20 @@ struct adc128 {
 	struct regulator *reg;
 	struct mutex lock;
 
-	u8 buffer[2] __aligned(IIO_DMA_MINALIGN);
+	__be16 buffer __aligned(IIO_DMA_MINALIGN);
 };
 
 static int adc128_adc_conversion(struct adc128 *adc, u8 channel)
 {
 	int ret;
+	char *msg = (char *)&adc->buffer;
 
-	mutex_lock(&adc->lock);
+	msg[0] = channel << 3;
+	msg[1] = 0;
 
-	adc->buffer[0] = channel << 3;
-	adc->buffer[1] = 0;
+	mutex_lock(&adc->lock);
 
-	ret = spi_write(adc->spi, &adc->buffer, 2);
+	ret = spi_write(adc->spi, msg, 2);
 	if (ret < 0) {
 		mutex_unlock(&adc->lock);
 		return ret;
@@ -53,7 +54,7 @@ static int adc128_adc_conversion(struct adc128 *adc, u8 channel)
 	if (ret < 0)
 		return ret;
 
-	return ((adc->buffer[0] << 8 | adc->buffer[1]) & 0xFFF);
+	return be16_to_cpu(adc->buffer) & 0xFFF;
 }
 
 static int adc128_read_raw(struct iio_dev *indio_dev,
Signature · 1 line
2.48.1
maintainer
#4 lore raw

Re: [PATCH 2/6] iio: adc: ti-adc128s052: Fix ADC value on BE systems

Quoted 7 lines · On Mon, 31 Mar 2025 11:02:55 +0300 Matti Vaittinen <[email protected]>…

ADCs supported by the ti-adc128s052 driver do return the ADC data in 16 bits using big-endian format. The driver does unconditionally swap the bytes. This leads to wrong values being reported to users on big endian systems.

Fix this by using the be16_to_cpu() instead of doing unconditional byte swapping.

It's not doing unconditional byte swap that I can see. The adc->buffer[0] << 8 | adc->buffer[1]
will work on big or little endian systems as we are explicitly saying which byte represents higher bit values in a 16 bit output so on little endian it's a byte swap, but on big endian it's a noop (the compiler might noticed that and replace this code sequence with an assignment)

Good cleanup, but not a fix as such unless I'm missing something.

Quoted 22 lines
Fixes 913b86468674 ("iio: adc: Add TI ADC128S052")

---
I have no big endian machines on my hands to test this. Problem was spotted by reading the code, which leaves some room for errors. Careful reviewing is appreciated!

---
 drivers/iio/adc/ti-adc128s052.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)
drivers/iio/adc/ti-adc128s052.c +1 -1
index a456ea78462f..d1e31122ea0d 100644
@@ -28,19 +28,20 @@ struct adc128 {
 	struct regulator *reg;
 	struct mutex lock;
 
-	u8 buffer[2] __aligned(IIO_DMA_MINALIGN);
+	__be16 buffer __aligned(IIO_DMA_MINALIGN);

drivers/iio/adc/ti-adc128s052.c struct adc128 { · line 40

Quoted 10 lines
drivers/iio/adc/ti-adc128s052.c +3 -1
 };
 
 static int adc128_adc_conversion(struct adc128 *adc, u8 channel)
 {
 	int ret;
+	char *msg = (char *)&adc->buffer;
 
-	mutex_lock(&adc->lock);
+	msg[0] = channel << 3;
+	msg[1] = 0;

Given you are writing shared state why move this out of the lock? Whilst here maybe using guard() would clean this driver up a little.

Use a separate buffer (or a union) so we can avoid the casting here

drivers/iio/adc/ti-adc128s052.c struct adc128 { · line 44

Quoted 7 lines
drivers/iio/adc/ti-adc128s052.c +2 -3
-	adc->buffer[0] = channel << 3;
-	adc->buffer[1] = 0;
+	mutex_lock(&adc->lock);
 
-	ret = spi_write(adc->spi, &adc->buffer, 2);
+	ret = spi_write(adc->spi, msg, 2);

Given you are tidying this up, lets make the source of that size value obvious.

sizeof(adc->buffer)

Quoted 12 lines
drivers/iio/adc/ti-adc128s052.c +1 -1
 	if (ret < 0) {
 		mutex_unlock(&adc->lock);
 		return ret;
@@ -53,7 +54,7 @@ static int adc128_adc_conversion(struct adc128 *adc, u8 channel)
 	if (ret < 0)
 		return ret;
 
-	return ((adc->buffer[0] << 8 | adc->buffer[1]) & 0xFFF);
+	return be16_to_cpu(adc->buffer) & 0xFFF;
 }
 
 static int adc128_read_raw(struct iio_dev *indio_dev,
author maintainer
#5 lore raw

Re: [PATCH 2/6] iio: adc: ti-adc128s052: Fix ADC value on BE systems

Quoted 10 lines · Jonathan Cameron
Quoted 7 lines · On Mon, 31 Mar 2025 11:02:55 +0300 Matti Vaittinen <[email protected]>…

ADCs supported by the ti-adc128s052 driver do return the ADC data in 16 bits using big-endian format. The driver does unconditionally swap the bytes. This leads to wrong values being reported to users on big endian systems.

Fix this by using the be16_to_cpu() instead of doing unconditional byte swapping.

Appears this was one of the patches I should've never written. Nothing went right :) Sorry for the noise. I'll try improving for the v2

Quoted 8 lines

It's not doing unconditional byte swap that I can see. The adc->buffer[0] << 8 | adc->buffer[1]
will work on big or little endian systems as we are explicitly saying which byte represents higher bit values in a 16 bit output so on little endian it's a byte swap, but on big endian it's a noop (the compiler might noticed that and replace this code sequence with an assignment)

Good cleanup, but not a fix as such unless I'm missing something.

No, you're not missing anything. I am the one who just got confused. I am not exactly sure what I was thinking. :rolleyes: This definitely isn't a fix. And, as a not a fix needing porting, I may squash this with some other patch. I need to take another look at this :)

Quoted 28 lines
Quoted 28 lines
Fixes 913b86468674 ("iio: adc: Add TI ADC128S052")

---
I have no big endian machines on my hands to test this. Problem was spotted by reading the code, which leaves some room for errors. Careful reviewing is appreciated!

---
  drivers/iio/adc/ti-adc128s052.c | 13 +++++++------
  1 file changed, 7 insertions(+), 6 deletions(-)
drivers/iio/adc/ti-adc128s052.c +2 -1
index a456ea78462f..d1e31122ea0d 100644
@@ -28,19 +28,20 @@ struct adc128 {
  	struct regulator *reg;
  	struct mutex lock;
 
-	u8 buffer[2] __aligned(IIO_DMA_MINALIGN);
+	__be16 buffer __aligned(IIO_DMA_MINALIGN);
  };
 
  static int adc128_adc_conversion(struct adc128 *adc, u8 channel)
  {
  	int ret;
+	char *msg = (char *)&adc->buffer;
 
Quoted 5 lines

drivers/iio/adc/ti-adc128s052.c struct adc128 { · line 40

Quoted 3 lines
drivers/iio/adc/ti-adc128s052.c +2 -1
-	mutex_lock(&adc->lock);
+	msg[0] = channel << 3;
+	msg[1] = 0;

Given you are writing shared state why move this out of the lock?

Very Valid Point. I'm not 100% sure what I thought of, probably assumed IIO core would serialize the calls. That would've been nasty bug! I appreciate your sharp eyes :)

Thanks!

Yours,
-- Matti

author maintainer
#6 lore raw

PATCH 3/6 iio: adc: ti-adc128s052: Be consistent with arrays

In reply to Matti Vaittinen

The ti-adc128s052 driver has NULL terminated ID arrays for the of_device_id, spi_device_id and acpi_device_id. All of these are terminated by having an empty string as the last member of an array. Only the of_device_id array uses the /* sentinel */ comment.

It's better to be consistent.

This /* sentinel */ comment serves no real purpose these days as people are used to seeing these ID lists terminated with an empty array element.

Drop the /* sentinel */ from the of_device_id.

---
 drivers/iio/adc/ti-adc128s052.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/iio/adc/ti-adc128s052.c +1 -1
index d1e31122ea0d..dd1e405bf172 100644
@@ -185,7 +185,7 @@ static const struct of_device_id adc128_of_match[] = {
 	{ .compatible = "ti,adc124s021", .data = &adc128_config[2] },
 	{ .compatible = "ti,adc124s051", .data = &adc128_config[2] },
 	{ .compatible = "ti,adc124s101", .data = &adc128_config[2] },
-	{ /* sentinel */ },
+	{ },
 };
 MODULE_DEVICE_TABLE(of, adc128_of_match);
 
Signature · 1 line
2.48.1
maintainer
#7 lore raw

Re: [PATCH 3/6] iio: adc: ti-adc128s052: Be consistent with arrays

Quoted 23 lines · On Mon, 31 Mar 2025 11:03:13 +0300 Matti Vaittinen <[email protected]>…

The ti-adc128s052 driver has NULL terminated ID arrays for the of_device_id, spi_device_id and acpi_device_id. All of these are terminated by having an empty string as the last member of an array. Only the of_device_id array uses the /* sentinel */ comment.

It's better to be consistent.

This /* sentinel */ comment serves no real purpose these days as people are used to seeing these ID lists terminated with an empty array element.

Drop the /* sentinel */ from the of_device_id.

---
 drivers/iio/adc/ti-adc128s052.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/iio/adc/ti-adc128s052.c +0 -0
index d1e31122ea0d..dd1e405bf172 100644

drivers/iio/adc/ti-adc128s052.c static const struct of_device_id adc128_of_match[] = { · line 188

Quoted 5 lines
drivers/iio/adc/ti-adc128s052.c +1 -1
@@ -185,7 +185,7 @@ static const struct of_device_id adc128_of_match[] = {
 	{ .compatible = "ti,adc124s021", .data = &adc128_config[2] },
 	{ .compatible = "ti,adc124s051", .data = &adc128_config[2] },
 	{ .compatible = "ti,adc124s101", .data = &adc128_config[2] },
-	{ /* sentinel */ },
+	{ },

Whilst here, drop the trailing ,

More 'modern' style in kernel tends not to use them as we don't want to make it easy to put anything after it.

If there is another such case drop the comma on that as well as part of this patch.

I don't care that much about the /* sentinel */ though as I've let at least one more of those in over the weekend. Still consistency is a valid argument.

Quoted 3 lines
drivers/iio/adc/ti-adc128s052.c +0 -0
 };
 MODULE_DEVICE_TABLE(of, adc128_of_match);
 
author maintainer
#8 lore raw

PATCH 4/6 iio: adc: ti-adc128s052: Use devm_mutex_init()

In reply to Matti Vaittinen

Quoting Jonathan:
"Whilst it doesn't bring huge advantage, now we have devm_mutex_init() it seems reasonable to use it and maybe catch a use after free for the lock"

Switch to use devm_mutex_init() while working on this file.

---
 drivers/iio/adc/ti-adc128s052.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/iio/adc/ti-adc128s052.c +1 -1
index dd1e405bf172..90b23c68daea 100644
@@ -172,7 +172,7 @@ static int adc128_probe(struct spi_device *spi)
 	if (ret)
 		return ret;
 
-	mutex_init(&adc->lock);
+	devm_mutex_init(&spi->dev, &adc->lock);
 
 	return devm_iio_device_register(&spi->dev, indio_dev);
 }
Signature · 1 line
2.48.1
maintainer
#9 lore raw

Re: [PATCH 4/6] iio: adc: ti-adc128s052: Use devm_mutex_init()

Quoted 17 lines · On Mon, 31 Mar 2025 11:03:30 +0300 Matti Vaittinen <[email protected]>…

Quoting Jonathan:
"Whilst it doesn't bring huge advantage, now we have devm_mutex_init() it seems reasonable to use it and maybe catch a use after free for the lock"

Switch to use devm_mutex_init() while working on this file.

---
 drivers/iio/adc/ti-adc128s052.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/iio/adc/ti-adc128s052.c +0 -0
index dd1e405bf172..90b23c68daea 100644

drivers/iio/adc/ti-adc128s052.c static int adc128_probe(struct spi_device *spi) · line 175

Quoted 5 lines
drivers/iio/adc/ti-adc128s052.c +1 -1
@@ -172,7 +172,7 @@ static int adc128_probe(struct spi_device *spi)
 	if (ret)
 		return ret;
 
-	mutex_init(&adc->lock);
+	devm_mutex_init(&spi->dev, &adc->lock);
	ret = devm_mutex_init(&spi->dev, &adc->lock);
	if (ret)
		return ret;
Quoted 3 lines
drivers/iio/adc/ti-adc128s052.c +0 -0
 	return devm_iio_device_register(&spi->dev, indio_dev);
 }
author maintainer
#10 lore raw

PATCH 5/6 iio: adc: ti-adc128s052: Simplify using guard(mutex)

In reply to Matti Vaittinen

Error path in ADC reading function can be slighly simplified using the guard(mutex). Do just that.

Also, document the mutex purpose while at it.

---
 drivers/iio/adc/ti-adc128s052.c | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)
drivers/iio/adc/ti-adc128s052.c +4 -7
index 90b23c68daea..c68ee4e17a03 100644
@@ -9,6 +9,7 @@
  * https://www.ti.com/lit/ds/symlink/adc124s021.pdf
  */
 
+#include <linux/cleanup.h>
 #include <linux/err.h>
 #include <linux/iio/iio.h>
 #include <linux/mod_devicetable.h>
@@ -26,6 +27,7 @@ struct adc128 {
 	struct spi_device *spi;
 
 	struct regulator *reg;
+	/* Serialize the SPI 'write-channel + read data' accesses */
 	struct mutex lock;
 
 	__be16 buffer __aligned(IIO_DMA_MINALIGN);
@@ -39,18 +41,13 @@ static int adc128_adc_conversion(struct adc128 *adc, u8 channel)
 	msg[0] = channel << 3;
 	msg[1] = 0;
 
-	mutex_lock(&adc->lock);
+	guard(mutex)(&adc->lock);
 
 	ret = spi_write(adc->spi, msg, 2);
-	if (ret < 0) {
-		mutex_unlock(&adc->lock);
+	if (ret < 0)
 		return ret;
-	}
 
 	ret = spi_read(adc->spi, &adc->buffer, 2);
-
-	mutex_unlock(&adc->lock);
-
 	if (ret < 0)
 		return ret;
 
Signature · 1 line
2.48.1
maintainer
#11 lore raw

Re: [PATCH 5/6] iio: adc: ti-adc128s052: Simplify using guard(mutex)

Quoted 4 lines · On Mon, 31 Mar 2025 11:03:44 +0300 Matti Vaittinen <[email protected]>…

Error path in ADC reading function can be slighly simplified using the guard(mutex). Do just that.

Also, document the mutex purpose while at it.

Ah. I should have read on before earlier comment!

That's what I get for an efficient linear pass of patches :)

Quoted 27 lines
---
 drivers/iio/adc/ti-adc128s052.c | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)
drivers/iio/adc/ti-adc128s052.c +2 -0
index 90b23c68daea..c68ee4e17a03 100644
@@ -9,6 +9,7 @@
  * https://www.ti.com/lit/ds/symlink/adc124s021.pdf
  */
 
+#include <linux/cleanup.h>
 #include <linux/err.h>
 #include <linux/iio/iio.h>
 #include <linux/mod_devicetable.h>
@@ -26,6 +27,7 @@ struct adc128 {
 	struct spi_device *spi;
 
 	struct regulator *reg;
+	/* Serialize the SPI 'write-channel + read data' accesses */
 	struct mutex lock;
 
 	__be16 buffer __aligned(IIO_DMA_MINALIGN);

drivers/iio/adc/ti-adc128s052.c static int adc128_adc_conversion(struct adc128 *adc, u8 channel) · line 44

Quoted 5 lines
drivers/iio/adc/ti-adc128s052.c +1 -1
@@ -39,18 +41,13 @@ static int adc128_adc_conversion(struct adc128 *adc, u8 channel)
 	msg[0] = channel << 3;
 	msg[1] = 0;
 
-	mutex_lock(&adc->lock);
+	guard(mutex)(&adc->lock);

As per earlier comment, I think you need to protect msg as well.

Quoted 15 lines
drivers/iio/adc/ti-adc128s052.c +1 -6
 	ret = spi_write(adc->spi, msg, 2);
-	if (ret < 0) {
-		mutex_unlock(&adc->lock);
+	if (ret < 0)
 		return ret;
-	}
 
 	ret = spi_read(adc->spi, &adc->buffer, 2);
-
-	mutex_unlock(&adc->lock);
-
 	if (ret < 0)
 		return ret;
 
author maintainer
#12 lore raw

PATCH 6/6 iio: adc: ti-adc128s052: Support ROHM BD79104

In reply to Matti Vaittinen

The ROHM BD79104 ADC has identical SPI communication logic as the ti-adc128s052. Eg, SPI transfer should be 16 clk cycles, conversion is started when the CS is pulled low, and channel selection is done by writing the channel ID after two zero bits. Data is contained in big-endian format in the last 12 bits.

The BD79104 has two input voltage pins. Data sheet uses terms "vdd" and "iovdd". The "vdd" is used also as an analog reference voltage. Hence the driver expects finding these from the device-tree, instead of having the "vref" only as TI's driver.

NOTE: The TI's data sheet[1] does show that the TI's IC does actually have two voltage inputs as well. Pins are called Va (analog reference) and Vd (digital supply pin) - but I keep the existing driver behaviour for the TI's IC "as is", because I have no HW to test changes, and because I have no real need to touch it.

NOTE II: The BD79104 requires SPI MODE 3.

NOTE III: I used evaluation board "BD79104FV-EVK-001" made by ROHM. With this board I had to drop the SPI speed below the 20M which is mentioned in the data-sheet [2]. This, however, may be a limitation of the EVK board, not the component itself.

[1]: https://www.ti.com/lit/ds/symlink/adc128s052.pdf

[2]:
https://fscdn.rohm.com/en/products/databook/datasheet/ic/data_converter/dac/bd79104fv-la-e.pdf

---

---
 drivers/iio/adc/Kconfig         |  2 +-
 drivers/iio/adc/ti-adc128s052.c | 40 +++++++++++++++++++++++++++++----
 2 files changed, 37 insertions(+), 5 deletions(-)
drivers/iio/adc/Kconfig +1 -1
index 849c90203071..148a52b3db94 100644
@@ -1425,7 +1425,7 @@ config TI_ADC128S052
 	depends on SPI
 	help
 	  If you say yes here you get support for Texas Instruments ADC128S052,
-	  ADC122S021 and ADC124S021 chips.
+	  ADC122S021, ADC124S021 and ROHM Semiconductor BD79104 chips.
 
 	  This driver can also be built as a module. If so, the module will be
 	  called ti-adc128s052.
drivers/iio/adc/ti-adc128s052.c +36 -4
index c68ee4e17a03..c7283d606d2e 100644
@@ -21,6 +21,9 @@
 struct adc128_configuration {
 	const struct iio_chan_spec	*channels;
 	u8				num_channels;
+	const char			*refname;
+	int				num_other_regulators;
+	const char * const		(*other_regulators)[];
 };
 
 struct adc128 {
@@ -119,10 +122,28 @@ static const struct iio_chan_spec adc124s021_channels[] = {
 	ADC128_VOLTAGE_CHANNEL(3),
 };
 
+static const char * const bd79104_regulators[] = { "iovdd" };
+
 static const struct adc128_configuration adc128_config[] = {
-	{ adc128s052_channels, ARRAY_SIZE(adc128s052_channels) },
-	{ adc122s021_channels, ARRAY_SIZE(adc122s021_channels) },
-	{ adc124s021_channels, ARRAY_SIZE(adc124s021_channels) },
+	{
+		.channels = adc128s052_channels,
+		.num_channels = ARRAY_SIZE(adc128s052_channels),
+		.refname = "vref",
+	}, {
+		.channels = adc122s021_channels,
+		.num_channels = ARRAY_SIZE(adc122s021_channels),
+		.refname = "vref",
+	}, {
+		.channels = adc124s021_channels,
+		.num_channels = ARRAY_SIZE(adc124s021_channels),
+		.refname = "vref",
+	}, {
+		.channels = adc128s052_channels,
+		.num_channels = ARRAY_SIZE(adc128s052_channels),
+		.refname = "vdd",
+		.other_regulators = &bd79104_regulators,
+		.num_other_regulators = 1,
+	},
 };
 
 static const struct iio_info adc128_info = {
@@ -157,7 +178,7 @@ static int adc128_probe(struct spi_device *spi)
 	indio_dev->channels = config->channels;
 	indio_dev->num_channels = config->num_channels;
 
-	adc->reg = devm_regulator_get(&spi->dev, "vref");
+	adc->reg = devm_regulator_get(&spi->dev, config->refname);
 	if (IS_ERR(adc->reg))
 		return PTR_ERR(adc->reg);
 
@@ -169,6 +190,15 @@ static int adc128_probe(struct spi_device *spi)
 	if (ret)
 		return ret;
 
+	if (config->num_other_regulators) {
+		ret = devm_regulator_bulk_get_enable(&spi->dev,
+						config->num_other_regulators,
+						*config->other_regulators);
+		if (ret)
+			return dev_err_probe(&spi->dev, ret,
+					     "Failed to enable regulators\n");
+	}
+
 	devm_mutex_init(&spi->dev, &adc->lock);
 
 	return devm_iio_device_register(&spi->dev, indio_dev);
@@ -182,6 +212,7 @@ static const struct of_device_id adc128_of_match[] = {
 	{ .compatible = "ti,adc124s021", .data = &adc128_config[2] },
 	{ .compatible = "ti,adc124s051", .data = &adc128_config[2] },
 	{ .compatible = "ti,adc124s101", .data = &adc128_config[2] },
+	{ .compatible = "rohm,bd79104", .data = &adc128_config[3] },
 	{ },
 };
 MODULE_DEVICE_TABLE(of, adc128_of_match);
@@ -194,6 +225,7 @@ static const struct spi_device_id adc128_id[] = {
 	{ "adc124s021", (kernel_ulong_t)&adc128_config[2] },
 	{ "adc124s051", (kernel_ulong_t)&adc128_config[2] },
 	{ "adc124s101", (kernel_ulong_t)&adc128_config[2] },
+	{ "bd79104", (kernel_ulong_t)&adc128_config[3] },
 	{ }
 };
 MODULE_DEVICE_TABLE(spi, adc128_id);
Signature · 1 line
2.48.1
maintainer
#13 lore raw

Re: [PATCH 6/6] iio: adc: ti-adc128s052: Support ROHM BD79104

Quoted 5 lines · On Mon, 31 Mar 2025 11:03:58 +0300 Matti Vaittinen <[email protected]>…

The ROHM BD79104 ADC has identical SPI communication logic as the ti-adc128s052. Eg, SPI transfer should be 16 clk cycles, conversion is started when the CS is pulled low, and channel selection is done by writing the channel ID after two zero bits. Data is contained in big-endian format in the last 12 bits.

Nicely found match. Sometimes these are tricky to spot.

Quoted 19 lines

The BD79104 has two input voltage pins. Data sheet uses terms "vdd" and "iovdd". The "vdd" is used also as an analog reference voltage. Hence the driver expects finding these from the device-tree, instead of having the "vref" only as TI's driver.

NOTE: The TI's data sheet[1] does show that the TI's IC does actually have two voltage inputs as well. Pins are called Va (analog reference) and Vd (digital supply pin) - but I keep the existing driver behaviour for the TI's IC "as is", because I have no HW to test changes, and because I have no real need to touch it.

NOTE II: The BD79104 requires SPI MODE 3.

NOTE III: I used evaluation board "BD79104FV-EVK-001" made by ROHM. With this board I had to drop the SPI speed below the 20M which is mentioned in the data-sheet [2]. This, however, may be a limitation of the EVK board, not the component itself.

Quoted 5 lines

[1]: https://www.ti.com/lit/ds/symlink/adc128s052.pdf

[2]:
https://fscdn.rohm.com/en/products/databook/datasheet/ic/data_converter/dac/bd79104fv-la-e.pdf

Prefer Datasheet tags with # [1]
after them for the cross references.

Those belong here in the tag block (no blank lines)

Quoted 1 line

One request for an additional cleanup precursor patch given you are
touching the relevant code anyway. It's a small one that you can
test so hope you don't mind doing that whilst here.

I'm relying on the incredibly small chance anyone has a variable regulator wired up to the reference that they are modifying at runtime. I have seen that done (once long ago on a crazy dev board for a really noisy humidity sensor) when the reference was VDD but not on a separate reference pin. That means we almost certainly won't break the existing parts and can't have a regression on your new one so we should be fine to make the change.

Thanks,

Jonathan

Quoted 67 lines

---

---
 drivers/iio/adc/Kconfig         |  2 +-
 drivers/iio/adc/ti-adc128s052.c | 40 +++++++++++++++++++++++++++++----
 2 files changed, 37 insertions(+), 5 deletions(-)
drivers/iio/adc/Kconfig +1 -1
index 849c90203071..148a52b3db94 100644
@@ -1425,7 +1425,7 @@ config TI_ADC128S052
 	depends on SPI
 	help
 	  If you say yes here you get support for Texas Instruments ADC128S052,
-	  ADC122S021 and ADC124S021 chips.
+	  ADC122S021, ADC124S021 and ROHM Semiconductor BD79104 chips.
 
 	  This driver can also be built as a module. If so, the module will be
 	  called ti-adc128s052.
drivers/iio/adc/ti-adc128s052.c +24 -3
index c68ee4e17a03..c7283d606d2e 100644
@@ -21,6 +21,9 @@
 struct adc128_configuration {
 	const struct iio_chan_spec	*channels;
 	u8				num_channels;
+	const char			*refname;
+	int				num_other_regulators;
+	const char * const		(*other_regulators)[];
 };
 
 struct adc128 {
@@ -119,10 +122,28 @@ static const struct iio_chan_spec adc124s021_channels[] = {
 	ADC128_VOLTAGE_CHANNEL(3),
 };
 
+static const char * const bd79104_regulators[] = { "iovdd" };
+
 static const struct adc128_configuration adc128_config[] = {
-	{ adc128s052_channels, ARRAY_SIZE(adc128s052_channels) },
-	{ adc122s021_channels, ARRAY_SIZE(adc122s021_channels) },
-	{ adc124s021_channels, ARRAY_SIZE(adc124s021_channels) },
+	{
+		.channels = adc128s052_channels,
+		.num_channels = ARRAY_SIZE(adc128s052_channels),
+		.refname = "vref",
+	}, {
+		.channels = adc122s021_channels,
+		.num_channels = ARRAY_SIZE(adc122s021_channels),
+		.refname = "vref",
+	}, {
+		.channels = adc124s021_channels,
+		.num_channels = ARRAY_SIZE(adc124s021_channels),
+		.refname = "vref",
+	}, {
+		.channels = adc128s052_channels,
+		.num_channels = ARRAY_SIZE(adc128s052_channels),
+		.refname = "vdd",
+		.other_regulators = &bd79104_regulators,
+		.num_other_regulators = 1,
+	},
 };
 
 static const struct iio_info adc128_info = {

drivers/iio/adc/ti-adc128s052.c static int adc128_probe(struct spi_device *spi) · line 181

Quoted 5 lines
drivers/iio/adc/ti-adc128s052.c +1 -1
@@ -157,7 +178,7 @@ static int adc128_probe(struct spi_device *spi)
 	indio_dev->channels = config->channels;
 	indio_dev->num_channels = config->num_channels;
 
-	adc->reg = devm_regulator_get(&spi->dev, "vref");
+	adc->reg = devm_regulator_get(&spi->dev, config->refname);

Hmm. It is very unusual for a reference regulator to be variable after power up. As such, maybe refactor the driver to use devm_regulator_get_enable_read_voltage() which will save a few lines of code and generally be easier to read.

That would need to be a separate precursor patch though.

Quoted 35 lines
drivers/iio/adc/ti-adc128s052.c +11 -0
 	if (IS_ERR(adc->reg))
 		return PTR_ERR(adc->reg);
 
@@ -169,6 +190,15 @@ static int adc128_probe(struct spi_device *spi)
 	if (ret)
 		return ret;
 
+	if (config->num_other_regulators) {
+		ret = devm_regulator_bulk_get_enable(&spi->dev,
+						config->num_other_regulators,
+						*config->other_regulators);
+		if (ret)
+			return dev_err_probe(&spi->dev, ret,
+					     "Failed to enable regulators\n");
+	}
+
 	devm_mutex_init(&spi->dev, &adc->lock);
 
 	return devm_iio_device_register(&spi->dev, indio_dev);
@@ -182,6 +212,7 @@ static const struct of_device_id adc128_of_match[] = {
 	{ .compatible = "ti,adc124s021", .data = &adc128_config[2] },
 	{ .compatible = "ti,adc124s051", .data = &adc128_config[2] },
 	{ .compatible = "ti,adc124s101", .data = &adc128_config[2] },
+	{ .compatible = "rohm,bd79104", .data = &adc128_config[3] },
 	{ },
 };
 MODULE_DEVICE_TABLE(of, adc128_of_match);
@@ -194,6 +225,7 @@ static const struct spi_device_id adc128_id[] = {
 	{ "adc124s021", (kernel_ulong_t)&adc128_config[2] },
 	{ "adc124s051", (kernel_ulong_t)&adc128_config[2] },
 	{ "adc124s101", (kernel_ulong_t)&adc128_config[2] },
+	{ "bd79104", (kernel_ulong_t)&adc128_config[3] },
 	{ }
 };
 MODULE_DEVICE_TABLE(spi, adc128_id);
author maintainer
#14 lore raw

Re: [PATCH 6/6] iio: adc: ti-adc128s052: Support ROHM BD79104

Quoted 45 lines · Jonathan Cameron
Quoted 5 lines · On Mon, 31 Mar 2025 11:03:58 +0300 Matti Vaittinen <[email protected]>…

The ROHM BD79104 ADC has identical SPI communication logic as the ti-adc128s052. Eg, SPI transfer should be 16 clk cycles, conversion is started when the CS is pulled low, and channel selection is done by writing the channel ID after two zero bits. Data is contained in big-endian format in the last 12 bits.

Nicely found match. Sometimes these are tricky to spot.

Quoted 19 lines

The BD79104 has two input voltage pins. Data sheet uses terms "vdd" and "iovdd". The "vdd" is used also as an analog reference voltage. Hence the driver expects finding these from the device-tree, instead of having the "vref" only as TI's driver.

NOTE: The TI's data sheet[1] does show that the TI's IC does actually have two voltage inputs as well. Pins are called Va (analog reference) and Vd (digital supply pin) - but I keep the existing driver behaviour for the TI's IC "as is", because I have no HW to test changes, and because I have no real need to touch it.

NOTE II: The BD79104 requires SPI MODE 3.

NOTE III: I used evaluation board "BD79104FV-EVK-001" made by ROHM. With this board I had to drop the SPI speed below the 20M which is mentioned in the data-sheet [2]. This, however, may be a limitation of the EVK board, not the component itself.

Quoted 5 lines

[1]: https://www.ti.com/lit/ds/symlink/adc128s052.pdf

[2]:
https://fscdn.rohm.com/en/products/databook/datasheet/ic/data_converter/dac/bd79104fv-la-e.pdf

Prefer Datasheet tags with # [1]
after them for the cross references.

Those belong here in the tag block (no blank lines)

Quoted 1 line

One request for an additional cleanup precursor patch given you are
touching the relevant code anyway. It's a small one that you can
test so hope you don't mind doing that whilst here.

Quoted 7 lines

I'm relying on the incredibly small chance anyone has a variable regulator wired up to the reference that they are modifying at runtime. I have seen that done (once long ago on a crazy dev board for a really noisy humidity sensor) when the reference was VDD but not on a separate reference pin. That means we almost certainly won't break the existing parts and can't have a regression on your new one so we should be fine to make the change.

The change you ask for is indeed small. I have no real objections against implementing it (and I actually wrote it already) - but I am still somewhat hesitant. As you say, (it seems like) the idea of the original code is to allow changing the vref at runtime. It looks to me this might've been intentional choice. I am not terribly happy about dropping the working functionality, when the gained simplification isn't particularly massive.

Because of this, I am thinking of adding the patch dropping the functionality as an RFC. Leaving that floating on the list for a while would at least have my ass partially covered ;)

I'd rather not delayed the support for the BD79104 though. So - would it be okay if I didn't implement the clean-up as a precursory patch, but did it as a last patch of the series? That will make it a tad more complex to review, but it'd allow taking the BD79104 changes in while leaving the RFC to float on a list. (Also, I'm not sure if you can push an RFC in next without taking it in for the cycle?)

Yours,
-- Matti

maintainer
#15 lore raw

Re: [PATCH 6/6] iio: adc: ti-adc128s052: Support ROHM BD79104

Quoted 54 lines · On Tue, 1 Apr 2025 15:33:15 +0300 Matti Vaittinen <[email protected]>…
Quoted 45 lines · Jonathan Cameron
Quoted 5 lines · On Mon, 31 Mar 2025 11:03:58 +0300 Matti Vaittinen <[email protected]>…

The ROHM BD79104 ADC has identical SPI communication logic as the ti-adc128s052. Eg, SPI transfer should be 16 clk cycles, conversion is started when the CS is pulled low, and channel selection is done by writing the channel ID after two zero bits. Data is contained in big-endian format in the last 12 bits.

Nicely found match. Sometimes these are tricky to spot.

Quoted 19 lines

The BD79104 has two input voltage pins. Data sheet uses terms "vdd" and "iovdd". The "vdd" is used also as an analog reference voltage. Hence the driver expects finding these from the device-tree, instead of having the "vref" only as TI's driver.

NOTE: The TI's data sheet[1] does show that the TI's IC does actually have two voltage inputs as well. Pins are called Va (analog reference) and Vd (digital supply pin) - but I keep the existing driver behaviour for the TI's IC "as is", because I have no HW to test changes, and because I have no real need to touch it.

NOTE II: The BD79104 requires SPI MODE 3.

NOTE III: I used evaluation board "BD79104FV-EVK-001" made by ROHM. With this board I had to drop the SPI speed below the 20M which is mentioned in the data-sheet [2]. This, however, may be a limitation of the EVK board, not the component itself.

Quoted 5 lines

[1]: https://www.ti.com/lit/ds/symlink/adc128s052.pdf

[2]:
https://fscdn.rohm.com/en/products/databook/datasheet/ic/data_converter/dac/bd79104fv-la-e.pdf

Prefer Datasheet tags with # [1]
after them for the cross references.

Those belong here in the tag block (no blank lines)

Quoted 1 line

One request for an additional cleanup precursor patch given you are
touching the relevant code anyway. It's a small one that you can
test so hope you don't mind doing that whilst here.

Quoted 7 lines

I'm relying on the incredibly small chance anyone has a variable regulator wired up to the reference that they are modifying at runtime. I have seen that done (once long ago on a crazy dev board for a really noisy humidity sensor) when the reference was VDD but not on a separate reference pin. That means we almost certainly won't break the existing parts and can't have a regression on your new one so we should be fine to make the change.

Quoted 7 lines

The change you ask for is indeed small. I have no real objections against implementing it (and I actually wrote it already) - but I am still somewhat hesitant. As you say, (it seems like) the idea of the original code is to allow changing the vref at runtime. It looks to me this might've been intentional choice. I am not terribly happy about dropping the working functionality, when the gained simplification isn't particularly massive.

Hmm. I suspect this was added at my request (or copied from where I requested it) Back when we did this there was no advantage in doing it at probe as it was just a question of store a value or store a pointer we had to get anyway. So I tended to advocate what I now think was a bit silly, that someone elses board might have it changing...

User space wise, what code checks for random scaling changes? So it was best effort at best anyway!

Quoted 11 lines

Because of this, I am thinking of adding the patch dropping the functionality as an RFC. Leaving that floating on the list for a while would at least have my ass partially covered ;)

I'd rather not delayed the support for the BD79104 though. So - would it be okay if I didn't implement the clean-up as a precursory patch, but did it as a last patch of the series? That will make it a tad more complex to review, but it'd allow taking the BD79104 changes in while leaving the RFC to float on a list. (Also, I'm not sure if you can push an RFC in next without taking it in for the cycle?)

I'll probably just merge it even as an RFC :) That way it's my fault if we break someone and they shout!

Jonathan

Quoted 4 lines

Yours,
-- Matti

author maintainer
#16 lore raw

Re: [PATCH 6/6] iio: adc: ti-adc128s052: Support ROHM BD79104

Quoted 65 lines · Jonathan Cameron
Quoted 54 lines · On Tue, 1 Apr 2025 15:33:15 +0300 Matti Vaittinen <[email protected]>…
Quoted 45 lines · Jonathan Cameron
Quoted 5 lines · On Mon, 31 Mar 2025 11:03:58 +0300 Matti Vaittinen <[email protected]>…

The ROHM BD79104 ADC has identical SPI communication logic as the ti-adc128s052. Eg, SPI transfer should be 16 clk cycles, conversion is started when the CS is pulled low, and channel selection is done by writing the channel ID after two zero bits. Data is contained in big-endian format in the last 12 bits.

Nicely found match. Sometimes these are tricky to spot.

Quoted 19 lines

The BD79104 has two input voltage pins. Data sheet uses terms "vdd" and "iovdd". The "vdd" is used also as an analog reference voltage. Hence the driver expects finding these from the device-tree, instead of having the "vref" only as TI's driver.

NOTE: The TI's data sheet[1] does show that the TI's IC does actually have two voltage inputs as well. Pins are called Va (analog reference) and Vd (digital supply pin) - but I keep the existing driver behaviour for the TI's IC "as is", because I have no HW to test changes, and because I have no real need to touch it.

NOTE II: The BD79104 requires SPI MODE 3.

NOTE III: I used evaluation board "BD79104FV-EVK-001" made by ROHM. With this board I had to drop the SPI speed below the 20M which is mentioned in the data-sheet [2]. This, however, may be a limitation of the EVK board, not the component itself.

Quoted 5 lines

[1]: https://www.ti.com/lit/ds/symlink/adc128s052.pdf

[2]:
https://fscdn.rohm.com/en/products/databook/datasheet/ic/data_converter/dac/bd79104fv-la-e.pdf

Prefer Datasheet tags with # [1]
after them for the cross references.

Those belong here in the tag block (no blank lines)

Quoted 1 line

One request for an additional cleanup precursor patch given you are
touching the relevant code anyway. It's a small one that you can
test so hope you don't mind doing that whilst here.

Quoted 7 lines

I'm relying on the incredibly small chance anyone has a variable regulator wired up to the reference that they are modifying at runtime. I have seen that done (once long ago on a crazy dev board for a really noisy humidity sensor) when the reference was VDD but not on a separate reference pin. That means we almost certainly won't break the existing parts and can't have a regression on your new one so we should be fine to make the change.

Quoted 7 lines

The change you ask for is indeed small. I have no real objections against implementing it (and I actually wrote it already) - but I am still somewhat hesitant. As you say, (it seems like) the idea of the original code is to allow changing the vref at runtime. It looks to me this might've been intentional choice. I am not terribly happy about dropping the working functionality, when the gained simplification isn't particularly massive.

Quoted 8 lines

Hmm. I suspect this was added at my request (or copied from where I requested it) Back when we did this there was no advantage in doing it at probe as it was just a question of store a value or store a pointer we had to get anyway. So I tended to advocate what I now think was a bit silly, that someone elses board might have it changing...

User space wise, what code checks for random scaling changes? So it was best effort at best anyway!

Ah, right. I suppose this should've been accompanied with scale setting which could've changed the regulator voltage - and I have no idea if such hardware would make any sense.

The slim chance I can imagine is that the reference voltage can't be set/known at probe time.

Quoted 11 lines
Quoted 10 lines

Because of this, I am thinking of adding the patch dropping the functionality as an RFC. Leaving that floating on the list for a while would at least have my ass partially covered ;)

I'd rather not delayed the support for the BD79104 though. So - would it be okay if I didn't implement the clean-up as a precursory patch, but did it as a last patch of the series? That will make it a tad more complex to review, but it'd allow taking the BD79104 changes in while leaving the RFC to float on a list. (Also, I'm not sure if you can push an RFC in next without taking it in for the cycle?)

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I'll probably just merge it even as an RFC :) That way it's my fault if we break someone and they shout!

That's fine for me. Well, doing it this way around (as a last patch) should ease reverting, should it be needed.

Yours
-- Matti

maintainer
#17 lore raw

Re: [PATCH 6/6] iio: adc: ti-adc128s052: Support ROHM BD79104

Quoted 72 lines · On Mon, 7 Apr 2025 09:10:05 +0300 Matti Vaittinen <[email protected]>…
Quoted 71 lines · Jonathan Cameron
Quoted 54 lines · On Tue, 1 Apr 2025 15:33:15 +0300 Matti Vaittinen <[email protected]>…
Quoted 45 lines · Jonathan Cameron
Quoted 5 lines · On Mon, 31 Mar 2025 11:03:58 +0300 Matti Vaittinen <[email protected]>…

The ROHM BD79104 ADC has identical SPI communication logic as the ti-adc128s052. Eg, SPI transfer should be 16 clk cycles, conversion is started when the CS is pulled low, and channel selection is done by writing the channel ID after two zero bits. Data is contained in big-endian format in the last 12 bits.

Nicely found match. Sometimes these are tricky to spot.

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The BD79104 has two input voltage pins. Data sheet uses terms "vdd" and "iovdd". The "vdd" is used also as an analog reference voltage. Hence the driver expects finding these from the device-tree, instead of having the "vref" only as TI's driver.

NOTE: The TI's data sheet[1] does show that the TI's IC does actually have two voltage inputs as well. Pins are called Va (analog reference) and Vd (digital supply pin) - but I keep the existing driver behaviour for the TI's IC "as is", because I have no HW to test changes, and because I have no real need to touch it.

NOTE II: The BD79104 requires SPI MODE 3.

NOTE III: I used evaluation board "BD79104FV-EVK-001" made by ROHM. With this board I had to drop the SPI speed below the 20M which is mentioned in the data-sheet [2]. This, however, may be a limitation of the EVK board, not the component itself.

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[1]: https://www.ti.com/lit/ds/symlink/adc128s052.pdf

[2]:
https://fscdn.rohm.com/en/products/databook/datasheet/ic/data_converter/dac/bd79104fv-la-e.pdf

Prefer Datasheet tags with # [1]
after them for the cross references.

Those belong here in the tag block (no blank lines)

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One request for an additional cleanup precursor patch given you are
touching the relevant code anyway. It's a small one that you can
test so hope you don't mind doing that whilst here.

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I'm relying on the incredibly small chance anyone has a variable regulator wired up to the reference that they are modifying at runtime. I have seen that done (once long ago on a crazy dev board for a really noisy humidity sensor) when the reference was VDD but not on a separate reference pin. That means we almost certainly won't break the existing parts and can't have a regression on your new one so we should be fine to make the change.

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The change you ask for is indeed small. I have no real objections against implementing it (and I actually wrote it already) - but I am still somewhat hesitant. As you say, (it seems like) the idea of the original code is to allow changing the vref at runtime. It looks to me this might've been intentional choice. I am not terribly happy about dropping the working functionality, when the gained simplification isn't particularly massive.

Hmm. I suspect this was added at my request (or copied from where I requested it) Back when we did this there was no advantage in doing it at probe as it was just a question of store a value or store a pointer we had to get anyway. So I tended to advocate what I now think was a bit silly, that someone elses board might have it changing...

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User space wise, what code checks for random scaling changes? So it was best effort at best anyway!

Ah, right. I suppose this should've been accompanied with scale setting which could've changed the regulator voltage - and I have no idea if such hardware would make any sense.

In theory possible but I suspect expensive as a controllable precision reference would be needed (a DAC probably wouldn't have enough current?)

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The slim chance I can imagine is that the reference voltage can't be set/known at probe time.

Agreed. It can in theory happen and did on one ancient board I had where the reference voltage was wired to a pair of devices and one had a higher minimum voltage than the other. That was pre DT times though and I suspect now we'd just put the voltage that works for both in DT.

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Because of this, I am thinking of adding the patch dropping the functionality as an RFC. Leaving that floating on the list for a while would at least have my ass partially covered ;)

I'd rather not delayed the support for the BD79104 though. So - would it be okay if I didn't implement the clean-up as a precursory patch, but did it as a last patch of the series? That will make it a tad more complex to review, but it'd allow taking the BD79104 changes in while leaving the RFC to float on a list. (Also, I'm not sure if you can push an RFC in next without taking it in for the cycle?)

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I'll probably just merge it even as an RFC :) That way it's my fault if we break someone and they shout!

That's fine for me. Well, doing it this way around (as a last patch) should ease reverting, should it be needed.

Absolutely.

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Yours
-- Matti