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Enable FLEXCOMs and GMAC for SAMA7D65 SoC

PATCH Applied [email protected] 4 participants 15 messages Apr 1, 2025 – Apr 27, 2025

Subsystems (4)
Networking Network drivers Device tree bindings Arm/Microchip (AT91) SoC support
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#0 lore raw

cover Enable FLEXCOMs and GMAC for SAMA7D65 SoC

From: Ryan Wanner <[email protected]>

This patch set adds all the supported FLEXCOMs for the SAMA7D65 SoC. This also adds the GMAC interfaces and enables GMAC0 interface for the SAMA7D65 SoC.

With the FLEXCOMs added to the SoC the MCP16502 and the MAC address EEPROM are both added to flexcom10.

The dt-binding for USART is here [1]. And the dt-binding for DMA has been applied here [2].

1) https://lore.kernel.org/linux-arm-kernel/20250306160318.vhPzJLjl19Vq9am9RRbuv5ddmQ6GCEND-YNvPKKtAtU@z/
2) https://lore.kernel.org/linux-arm-kernel/[email protected]/

Ryan Wanner (6):
dt-bindings: net: cdns,macb: add sama7d65 ethernet interface
ARM: dts: microchip: sama7d65: Add gmac interfaces for sama7d65 SoC
ARM: dts: microchip: sama7d65: Add FLEXCOMs to sama7d65 SoC
ARM: dts: microchip: sama7d65: Enable GMAC interface
ARM: dts: microchip: sama7d65: Add MCP16502 to sama7d65 curiosity
ARM: dts: microchip: sama7d65_curiosity: add EEPROM

 .../devicetree/bindings/net/cdns,macb.yaml    |   1 +
 .../dts/microchip/at91-sama7d65_curiosity.dts | 207 ++++++++++++
 arch/arm/boot/dts/microchip/sama7d65.dtsi     | 299 ++++++++++++++++++
 3 files changed, 507 insertions(+)
Signature · 1 line
2.43.0
author
#1 lore raw

PATCH 1/6 dt-bindings: net: cdns,macb: add sama7d65 ethernet interface

From: Ryan Wanner <[email protected]>

Add documentation for sama7d65 ethernet interface.

Signed-off-by Ryan Wanner <[email protected]>
---
 Documentation/devicetree/bindings/net/cdns,macb.yaml | 1 +
 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/net/cdns,macb.yaml +1 -0
index 3c30dd23cd4e..eeb9b6592720 100644
@@ -62,6 +62,7 @@ properties:
       - items:
           - enum:
               - microchip,sam9x7-gem     # Microchip SAM9X7 gigabit ethernet interface
+              - microchip,sama7d65-gem   # Microchip SAMA7D65 gigabit ethernet interface
           - const: microchip,sama7g5-gem # Microchip SAMA7G5 gigabit ethernet interface
 
   reg:
Signature · 1 line
2.43.0
maintainer
#2 lore raw

Re: [PATCH 1/6] dt-bindings: net: cdns,macb: add sama7d65 ethernet interface

Quoted 3 lines · On Tue, 1 Apr 2025 09:13:17 -0700 [email protected] wrote:

From: Ryan Wanner <[email protected]>

Add documentation for sama7d65 ethernet interface.

## Form letter - net-next-closed

Linus already pulled net-next material v6.15 and therefore net-next is closed for new drivers, features, code refactoring and optimizations. We are currently accepting bug fixes only.

Please repost when net-next reopens after Apr 7th.

RFC patches sent for review only are obviously welcome at any time.

See: https://www.kernel.org/doc/html/next/process/maintainer-netdev.html#development-cycle

Signature · 2 lines
pw-bot: defer
pv-bot: closed
Acked-by on v1 1/6
#3 lore raw

Re: [PATCH 1/6] dt-bindings: net: cdns,macb: add sama7d65 ethernet interface

In reply to [email protected]
Quoted 5 lines · On Tue, Apr 01, 2025 at 09:13:17AM -0700, [email protected] wrote:

From: Ryan Wanner <[email protected]>

Add documentation for sama7d65 ethernet interface.

Signed-off-by Ryan Wanner <[email protected]>
Acked-by Conor Dooley <[email protected]>
Quoted 20 lines
---
 Documentation/devicetree/bindings/net/cdns,macb.yaml | 1 +
 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/net/cdns,macb.yaml +1 -0
index 3c30dd23cd4e..eeb9b6592720 100644
@@ -62,6 +62,7 @@ properties:
       - items:
           - enum:
               - microchip,sam9x7-gem     # Microchip SAM9X7 gigabit ethernet interface
+              - microchip,sama7d65-gem   # Microchip SAMA7D65 gigabit ethernet interface
           - const: microchip,sama7g5-gem # Microchip SAMA7G5 gigabit ethernet interface
 
   reg:
Signature · 1 line
2.43.0
author
#4 lore raw

PATCH 2/6 ARM: dts: microchip: sama7d65: Add gmac interfaces for sama7d65 SoC

In reply to [email protected]

From: Ryan Wanner <[email protected]>

Add support for GMAC interfaces on SAMA7D65 SoC.

Signed-off-by Ryan Wanner <[email protected]>
---
 arch/arm/boot/dts/microchip/sama7d65.dtsi | 32 +++++++++++++++++++++++
 1 file changed, 32 insertions(+)
arch/arm/boot/dts/microchip/sama7d65.dtsi +32 -0
index b6710ccd4c36..cd17b838e179 100644
@@ -169,6 +169,38 @@ dma1: dma-controller@e1614000 {
 			status = "disabled";
 		};
 
+		gmac0: ethernet@e1618000 {
+			compatible = "microchip,sama7d65-gem", "microchip,sama7g5-gem";
+			reg = <0xe1618000 0x2000>;
+			interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_GCK 46>, <&pmc PMC_TYPE_GCK 49>;
+			clock-names = "pclk", "hclk", "tx_clk", "tsu_clk";
+			assigned-clocks = <&pmc PMC_TYPE_GCK 46>, <&pmc PMC_TYPE_GCK 49>;
+			assigned-clock-rates = <125000000>, <200000000>;
+			status = "disabled";
+		};
+
+		gmac1: ethernet@e161c000 {
+			compatible = "microchip,sama7d65-gem", "microchip,sama7g5-gem";
+			reg = <0xe161c000 0x2000>;
+			interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 47>, <&pmc PMC_TYPE_PERIPHERAL 47>,<&pmc PMC_TYPE_GCK 47>, <&pmc PMC_TYPE_GCK 50>;
+			clock-names = "pclk", "hclk", "tx_clk", "tsu_clk";
+			assigned-clocks = <&pmc PMC_TYPE_GCK 47>, <&pmc PMC_TYPE_GCK 50>;
+			assigned-clock-rates = <125000000>, <200000000>;
+			status = "disabled";
+		};
+
 		pit64b0: timer@e1800000 {
 			compatible = "microchip,sama7d65-pit64b", "microchip,sam9x60-pit64b";
 			reg = <0xe1800000 0x100>;
Signature · 1 line
2.43.0
author
#5 lore raw

PATCH 3/6 ARM: dts: microchip: sama7d65: Add FLEXCOMs to sama7d65 SoC

In reply to [email protected]

From: Ryan Wanner <[email protected]>

Add FLEXCOMs to the SAMA7D65 SoC device tree.

Signed-off-by Ryan Wanner <[email protected]>
---
 arch/arm/boot/dts/microchip/sama7d65.dtsi | 267 ++++++++++++++++++++++
 1 file changed, 267 insertions(+)
arch/arm/boot/dts/microchip/sama7d65.dtsi +267 -0
index cd17b838e179..9f453c686dc6 100644
@@ -217,6 +217,199 @@ pit64b1: timer@e1804000 {
 			clock-names = "pclk", "gclk";
 		};
 
+		flx0: flexcom@e1820000 {
+			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
+			reg = <0xe1820000 0x200>;
+			ranges = <0x0 0xe1820000 0x800>;
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 34>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			status = "disabled";
+
+			uart0: serial@200 {
+				compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
+				reg = <0x200 0x200>;
+				interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 34>;
+				clock-names = "usart";
+				dmas = <&dma1 AT91_XDMAC_DT_PERID(6)>,
+					<&dma1 AT91_XDMAC_DT_PERID(5)>;
+				dma-names = "tx", "rx";
+				atmel,use-dma-rx;
+				atmel,use-dma-tx;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
+				status = "disabled";
+			};
+
+			i2c0: i2c@600 {
+				compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
+				reg = <0x600 0x200>;
+				interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 34>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				atmel,fifo-size = <32>;
+				dmas = <&dma0 AT91_XDMAC_DT_PERID(6)>,
+					<&dma0 AT91_XDMAC_DT_PERID(5)>;
+				dma-names = "tx", "rx";
+				status = "disabled";
+			};
+		};
+
+		flx1: flexcom@e1824000 {
+			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
+			reg = <0xe1824000 0x200>;
+			ranges = <0x0 0xe1824000 0x800>;
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 35>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			status = "disabled";
+
+			spi1: spi@400 {
+				compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi";
+				reg = <0x400 0x200>;
+				interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 35>;
+				clock-names = "spi_clk";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				atmel,fifo-size = <32>;
+				dmas = <&dma0 AT91_XDMAC_DT_PERID(8)>,
+					<&dma0 AT91_XDMAC_DT_PERID(7)>;
+				dma-names = "tx", "rx";
+				status = "disabled";
+			};
+
+			i2c1: i2c@600 {
+				compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
+				reg = <0x600 0x200>;
+				interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 35>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				atmel,fifo-size = <32>;
+				dmas = <&dma0 AT91_XDMAC_DT_PERID(8)>,
+					<&dma0 AT91_XDMAC_DT_PERID(7)>;
+				dma-names = "tx", "rx";
+				status = "disabled";
+			};
+		};
+
+		flx2: flexcom@e1828000 {
+			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
+			reg = <0xe1828000 0x200>;
+			ranges = <0x0 0xe1828000 0x800>;
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 36>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			status = "disabled";
+
+			uart2: serial@200 {
+				compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
+				reg = <0x200 0x200>;
+				interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 36>;
+				clock-names = "usart";
+				dmas = <&dma1 AT91_XDMAC_DT_PERID(10)>,
+					<&dma1 AT91_XDMAC_DT_PERID(9)>;
+				dma-names = "tx", "rx";
+				atmel,use-dma-rx;
+				atmel,use-dma-tx;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
+				status = "disabled";
+			};
+		};
+
+		flx3: flexcom@e182c000 {
+			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
+			reg = <0xe182c000 0x200>;
+			ranges = <0x0 0xe182c000 0x800>;
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			status = "disabled";
+
+			i2c3: i2c@600 {
+				compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
+				reg = <0x600 0x200>;
+				interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				atmel,fifo-size = <32>;
+				dmas = <&dma0 AT91_XDMAC_DT_PERID(12)>,
+						<&dma0 AT91_XDMAC_DT_PERID(11)>;
+				dma-names = "tx", "rx";
+				status = "disabled";
+			};
+
+		};
+
+		flx4: flexcom@e2018000 {
+			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
+			reg = <0xe2018000 0x200>;
+			ranges = <0x0 0xe2018000 0x800>;
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			status = "disabled";
+
+			uart4: serial@200 {
+				compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
+				reg = <0x200 0x200>;
+				interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
+				clock-names = "usart";
+				dmas = <&dma1 AT91_XDMAC_DT_PERID(14)>,
+					<&dma1 AT91_XDMAC_DT_PERID(13)>;
+				dma-names = "tx", "rx";
+				atmel,use-dma-rx;
+				atmel,use-dma-tx;
+				atmel,fifo-size = <16>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
+				status = "disabled";
+			};
+
+			spi4: spi@400 {
+				compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi";
+				reg = <0x400 0x200>;
+				interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
+				clock-names = "spi_clk";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				atmel,fifo-size = <32>;
+				dmas = <&dma0 AT91_XDMAC_DT_PERID(14)>,
+					<&dma0 AT91_XDMAC_DT_PERID(13)>;
+				dma-names = "tx", "rx";
+				status = "disabled";
+			};
+		};
+
+		flx5: flexcom@e201c000 {
+			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
+			reg = <0xe201c000 0x200>;
+			ranges = <0x0 0xe201c000 0x800>;
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			status = "disabled";
+
+			i2c5: i2c@600 {
+				compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
+				reg = <0x600 0x200>;
+				interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				atmel,fifo-size = <32>;
+				dmas = <&dma0 AT91_XDMAC_DT_PERID(16)>,
+						<&dma0 AT91_XDMAC_DT_PERID(15)>;
+				dma-names = "tx", "rx";
+				status = "disabled";
+			};
+		};
+
 		flx6: flexcom@e2020000 {
 			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
 			reg = <0xe2020000 0x200>;

@@ -238,6 +431,80 @@ uart6: serial@200 {
 			};
 		};
 
+		flx7: flexcom@e2024000 {
+			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
+			reg = <0xe2024000 0x200>;
+			ranges = <0x0 0xe2024000 0x800>;
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			status = "disabled";
+
+			uart7: serial@200 {
+				compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
+				reg = <0x200 0x200>;
+				interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
+				clock-names = "usart";
+				dmas = <&dma1 AT91_XDMAC_DT_PERID(20)>,
+					<&dma1 AT91_XDMAC_DT_PERID(19)>;
+				dma-names = "tx", "rx";
+				atmel,use-dma-rx;
+				atmel,use-dma-tx;
+				atmel,fifo-size = <16>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
+				status = "disabled";
+			};
+		};
+
+		flx8: flexcom@e281c000{
+			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
+			reg = <0xe281c000 0x200>;
+			ranges = <0x0 0xe281c000 0x800>;
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			status = "disabled";
+
+			i2c8: i2c@600 {
+				compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
+				reg = <0x600 0x200>;
+				interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				atmel,fifo-size = <32>;
+				dmas = <&dma0 AT91_XDMAC_DT_PERID(22)>,
+					<&dma0 AT91_XDMAC_DT_PERID(21)>;
+				dma-names = "tx", "rx";
+				status = "disabled";
+			};
+		};
+
+		flx9: flexcom@e2820000 {
+			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
+			reg = <0xe2820000 0x200>;
+			ranges = <0x0 0xe281c000 0x800>;
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			status = "disabled";
+
+			i2c9: i2c@600 {
+				compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
+				reg = <0x600 0x200>;
+				interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				atmel,fifo-size = <32>;
+				dmas = <&dma0 AT91_XDMAC_DT_PERID(24)>,
+					<&dma0 AT91_XDMAC_DT_PERID(23)>;
+				dma-names = "tx", "rx";
+				status = "disabled";
+			};
+		};
+
 		flx10: flexcom@e2824000 {
 			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
 			reg = <0xe2824000 0x200>;
Signature · 1 line
2.43.0
maintainer
#6 lore raw

Re: [PATCH 3/6] ARM: dts: microchip: sama7d65: Add FLEXCOMs to sama7d65 SoC

Hi, Ryan,

Quoted 24 lines · On 01.04.2025 19:13, [email protected] wrote:

From: Ryan Wanner <[email protected]>

Add FLEXCOMs to the SAMA7D65 SoC device tree.

Signed-off-by Ryan Wanner <[email protected]>
---
 arch/arm/boot/dts/microchip/sama7d65.dtsi | 267 ++++++++++++++++++++++
 1 file changed, 267 insertions(+)
arch/arm/boot/dts/microchip/sama7d65.dtsi +7 -0
index cd17b838e179..9f453c686dc6 100644
@@ -217,6 +217,199 @@ pit64b1: timer@e1804000 {
 			clock-names = "pclk", "gclk";
 		};
 
+		flx0: flexcom@e1820000 {
+			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
+			reg = <0xe1820000 0x200>;
+			ranges = <0x0 0xe1820000 0x800>;
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 34>;
+			#address-cells = <1>;
+			#size-cells = <1>;

arch/arm/boot/dts/microchip/sama7d65.dtsi pit64b1: timer@e1804000 { · line 236

Quoted 10 lines
arch/arm/boot/dts/microchip/sama7d65.dtsi +10 -0
+			status = "disabled";
+
+			uart0: serial@200 {
+				compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
+				reg = <0x200 0x200>;
+				interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 34>;
+				clock-names = "usart";
+				dmas = <&dma1 AT91_XDMAC_DT_PERID(6)>,
+					<&dma1 AT91_XDMAC_DT_PERID(5)>;

This here ^ should be aligned with the "<" on
the previous line.

Same for the rest of dmas on this file.

Quoted 30 lines
arch/arm/boot/dts/microchip/sama7d65.dtsi +30 -0
+				dma-names = "tx", "rx";
+				atmel,use-dma-rx;
+				atmel,use-dma-tx;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
+				status = "disabled";
+			};
+
+			i2c0: i2c@600 {
+				compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
+				reg = <0x600 0x200>;
+				interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 34>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				atmel,fifo-size = <32>;
+				dmas = <&dma0 AT91_XDMAC_DT_PERID(6)>,
+					<&dma0 AT91_XDMAC_DT_PERID(5)>;
+				dma-names = "tx", "rx";
+				status = "disabled";
+			};
+		};
+
+		flx1: flexcom@e1824000 {
+			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
+			reg = <0xe1824000 0x200>;
+			ranges = <0x0 0xe1824000 0x800>;
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 35>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			status = "disabled";

arch/arm/boot/dts/microchip/sama7d65.dtsi pit64b1: timer@e1804000 { · line 276

Quoted 10 lines
arch/arm/boot/dts/microchip/sama7d65.dtsi +10 -0
+
+			spi1: spi@400 {
+				compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi";
+				reg = <0x400 0x200>;
+				interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 35>;
+				clock-names = "spi_clk";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				atmel,fifo-size = <32>;

Vendor specific properties should be placed at the end of the node.

Quoted 160 lines
arch/arm/boot/dts/microchip/sama7d65.dtsi +153 -0
+				dmas = <&dma0 AT91_XDMAC_DT_PERID(8)>,
+					<&dma0 AT91_XDMAC_DT_PERID(7)>;
+				dma-names = "tx", "rx";
+				status = "disabled";
+			};
+
+			i2c1: i2c@600 {
+				compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
+				reg = <0x600 0x200>;
+				interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 35>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				atmel,fifo-size = <32>;
+				dmas = <&dma0 AT91_XDMAC_DT_PERID(8)>,
+					<&dma0 AT91_XDMAC_DT_PERID(7)>;
+				dma-names = "tx", "rx";
+				status = "disabled";
+			};
+		};
+
+		flx2: flexcom@e1828000 {
+			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
+			reg = <0xe1828000 0x200>;
+			ranges = <0x0 0xe1828000 0x800>;
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 36>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			status = "disabled";
+
+			uart2: serial@200 {
+				compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
+				reg = <0x200 0x200>;
+				interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 36>;
+				clock-names = "usart";
+				dmas = <&dma1 AT91_XDMAC_DT_PERID(10)>,
+					<&dma1 AT91_XDMAC_DT_PERID(9)>;
+				dma-names = "tx", "rx";
+				atmel,use-dma-rx;
+				atmel,use-dma-tx;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
+				status = "disabled";
+			};
+		};
+
+		flx3: flexcom@e182c000 {
+			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
+			reg = <0xe182c000 0x200>;
+			ranges = <0x0 0xe182c000 0x800>;
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			status = "disabled";
+
+			i2c3: i2c@600 {
+				compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
+				reg = <0x600 0x200>;
+				interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				atmel,fifo-size = <32>;
+				dmas = <&dma0 AT91_XDMAC_DT_PERID(12)>,
+						<&dma0 AT91_XDMAC_DT_PERID(11)>;
+				dma-names = "tx", "rx";
+				status = "disabled";
+			};
+
+		};
+
+		flx4: flexcom@e2018000 {
+			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
+			reg = <0xe2018000 0x200>;
+			ranges = <0x0 0xe2018000 0x800>;
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			status = "disabled";
+
+			uart4: serial@200 {
+				compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
+				reg = <0x200 0x200>;
+				interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
+				clock-names = "usart";
+				dmas = <&dma1 AT91_XDMAC_DT_PERID(14)>,
+					<&dma1 AT91_XDMAC_DT_PERID(13)>;
+				dma-names = "tx", "rx";
+				atmel,use-dma-rx;
+				atmel,use-dma-tx;
+				atmel,fifo-size = <16>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
+				status = "disabled";
+			};
+
+			spi4: spi@400 {
+				compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi";
+				reg = <0x400 0x200>;
+				interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
+				clock-names = "spi_clk";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				atmel,fifo-size = <32>;
+				dmas = <&dma0 AT91_XDMAC_DT_PERID(14)>,
+					<&dma0 AT91_XDMAC_DT_PERID(13)>;
+				dma-names = "tx", "rx";
+				status = "disabled";
+			};
+		};
+
+		flx5: flexcom@e201c000 {
+			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
+			reg = <0xe201c000 0x200>;
+			ranges = <0x0 0xe201c000 0x800>;
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			status = "disabled";
+
+			i2c5: i2c@600 {
+				compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
+				reg = <0x600 0x200>;
+				interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				atmel,fifo-size = <32>;
+				dmas = <&dma0 AT91_XDMAC_DT_PERID(16)>,
+						<&dma0 AT91_XDMAC_DT_PERID(15)>;
+				dma-names = "tx", "rx";
+				status = "disabled";
+			};
+		};
+
 		flx6: flexcom@e2020000 {
 			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
 			reg = <0xe2020000 0x200>;

@@ -238,6 +431,80 @@ uart6: serial@200 {
 			};
 		};
 
+		flx7: flexcom@e2024000 {
+			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
+			reg = <0xe2024000 0x200>;
+			ranges = <0x0 0xe2024000 0x800>;
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			status = "disabled";
+
+			uart7: serial@200 {
+				compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
+				reg = <0x200 0x200>;
+				interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
+				clock-names = "usart";
+				dmas = <&dma1 AT91_XDMAC_DT_PERID(20)>,
+					<&dma1 AT91_XDMAC_DT_PERID(19)>;

arch/arm/boot/dts/microchip/sama7d65.dtsi uart6: serial@200 { · line 460

Quoted 10 lines
arch/arm/boot/dts/microchip/sama7d65.dtsi +10 -0
+				dma-names = "tx", "rx";
+				atmel,use-dma-rx;
+				atmel,use-dma-tx;
+				atmel,fifo-size = <16>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
+				status = "disabled";
+			};
+		};
+
+		flx8: flexcom@e281c000{

Missing space here -------------------^

As these are mainly cosmetics I will adjust while applying.

Thank you,
Claudiu

Quoted 50 lines
arch/arm/boot/dts/microchip/sama7d65.dtsi +47 -0
+			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
+			reg = <0xe281c000 0x200>;
+			ranges = <0x0 0xe281c000 0x800>;
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			status = "disabled";
+
+			i2c8: i2c@600 {
+				compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
+				reg = <0x600 0x200>;
+				interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				atmel,fifo-size = <32>;
+				dmas = <&dma0 AT91_XDMAC_DT_PERID(22)>,
+					<&dma0 AT91_XDMAC_DT_PERID(21)>;
+				dma-names = "tx", "rx";
+				status = "disabled";
+			};
+		};
+
+		flx9: flexcom@e2820000 {
+			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
+			reg = <0xe2820000 0x200>;
+			ranges = <0x0 0xe281c000 0x800>;
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			status = "disabled";
+
+			i2c9: i2c@600 {
+				compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
+				reg = <0x600 0x200>;
+				interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				atmel,fifo-size = <32>;
+				dmas = <&dma0 AT91_XDMAC_DT_PERID(24)>,
+					<&dma0 AT91_XDMAC_DT_PERID(23)>;
+				dma-names = "tx", "rx";
+				status = "disabled";
+			};
+		};
+
 		flx10: flexcom@e2824000 {
 			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
 			reg = <0xe2824000 0x200>;
author
#7 lore raw

PATCH 4/6 ARM: dts: microchip: sama7d65: Enable GMAC interface

In reply to [email protected]

From: Ryan Wanner <[email protected]>

Enable GMAC0 interface for sama7d65_curiosity board.

Signed-off-by Ryan Wanner <[email protected]>
---
 .../dts/microchip/at91-sama7d65_curiosity.dts | 51 +++++++++++++++++++
 1 file changed, 51 insertions(+)
arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts +51 -0
index 30fdc4f55a3b..441370dbb4c2 100644
@@ -105,7 +105,58 @@ &main_xtal {
 	clock-frequency = <24000000>;
 };
 
+&gmac0 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_gmac0_default
+		     &pinctrl_gmac0_mdio_default
+		     &pinctrl_gmac0_txck_default
+		     &pinctrl_gmac0_phy_irq>;
+	phy-mode = "rgmii-id";
+	status = "okay";
+
+	ethernet-phy@7 {
+		reg = <0x7>;
+		interrupt-parent = <&pioa>;
+		interrupts = <PIN_PC1 IRQ_TYPE_LEVEL_LOW>;
+		status = "okay";
+	};
+};
 &pioa {
+	pinctrl_gmac0_default: gmac0-default {
+		pinmux = <PIN_PA26__G0_TX0>,
+			 <PIN_PA27__G0_TX1>,
+			 <PIN_PB4__G0_TX2>,
+			 <PIN_PB5__G0_TX3>,
+			 <PIN_PA29__G0_RX0>,
+			 <PIN_PA30__G0_RX1>,
+			 <PIN_PB2__G0_RX2>,
+			 <PIN_PB6__G0_RX3>,
+			 <PIN_PA25__G0_TXCTL>,
+			 <PIN_PB3__G0_RXCK>,
+			 <PIN_PA28__G0_RXCTL>;
+		slew-rate = <0>;
+		bias-disable;
+	};
+
+	pinctrl_gmac0_mdio_default: gmac0-mdio-default {
+		pinmux = <PIN_PA31__G0_MDC>,
+			 <PIN_PB0__G0_MDIO>;
+		bias-disable;
+	};
+
+	pinctrl_gmac0_phy_irq: gmac0-phy-irq {
+		pinmux = <PIN_PC1__GPIO>;
+		bias-disable;
+	};
+
+	pinctrl_gmac0_txck_default: gmac0-txck-default {
+		pinmux = <PIN_PB1__G0_REFCK>;
+		slew-rate = <0>;
+		bias-pull-up;
+	};
+
 	pinctrl_i2c10_default: i2c10-default{
 		pinmux = <PIN_PB19__FLEXCOM10_IO1>,
 			 <PIN_PB20__FLEXCOM10_IO0>;
Signature · 1 line
2.43.0
maintainer
#8 lore raw

Re: [PATCH 4/6] ARM: dts: microchip: sama7d65: Enable GMAC interface

Hi, Ryan,

Quoted 14 lines · On 01.04.2025 19:13, [email protected] wrote:

From: Ryan Wanner <[email protected]>

Enable GMAC0 interface for sama7d65_curiosity board.

Signed-off-by Ryan Wanner <[email protected]>
---
 .../dts/microchip/at91-sama7d65_curiosity.dts | 51 +++++++++++++++++++
 1 file changed, 51 insertions(+)
arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts +0 -0
index 30fdc4f55a3b..441370dbb4c2 100644

arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts &main_xtal { · line 108

Quoted 4 lines
arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts +1 -0
@@ -105,7 +105,58 @@ &main_xtal {
 	clock-frequency = <24000000>;
 };
 
+&gmac0 {

Please keep nodes alphanumerically sorted.

Quoted 5 lines
arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts +5 -0
+	#address-cells = <1>;
+	#size-cells = <0>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_gmac0_default
+		     &pinctrl_gmac0_mdio_default

arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts &main_xtal { · line 123

Quoted 10 lines
arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts +10 -0
+		     &pinctrl_gmac0_txck_default
+		     &pinctrl_gmac0_phy_irq>;
+	phy-mode = "rgmii-id";
+	status = "okay";
+
+	ethernet-phy@7 {
+		reg = <0x7>;
+		interrupt-parent = <&pioa>;
+		interrupts = <PIN_PC1 IRQ_TYPE_LEVEL_LOW>;
+		status = "okay";

No need for status here, default is okay.

arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts &main_xtal { · line 125

Quoted 2 lines
arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts +2 -0
+	};
+};

Missing blank line here.

As this are mainly cosmetics I will adjust while applying.

Thank you,
Claudiu

Quoted 37 lines
arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts +33 -0
 &pioa {
+	pinctrl_gmac0_default: gmac0-default {
+		pinmux = <PIN_PA26__G0_TX0>,
+			 <PIN_PA27__G0_TX1>,
+			 <PIN_PB4__G0_TX2>,
+			 <PIN_PB5__G0_TX3>,
+			 <PIN_PA29__G0_RX0>,
+			 <PIN_PA30__G0_RX1>,
+			 <PIN_PB2__G0_RX2>,
+			 <PIN_PB6__G0_RX3>,
+			 <PIN_PA25__G0_TXCTL>,
+			 <PIN_PB3__G0_RXCK>,
+			 <PIN_PA28__G0_RXCTL>;
+		slew-rate = <0>;
+		bias-disable;
+	};
+
+	pinctrl_gmac0_mdio_default: gmac0-mdio-default {
+		pinmux = <PIN_PA31__G0_MDC>,
+			 <PIN_PB0__G0_MDIO>;
+		bias-disable;
+	};
+
+	pinctrl_gmac0_phy_irq: gmac0-phy-irq {
+		pinmux = <PIN_PC1__GPIO>;
+		bias-disable;
+	};
+
+	pinctrl_gmac0_txck_default: gmac0-txck-default {
+		pinmux = <PIN_PB1__G0_REFCK>;
+		slew-rate = <0>;
+		bias-pull-up;
+	};
+
 	pinctrl_i2c10_default: i2c10-default{
 		pinmux = <PIN_PB19__FLEXCOM10_IO1>,
 			 <PIN_PB20__FLEXCOM10_IO0>;
author
#9 lore raw

PATCH 5/6 ARM: dts: microchip: sama7d65: Add MCP16502 to sama7d65 curiosity

In reply to [email protected]

From: Ryan Wanner <[email protected]>

Add MCP16502 to the sama7d65_curiosity board to control voltages in the MPU. The device is connected to twi 10 interface

Signed-off-by Ryan Wanner <[email protected]>
---
 .../dts/microchip/at91-sama7d65_curiosity.dts | 135 ++++++++++++++++++
 1 file changed, 135 insertions(+)
arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts +135 -0
index 441370dbb4c2..81abc387112d 100644
@@ -30,6 +30,15 @@ memory@60000000 {
 		device_type = "memory";
 		reg = <0x60000000 0x40000000>;
 	};
+
+	reg_5v: regulator-5v {
+		compatible = "regulator-fixed";
+		regulator-name = "5V_MAIN";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+
 };
 
 &dma0 {

@@ -99,6 +108,132 @@ channel@4 {
 			label = "VDDCPU";
 		};
 	};
+
+	pmic@5b {
+		compatible = "microchip,mcp16502";
+		reg = <0x5b>;
+		lvin-supply = <&reg_5v>;
+		pvin1-supply = <&reg_5v>;
+		pvin2-supply = <&reg_5v>;
+		pvin3-supply = <&reg_5v>;
+		pvin4-supply = <&reg_5v>;
+		status = "okay";
+
+		regulators {
+			vdd_3v3: VDD_IO {
+				regulator-name = "VDD_IO";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-initial-mode = <2>;
+				regulator-allowed-modes = <2>, <4>;
+				regulator-always-on;
+
+				regulator-state-standby {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+					regulator-mode = <4>;
+				};
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-mode = <4>;
+				};
+			};
+
+			vddioddr: VDD_DDR {
+				regulator-name = "VDD_DDR";
+				regulator-min-microvolt = <1350000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-initial-mode = <2>;
+				regulator-allowed-modes = <2>, <4>;
+				regulator-always-on;
+
+				regulator-state-standby {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1350000>;
+					regulator-mode = <4>;
+				};
+
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1350000>;
+					regulator-mode = <4>;
+				};
+			};
+
+			vddcore: VDD_CORE {
+				regulator-name = "VDD_CORE";
+				regulator-min-microvolt = <1050000>;
+				regulator-max-microvolt = <1050000>;
+				regulator-initial-mode = <2>;
+				regulator-allowed-modes = <2>, <4>;
+				regulator-always-on;
+
+				regulator-state-standby {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1050000>;
+					regulator-mode = <4>;
+				};
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-mode = <4>;
+				};
+			};
+
+			vddcpu: VDD_OTHER {
+				regulator-name = "VDD_OTHER";
+				regulator-min-microvolt = <1050000>;
+				regulator-max-microvolt = <1250000>;
+				regulator-initial-mode = <2>;
+				regulator-allowed-modes = <2>, <4>;
+				regulator-ramp-delay = <3125>;
+				regulator-always-on;
+
+				regulator-state-standby {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1050000>;
+					regulator-mode = <4>;
+				};
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-mode = <4>;
+				};
+			};
+
+			vldo1: LDO1 {
+				regulator-name = "LDO1";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+
+				regulator-state-standby {
+					regulator-suspend-microvolt = <1800000>;
+					regulator-on-in-suspend;
+				};
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vldo2: LDO2 {
+				regulator-name = "LDO2";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <3700000>;
+
+				regulator-state-standby {
+					regulator-suspend-microvolt = <1800000>;
+					regulator-on-in-suspend;
+				};
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+		};
+	};
 };
 
 &main_xtal {
Signature · 1 line
2.43.0
maintainer
#10 lore raw

Re: [PATCH 5/6] ARM: dts: microchip: sama7d65: Add MCP16502 to sama7d65 curiosity

Hi, Ryan,

Quoted 141 lines · On 01.04.2025 19:13, [email protected] wrote:

From: Ryan Wanner <[email protected]>

Add MCP16502 to the sama7d65_curiosity board to control voltages in the MPU. The device is connected to twi 10 interface

Signed-off-by Ryan Wanner <[email protected]>
---
 .../dts/microchip/at91-sama7d65_curiosity.dts | 135 ++++++++++++++++++
 1 file changed, 135 insertions(+)
arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts +116 -0
index 441370dbb4c2..81abc387112d 100644
@@ -30,6 +30,15 @@ memory@60000000 {
 		device_type = "memory";
 		reg = <0x60000000 0x40000000>;
 	};
+
+	reg_5v: regulator-5v {
+		compatible = "regulator-fixed";
+		regulator-name = "5V_MAIN";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+
 };
 
 &dma0 {

@@ -99,6 +108,132 @@ channel@4 {
 			label = "VDDCPU";
 		};
 	};
+
+	pmic@5b {
+		compatible = "microchip,mcp16502";
+		reg = <0x5b>;
+		lvin-supply = <&reg_5v>;
+		pvin1-supply = <&reg_5v>;
+		pvin2-supply = <&reg_5v>;
+		pvin3-supply = <&reg_5v>;
+		pvin4-supply = <&reg_5v>;
+		status = "okay";
+
+		regulators {
+			vdd_3v3: VDD_IO {
+				regulator-name = "VDD_IO";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-initial-mode = <2>;
+				regulator-allowed-modes = <2>, <4>;
+				regulator-always-on;
+
+				regulator-state-standby {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+					regulator-mode = <4>;
+				};
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-mode = <4>;
+				};
+			};
+
+			vddioddr: VDD_DDR {
+				regulator-name = "VDD_DDR";
+				regulator-min-microvolt = <1350000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-initial-mode = <2>;
+				regulator-allowed-modes = <2>, <4>;
+				regulator-always-on;
+
+				regulator-state-standby {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1350000>;
+					regulator-mode = <4>;
+				};
+
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1350000>;
+					regulator-mode = <4>;
+				};
+			};
+
+			vddcore: VDD_CORE {
+				regulator-name = "VDD_CORE";
+				regulator-min-microvolt = <1050000>;
+				regulator-max-microvolt = <1050000>;
+				regulator-initial-mode = <2>;
+				regulator-allowed-modes = <2>, <4>;
+				regulator-always-on;
+
+				regulator-state-standby {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1050000>;
+					regulator-mode = <4>;
+				};
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-mode = <4>;
+				};
+			};
+
+			vddcpu: VDD_OTHER {
+				regulator-name = "VDD_OTHER";
+				regulator-min-microvolt = <1050000>;
+				regulator-max-microvolt = <1250000>;
+				regulator-initial-mode = <2>;
+				regulator-allowed-modes = <2>, <4>;
+				regulator-ramp-delay = <3125>;
+				regulator-always-on;
+
+				regulator-state-standby {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1050000>;
+					regulator-mode = <4>;
+				};
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-mode = <4>;
+				};
+			};
+
+			vldo1: LDO1 {
+				regulator-name = "LDO1";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+
+				regulator-state-standby {
+					regulator-suspend-microvolt = <1800000>;
+					regulator-on-in-suspend;
+				};
+
+				regulator-state-mem {
+					regulator-off-in-suspend;

arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts channel@4 { · line 227

Quoted 10 lines
arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts +10 -0
+				};
+			};
+
+			vldo2: LDO2 {
+				regulator-name = "LDO2";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <3700000>;
+
+				regulator-state-standby {
+					regulator-suspend-microvolt = <1800000>;

I can't find the schematics for this board. Is there a reason for keeping this @1.8V in suspend?

Thank you,
Claudiu

Quoted 12 lines
arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts +9 -0
+					regulator-on-in-suspend;
+				};
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+		};
+	};
 };
 
 &main_xtal {
author
#11 lore raw

Re: [PATCH 5/6] ARM: dts: microchip: sama7d65: Add MCP16502 to sama7d65 curiosity

Hi Claudiu,

Quoted 151 lines · Claudiu Beznea

EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe

Hi, Ryan,

Quoted 146 lines · On 01.04.2025 19:13, [email protected] wrote:

From: Ryan Wanner <[email protected]>

Add MCP16502 to the sama7d65_curiosity board to control voltages in the MPU. The device is connected to twi 10 interface

Signed-off-by Ryan Wanner <[email protected]>
---
 .../dts/microchip/at91-sama7d65_curiosity.dts | 135 ++++++++++++++++++
 1 file changed, 135 insertions(+)
arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts +121 -0
index 441370dbb4c2..81abc387112d 100644
@@ -30,6 +30,15 @@ memory@60000000 {
              device_type = "memory";
              reg = <0x60000000 0x40000000>;
      };
+
+     reg_5v: regulator-5v {
+             compatible = "regulator-fixed";
+             regulator-name = "5V_MAIN";
+             regulator-min-microvolt = <5000000>;
+             regulator-max-microvolt = <5000000>;
+             regulator-always-on;
+     };
+
 };
 
 &dma0 {

@@ -99,6 +108,132 @@ channel@4 {
                      label = "VDDCPU";
              };
      };
+
+     pmic@5b {
+             compatible = "microchip,mcp16502";
+             reg = <0x5b>;
+             lvin-supply = <&reg_5v>;
+             pvin1-supply = <&reg_5v>;
+             pvin2-supply = <&reg_5v>;
+             pvin3-supply = <&reg_5v>;
+             pvin4-supply = <&reg_5v>;
+             status = "okay";
+
+             regulators {
+                     vdd_3v3: VDD_IO {
+                             regulator-name = "VDD_IO";
+                             regulator-min-microvolt = <3300000>;
+                             regulator-max-microvolt = <3300000>;
+                             regulator-initial-mode = <2>;
+                             regulator-allowed-modes = <2>, <4>;
+                             regulator-always-on;
+
+                             regulator-state-standby {
+                                     regulator-on-in-suspend;
+                                     regulator-suspend-microvolt = <3300000>;
+                                     regulator-mode = <4>;
+                             };
+
+                             regulator-state-mem {
+                                     regulator-off-in-suspend;
+                                     regulator-mode = <4>;
+                             };
+                     };
+
+                     vddioddr: VDD_DDR {
+                             regulator-name = "VDD_DDR";
+                             regulator-min-microvolt = <1350000>;
+                             regulator-max-microvolt = <1350000>;
+                             regulator-initial-mode = <2>;
+                             regulator-allowed-modes = <2>, <4>;
+                             regulator-always-on;
+
+                             regulator-state-standby {
+                                     regulator-on-in-suspend;
+                                     regulator-suspend-microvolt = <1350000>;
+                                     regulator-mode = <4>;
+                             };
+
+                             regulator-state-mem {
+                                     regulator-on-in-suspend;
+                                     regulator-suspend-microvolt = <1350000>;
+                                     regulator-mode = <4>;
+                             };
+                     };
+
+                     vddcore: VDD_CORE {
+                             regulator-name = "VDD_CORE";
+                             regulator-min-microvolt = <1050000>;
+                             regulator-max-microvolt = <1050000>;
+                             regulator-initial-mode = <2>;
+                             regulator-allowed-modes = <2>, <4>;
+                             regulator-always-on;
+
+                             regulator-state-standby {
+                                     regulator-on-in-suspend;
+                                     regulator-suspend-microvolt = <1050000>;
+                                     regulator-mode = <4>;
+                             };
+
+                             regulator-state-mem {
+                                     regulator-off-in-suspend;
+                                     regulator-mode = <4>;
+                             };
+                     };
+
+                     vddcpu: VDD_OTHER {
+                             regulator-name = "VDD_OTHER";
+                             regulator-min-microvolt = <1050000>;
+                             regulator-max-microvolt = <1250000>;
+                             regulator-initial-mode = <2>;
+                             regulator-allowed-modes = <2>, <4>;
+                             regulator-ramp-delay = <3125>;
+                             regulator-always-on;
+
+                             regulator-state-standby {
+                                     regulator-on-in-suspend;
+                                     regulator-suspend-microvolt = <1050000>;
+                                     regulator-mode = <4>;
+                             };
+
+                             regulator-state-mem {
+                                     regulator-off-in-suspend;
+                                     regulator-mode = <4>;
+                             };
+                     };
+
+                     vldo1: LDO1 {
+                             regulator-name = "LDO1";
+                             regulator-min-microvolt = <1800000>;
+                             regulator-max-microvolt = <1800000>;
+                             regulator-always-on;
+
+                             regulator-state-standby {
+                                     regulator-suspend-microvolt = <1800000>;
+                                     regulator-on-in-suspend;
+                             };
+
+                             regulator-state-mem {
+                                     regulator-off-in-suspend;
+                             };
+                     };
+
+                     vldo2: LDO2 {
+                             regulator-name = "LDO2";
Quoted 8 lines

arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts channel@4 { · line 227

Quoted 5 lines
arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts +5 -0
+                             regulator-min-microvolt = <1200000>;
+                             regulator-max-microvolt = <3700000>;
+
+                             regulator-state-standby {
+                                     regulator-suspend-microvolt = <1800000>;

I can't find the schematics for this board. Is there a reason for keeping this @1.8V in suspend?

Sorry this was an error on my part, there is no reason to have this @1.8V in suspend mode.

Best,
Ryan

Quoted 17 lines

Thank you,
Claudiu

Quoted 12 lines
arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts +9 -0
+                                     regulator-on-in-suspend;
+                             };
+
+                             regulator-state-mem {
+                                     regulator-off-in-suspend;
+                             };
+                     };
+             };
+     };
 };
 
 &main_xtal {
maintainer
#12 lore raw

Re: [PATCH 5/6] ARM: dts: microchip: sama7d65: Add MCP16502 to sama7d65 curiosity

Hi, Ryan,

Quoted 11 lines · On 14.04.2025 18:38, [email protected] wrote:
Quoted 9 lines

arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts channel@4 { · line 227

Quoted 7 lines
arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts +7 -0
+                     vldo2: LDO2 {
+                             regulator-name = "LDO2";
+                             regulator-min-microvolt = <1200000>;
+                             regulator-max-microvolt = <3700000>;
+
+                             regulator-state-standby {
+                                     regulator-suspend-microvolt = <1800000>;

I can't find the schematics for this board. Is there a reason for keeping this @1.8V in suspend?

Sorry this was an error on my part, there is no reason to have this @1.8V in suspend mode.

OK, I'll drop it while applying, thank you!

author
#13 lore raw

PATCH 6/6 ARM: dts: microchip: sama7d65_curiosity: add EEPROM

In reply to [email protected]

From: Ryan Wanner <[email protected]>

If the MAC address is not fetched and loaded by U-boot then Linux will have to load the address. The EEPROM and nvmem-layout to describe EUI48 MAC address regions.

Signed-off-by Ryan Wanner <[email protected]>
---
 .../dts/microchip/at91-sama7d65_curiosity.dts | 21 +++++++++++++++++++
 1 file changed, 21 insertions(+)
arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts +21 -0
index 81abc387112d..779412f04a11 100644
@@ -234,6 +234,24 @@ regulator-state-mem {
 			};
 		};
 	};
+
+	eeprom0: eeprom@51 {
+		compatible = "microchip,24aa025e48";
+		reg = <0x51>;
+		size = <256>;
+		pagesize = <16>;
+		vcc-supply = <&vdd_3v3>;
+
+		nvmem-layout {
+			compatible = "fixed-layout";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			eeprom0_eui48: eui48@fa {
+				reg = <0xfa 0x6>;
+			};
+		};
+	};
 };
 
 &main_xtal {

@@ -251,6 +269,9 @@ &pinctrl_gmac0_txck_default
 	phy-mode = "rgmii-id";
 	status = "okay";
 
+	nvmem-cells = <&eeprom0_eui48>;
+	nvmem-cell-names = "mac-address";
+
 	ethernet-phy@7 {
 		reg = <0x7>;
 		interrupt-parent = <&pioa>;
Signature · 1 line
2.43.0
maintainer Applied
#14 lore raw
In reply to [email protected]
Quoted 5 lines · On 01.04.2025 19:13, [email protected] wrote:

ARM: dts: microchip: sama7d65: Add gmac interfaces for sama7d65 SoC
ARM: dts: microchip: sama7d65: Add FLEXCOMs to sama7d65 SoC
ARM: dts: microchip: sama7d65: Enable GMAC interface
ARM: dts: microchip: sama7d65: Add MCP16502 to sama7d65 curiosity
ARM: dts: microchip: sama7d65_curiosity: add EEPROM

Applied to at91-dt, with specified adjustments, thank you!