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Enable TSENS and thermal zone for QCS615 SoC

PATCH Superseded Gaurav Kohli 3 participants 7 messages Jun 11, 2025 – Jun 12, 2025

Subsystems (5)
Device tree bindings Arm Qualcomm mailing list Arm Qualcomm support Thermal +1 more subsystems

v2 of 6 Superseded Latest is v6 →

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Gaurav Kohli

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#0 lore raw

v2 cover Enable TSENS and thermal zone for QCS615 SoC

Adding compatible string in TSENS dt-bindings, device node for TSENS controller and Thermal zone support.

---
Changes in v2:
- Drop the passive trip point and add critical for CPU thermal zones.
- Rearrange the tsens dt node and fix the address part.
- Fix the commit subject with target name.
- Link to v1: https://lore.kernel.org/linux-devicetree/[email protected]/
---
Gaurav Kohli (2):
dt-bindings: thermal: tsens: Add QCS615 compatible
arm64: dts: qcom: qcs615: Enable TSENS support for QCS615 SoC

 .../bindings/thermal/qcom-tsens.yaml          |   1 +
 arch/arm64/boot/dts/qcom/qcs615.dtsi          | 217 ++++++++++++++++++
 2 files changed, 218 insertions(+)
Signature · 1 line
2.34.1
author
#1 lore raw

PATCH v2 1/2 dt-bindings: thermal: tsens: Add QCS615 compatible

Add compatibility string for the thermal sensors on QCS615 platform.

Signed-off-by Gaurav Kohli <[email protected]>
Acked-by Rob Herring (Arm) <[email protected]>
---
 Documentation/devicetree/bindings/thermal/qcom-tsens.yaml | 1 +
 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/thermal/qcom-tsens.yaml +1 -0
index f9d8012c8cf5..de9b667a79d3 100644
@@ -52,6 +52,7 @@ properties:
               - qcom,msm8996-tsens
               - qcom,msm8998-tsens
               - qcom,qcm2290-tsens
+              - qcom,qcs615-tsens
               - qcom,sa8255p-tsens
               - qcom,sa8775p-tsens
               - qcom,sar2130p-tsens
Signature · 1 line
2.34.1
author
#2 lore raw

PATCH v2 2/2 arm64: dts: qcom: qcs615: Enable TSENS support for QCS615 SoC

In reply to Gaurav Kohli

Add TSENS and thermal devicetree node for QCS615 SoC.

Signed-off-by Gaurav Kohli <[email protected]>
---
 arch/arm64/boot/dts/qcom/qcs615.dtsi | 217 +++++++++++++++++++++++++++
 1 file changed, 217 insertions(+)
arch/arm64/boot/dts/qcom/qcs615.dtsi +217 -0
index edfb796d8dd3..bbc132a1df46 100644
@@ -3668,6 +3668,17 @@ usb_2_dwc3: usb@a800000 {
 				maximum-speed = "high-speed";
 			};
 		};
+
+		tsens0: tsens@c222000 {
+			compatible = "qcom,qcs615-tsens", "qcom,tsens-v2";
+			reg = <0x0 0x0c263000 0x0 0x1ff>,
+				<0x0 0x0c222000 0x0 0x8>;
+			interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "uplow", "critical";
+			#qcom,sensors = <16>;
+			#thermal-sensor-cells = <1>;
+		};
 	};
 
 	arch_timer: timer {

@@ -3677,4 +3688,210 @@ arch_timer: timer {
 			     <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
 			     <GIC_PPI 0 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
 	};
+
+	thermal-zones {
+		aoss-thermal {
+			thermal-sensors = <&tsens0 0>;
+
+			trips {
+				trip-point0 {
+					temperature = <110000>;
+					hysteresis = <5000>;
+					type = "passive";
+				};
+			};
+		};
+
+		cpuss-0-thermal {
+			thermal-sensors = <&tsens0 1>;
+
+			trips {
+				cpuss0-critical {
+					temperature = <115000>;
+					hysteresis = <1000>;
+					type = "critical";
+				};
+			};
+		};
+
+		cpuss-1-thermal {
+			thermal-sensors = <&tsens0 2>;
+
+			trips {
+				cpuss1-critical {
+					temperature = <115000>;
+					hysteresis = <1000>;
+					type = "critical";
+				};
+			};
+		};
+
+		cpuss-2-thermal {
+			thermal-sensors = <&tsens0 3>;
+
+			trips {
+				cpuss2-critical {
+					temperature = <115000>;
+					hysteresis = <1000>;
+					type = "critical";
+				};
+			};
+		};
+
+		cpuss-3-thermal {
+			thermal-sensors = <&tsens0 4>;
+
+			trips {
+				cpuss3-critical {
+					temperature = <115000>;
+					hysteresis = <1000>;
+					type = "critical";
+				};
+			};
+		};
+
+		cpu-1-0-thermal {
+			thermal-sensors = <&tsens0 5>;
+
+			trips {
+				cpu-critical {
+					temperature = <115000>;
+					hysteresis = <1000>;
+					type = "critical";
+				};
+			};
+		};
+
+		cpu-1-1-thermal {
+			thermal-sensors = <&tsens0 6>;
+
+			trips {
+				cpu-critical {
+					temperature = <115000>;
+					hysteresis = <1000>;
+					type = "critical";
+				};
+			};
+		};
+
+		cpu-1-2-thermal {
+			thermal-sensors = <&tsens0 7>;
+
+			trips {
+				cpu-critical {
+					temperature = <115000>;
+					hysteresis = <1000>;
+					type = "critical";
+				};
+			};
+		};
+
+		cpu-1-3-thermal {
+			thermal-sensors = <&tsens0 8>;
+
+			trips {
+				cpu-critical {
+					temperature = <115000>;
+					hysteresis = <1000>;
+					type = "critical";
+				};
+			};
+		};
+
+		gpu-thermal {
+			thermal-sensors = <&tsens0 9>;
+
+			trips {
+				trip-point0 {
+					temperature = <105000>;
+					hysteresis = <5000>;
+					type = "passive";
+				};
+
+				trip-point1 {
+					temperature = <110000>;
+					hysteresis = <5000>;
+					type = "passive";
+				};
+			};
+		};
+
+		q6-hvx-thermal {
+			thermal-sensors = <&tsens0 10>;
+
+			trips {
+				trip-point0 {
+					temperature = <105000>;
+					hysteresis = <5000>;
+					type = "passive";
+				};
+
+				trip-point1 {
+					temperature = <110000>;
+					hysteresis = <5000>;
+					type = "passive";
+				};
+			};
+		};
+
+		mdm-core-thermal {
+			thermal-sensors = <&tsens0 11>;
+
+			trips {
+				trip-point0 {
+					temperature = <110000>;
+					hysteresis = <10000>;
+					type = "passive";
+				};
+			};
+		};
+
+		camera-thermal {
+			thermal-sensors = <&tsens0 12>;
+
+			trips {
+				trip-point0 {
+					temperature = <110000>;
+					hysteresis = <5000>;
+					type = "passive";
+				};
+			};
+		};
+
+		wlan-thermal {
+			thermal-sensors = <&tsens0 13>;
+
+			trips {
+				trip-point0 {
+					temperature = <110000>;
+					hysteresis = <5000>;
+					type = "passive";
+				};
+			};
+		};
+
+		display-thermal {
+			thermal-sensors = <&tsens0 14>;
+
+			trips {
+				trip-point0 {
+					temperature = <110000>;
+					hysteresis = <5000>;
+					type = "passive";
+				};
+			};
+		};
+
+		video-thermal {
+			thermal-sensors = <&tsens0 15>;
+
+			trips {
+				trip-point0 {
+					temperature = <110000>;
+					hysteresis = <5000>;
+					type = "passive";
+				};
+			};
+		};
+	};
 };
Signature · 1 line
2.34.1
#3 lore raw

Re: [PATCH v2 2/2] arm64: dts: qcom: qcs615: Enable TSENS support for QCS615 SoC

Quoted 4 lines · Gaurav Kohli

Add TSENS and thermal devicetree node for QCS615 SoC.

Signed-off-by Gaurav Kohli <[email protected]>

---

[...]

arch/arm64/boot/dts/qcom/qcs615.dtsi arch_timer: timer { · line 3700

Quoted 9 lines
arch/arm64/boot/dts/qcom/qcs615.dtsi +9 -0
+	thermal-zones {
+		aoss-thermal {
+			thermal-sensors = <&tsens0 0>;
+
+			trips {
+				trip-point0 {
+					temperature = <110000>;
+					hysteresis = <5000>;
+					type = "passive";

All of the passive trip points you added that aren't bound to any cooling devices should be critical instead (otherwise they're not doing anything)

otherwise, looks good

Konrad

#4 lore raw

Re: [PATCH v2 2/2] arm64: dts: qcom: qcs615: Enable TSENS support for QCS615 SoC

Quoted 22 lines · Konrad Dybcio
Quoted 4 lines · Gaurav Kohli

Add TSENS and thermal devicetree node for QCS615 SoC.

Signed-off-by Gaurav Kohli <[email protected]>

---

[...]

arch/arm64/boot/dts/qcom/qcs615.dtsi arch_timer: timer { · line 3700

Quoted 9 lines
arch/arm64/boot/dts/qcom/qcs615.dtsi +9 -0
+	thermal-zones {
+		aoss-thermal {
+			thermal-sensors = <&tsens0 0>;
+
+			trips {
+				trip-point0 {
+					temperature = <110000>;
+					hysteresis = <5000>;
+					type = "passive";

All of the passive trip points you added that aren't bound to any cooling devices should be critical instead (otherwise they're not doing anything)

Quoted 1 line

otherwise, looks good

Don't we need cooling-maps for CPU thermal zones?

Signature · 2 lines
With best wishes
Dmitry
#5 lore raw

Re: [PATCH v2 2/2] arm64: dts: qcom: qcs615: Enable TSENS support for QCS615 SoC

Quoted 23 lines · Dmitry Baryshkov
Quoted 22 lines · Konrad Dybcio
Quoted 4 lines · Gaurav Kohli

Add TSENS and thermal devicetree node for QCS615 SoC.

Signed-off-by Gaurav Kohli <[email protected]>

---

[...]

arch/arm64/boot/dts/qcom/qcs615.dtsi arch_timer: timer { · line 3700

Quoted 9 lines
arch/arm64/boot/dts/qcom/qcs615.dtsi +9 -0
+	thermal-zones {
+		aoss-thermal {
+			thermal-sensors = <&tsens0 0>;
+
+			trips {
+				trip-point0 {
+					temperature = <110000>;
+					hysteresis = <5000>;
+					type = "passive";

All of the passive trip points you added that aren't bound to any cooling devices should be critical instead (otherwise they're not doing anything)

Quoted 3 lines
Quoted 1 line

otherwise, looks good

Don't we need cooling-maps for CPU thermal zones?

no, we have lmh

Konrad

author
#6 lore raw

Re: [PATCH v2 2/2] arm64: dts: qcom: qcs615: Enable TSENS support for QCS615 SoC

Quoted 24 lines · Konrad Dybcio
Quoted 23 lines · Dmitry Baryshkov
Quoted 22 lines · Konrad Dybcio
Quoted 4 lines · Gaurav Kohli

Add TSENS and thermal devicetree node for QCS615 SoC.

Signed-off-by Gaurav Kohli <[email protected]>

---

[...]

arch/arm64/boot/dts/qcom/qcs615.dtsi arch_timer: timer { · line 3700

Quoted 9 lines
arch/arm64/boot/dts/qcom/qcs615.dtsi +9 -0
+	thermal-zones {
+		aoss-thermal {
+			thermal-sensors = <&tsens0 0>;
+
+			trips {
+				trip-point0 {
+					temperature = <110000>;
+					hysteresis = <5000>;
+					type = "passive";

All of the passive trip points you added that aren't bound to any cooling devices should be critical instead (otherwise they're not doing anything)

Quoted 2 lines
Quoted 2 lines
Quoted 1 line

otherwise, looks good

thanks for the review & comment, let me send 3rd patch with critical for all trips.

Quoted 5 lines
Quoted 1 line

Don't we need cooling-maps for CPU thermal zones?

no, we have lmh

Konrad