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irqchip/sg2042-msi: Set irq type according to DT configuration

PATCH New Chen Wang 1 participant 4 messages Sep 4, 2025

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Chen Wang

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#0 lore raw

v3 cover irqchip/sg2042-msi: Set irq type according to DT configuration

From: Chen Wang <[email protected]>

Read the device tree configuration and then use it to set the interrupt type.

This patchset is based on irq/drivers branch of tip.

---

Changes in v3:
Thers is no major change in this version. Just adjust the order of the patches to change the DTs first. Thanks to Thomas for the suggestion.

Changes in v2:
The patch series is based on irq/drivers branch of tip. You can simply review or test the patches at the link [2].

Reverted the change to obtain params of "msi-ranges"; it's better not to assume the value of "#interrupt-cells" is 2, even though it's known to be the case. Thanks to Inochi for the comments.

Changes in v1:
The patch series is based on irq/drivers branch of tip. You can simply review or test the patches at the link [1].

---

Chen Wang (3):
riscv: sophgo: dts: sg2042: change msi irq type to
IRQ_TYPE_EDGE_RISING
riscv: sophgo: dts: sg2044: change msi irq type to
IRQ_TYPE_EDGE_RISING
irqchip/sg2042-msi: Set irq type according to DT configuration

 arch/riscv/boot/dts/sophgo/sg2042.dtsi | 2 +-
 arch/riscv/boot/dts/sophgo/sg2044.dtsi | 2 +-
 drivers/irqchip/irq-sg2042-msi.c       | 7 +++++--
 3 files changed, 7 insertions(+), 4 deletions(-)

base-commit: d36bf356068cdb5499b9bc458db9149c0fd938a2

Signature · 1 line
2.34.1
author
#1 lore raw

PATCH v3 1/3 riscv: sophgo: dts: sg2042: change msi irq type to IRQ_TYPE_EDGE_RISING

From: Chen Wang <[email protected]>

Fixed msi irq type to be the correct type, although this field is not used.

---
 arch/riscv/boot/dts/sophgo/sg2042.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/riscv/boot/dts/sophgo/sg2042.dtsi +1 -1
index b3e4d3c18fdc..6430c6e25c00 100644
@@ -190,7 +190,7 @@ msi: msi-controller@7030010304 {
 			reg-names = "clr", "doorbell";
 			msi-controller;
 			#msi-cells = <0>;
-			msi-ranges = <&intc 64 IRQ_TYPE_LEVEL_HIGH 32>;
+			msi-ranges = <&intc 64 IRQ_TYPE_EDGE_RISING 32>;
 		};
 
 		rpgate: clock-controller@7030010368 {
Signature · 1 line
2.34.1
author
#2 lore raw

PATCH v3 2/3 riscv: sophgo: dts: sg2044: change msi irq type to IRQ_TYPE_EDGE_RISING

In reply to Chen Wang

From: Chen Wang <[email protected]>

Fixed msi irq type to be the correct type, although this field is not used.

---
 arch/riscv/boot/dts/sophgo/sg2044.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/riscv/boot/dts/sophgo/sg2044.dtsi +1 -1
index 6ec955744b0c..320c4d1d08e6 100644
@@ -214,7 +214,7 @@ msi: msi-controller@6d50000000 {
 			reg-names = "clr", "doorbell";
 			#msi-cells = <0>;
 			msi-controller;
-			msi-ranges = <&intc 352 IRQ_TYPE_LEVEL_HIGH 512>;
+			msi-ranges = <&intc 352 IRQ_TYPE_EDGE_RISING 512>;
 			status = "disabled";
 		};
 
Signature · 1 line
2.34.1
author
#3 lore raw

PATCH v3 3/3 irqchip/sg2042-msi: Set irq type according to DT configuration

In reply to Chen Wang

From: Chen Wang <[email protected]>

Read the device tree configuration and use it to set the interrupt type.

---
 drivers/irqchip/irq-sg2042-msi.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)
drivers/irqchip/irq-sg2042-msi.c +5 -2
index 3b13dbbfdb51..f7cf0dc72eab 100644
@@ -30,6 +30,7 @@ struct sg204x_msi_chip_info {
  * @doorbell_addr:	see TRM, 10.1.32, GP_INTR0_SET
  * @irq_first:		First vectors number that MSIs starts
  * @num_irqs:		Number of vectors for MSIs
+ * @irq_type:		IRQ type for MSIs
  * @msi_map:		mapping for allocated MSI vectors.
  * @msi_map_lock:	Lock for msi_map
  * @chip_info:		chip specific infomations
@@ -41,6 +42,7 @@ struct sg204x_msi_chipdata {
 
 	u32					irq_first;
 	u32					num_irqs;
+	unsigned int				irq_type;
 
 	unsigned long				*msi_map;
 	struct mutex				msi_map_lock;
@@ -137,14 +139,14 @@ static int sg204x_msi_parent_domain_alloc(struct irq_domain *domain, unsigned in
 	fwspec.fwnode = domain->parent->fwnode;
 	fwspec.param_count = 2;
 	fwspec.param[0] = data->irq_first + hwirq;
-	fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
+	fwspec.param[1] = data->irq_type;
 
 	ret = irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec);
 	if (ret)
 		return ret;
 
 	d = irq_domain_get_irq_data(domain->parent, virq);
-	return d->chip->irq_set_type(d, IRQ_TYPE_EDGE_RISING);
+	return d->chip->irq_set_type(d, data->irq_type);
 }
 
 static int sg204x_msi_middle_domain_alloc(struct irq_domain *domain, unsigned int virq,
@@ -298,6 +300,7 @@ static int sg2042_msi_probe(struct platform_device *pdev)
 	}
 
 	data->irq_first = (u32)args.args[0];
+	data->irq_type = (unsigned int)args.args[1];
 	data->num_irqs = (u32)args.args[args.nargs - 1];
 
 	mutex_init(&data->msi_map_lock);
Signature · 1 line
2.34.1