Add support for Microsoft Surface Pro 12in 1st Edition (Snapdragon)
Subsystems (13)
cover Add support for Microsoft Surface Pro 12in 1st Edition (Snapdragon)
Add support for the Microsoft Surface Pro 12in 1st Edition (Snapdragon), based on the Qualcomm X1P42100 SoC.
Currently supported:
- UFS (with inline crypto)
- Touchscreen, pen, cover keyboard and touchpad (via SAM)
- USB 3.2 x2 with DP Alt Mode
- Audio, WiFi, Bluetooth
- CDSP, ADSP, GPU
- Display (BOE NE120DRM-N28 panel)
Not yet supported:
- Accelerometer
- Front, back, and IR cameras
- IRIS video decoder
Note on the compatible string: unlike other Microsoft Surface devices upstream (denali, arcata, romulus13, blackrock), this device does not appear to carry an internal codename in firmware. The DSDT, SMBIOS, and EFI variables only refer to it as "Surface Pro 12in 1st Ed with Snapdragon" (SKU 2110). I have used microsoft,surface-pro-12in as the compatible. Suggestions welcome.
Although the device is marketed as just a smaller version of the denali, it has enough differences that it warrented a different compatible and device tree.
Tested on Surface Pro 12in 1st Ed with Snapdragon (SKU 2110).
Harrison Vanderbyl (8):
dt-bindings: arm: qcom: Add Microsoft Surface Pro 12in
dt-bindings: crypto: Add x1e80100 inline crypto platform/surface: SAM: Add support for Surface Pro 12in
firmware: qcom: scm: Allow QSEECOM on Surface Pro 12in
hid: Pen battery quirk for Surface Pro 12in drm/panel-edp: Add panel for Surface Pro 12in
arm64: dts: qcom: hamoa: Add inline crypto for UFS
arm64: dts: qcom: Add Microsoft Surface Pro 12in
.../devicetree/bindings/arm/qcom.yaml | 4 + .../crypto/qcom,inline-crypto-engine.yaml | 1 + arch/arm64/boot/dts/qcom/Makefile | 2 + arch/arm64/boot/dts/qcom/hamoa.dtsi | 10 + .../dts/qcom/x1p42100-microsoft-sp12in.dts | 1160 +++++++++++++++++ drivers/firmware/qcom/qcom_scm.c | 1 + drivers/gpu/drm/panel/panel-edp.c | 1 + drivers/hid/hid-ids.h | 1 + drivers/hid/hid-input.c | 2 + .../surface/surface_aggregator_registry.c | 15 + 10 files changed, 1197 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts
base-commit: 5d6919055dec134de3c40167a490f33c74c12581
Signature · 1 line
2.53.0
PATCH 1/8 dt-bindings: arm: qcom: Add Microsoft Surface Pro 12in
Document the compatible string for the Microsoft Surface Pro 12-inch, 1st Edition with Snapdragon, based on the Qualcomm X1P42100 SoC.
--- Documentation/devicetree/bindings/arm/qcom.yaml | 4 ++++ 1 file changed, 4 insertions(+)
Documentation/devicetree/bindings/arm/qcom.yaml +4 -0
@@ -1168,6 +1168,10 @@ properties: - const: microsoft,denali - const: qcom,x1e80100 + - items: + - const: microsoft,surface-pro-12in + - const: qcom,x1p42100 + - items: - enum: - qcom,purwa-iot-evk
Signature · 1 line
2.53.0
PATCH 2/8 dt-bindings: crypto: Add x1e80100 inline crypto
In reply to Harrison VanderbylAdd compatibility string for the x1e80100/x1p42100 inline crypto engine.
--- .../devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml | 1 + 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml +1 -0
@@ -24,6 +24,7 @@ properties: - qcom,sm8550-inline-crypto-engine - qcom,sm8650-inline-crypto-engine - qcom,sm8750-inline-crypto-engine + - qcom,x1e80100-inline-crypto-engine - const: qcom,inline-crypto-engine reg:
Signature · 1 line
2.53.0
PATCH 3/8 platform/surface: SAM: Add support for Surface Pro 12in
In reply to Harrison VanderbylAdd a SAM client device node group and registry entry for the Microsoft Surface Pro, 12-inch with Snapdragon.
This set enables the use of the following devices. 1: cover keyboard
2: cover touchpad
3: pen stash events.
The battery info and charger info devices have been purposefully omitted as they are also reported by other drivers and cause conflicts.
--- .../surface/surface_aggregator_registry.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
drivers/platform/surface/surface_aggregator_registry.c +15 -0
@@ -422,6 +422,19 @@ static const struct software_node *ssam_node_group_sp11[] = { NULL, }; +/* Devices for Surface Pro 12" first edition (ARM/QCOM) */ +static const struct software_node *ssam_node_group_sp12in[] = { + &ssam_node_root, + &ssam_node_hub_kip, + &ssam_node_tmp_sensors, + &ssam_node_hid_kip_keyboard, + &ssam_node_hid_sam_penstash, + &ssam_node_hid_kip_touchpad, + &ssam_node_hid_kip_fwupd, + &ssam_node_pos_tablet_switch, +NULL , +}; +/* -- SSAM platform/meta-hub driver. ---------------------------------------- */ static const struct acpi_device_id ssam_platform_hub_acpi_match[] = {
@@ -500,6 +513,8 @@ static const struct of_device_id ssam_platform_hub_of_match[] __maybe_unused = { { .compatible = "microsoft,arcata", (void *)ssam_node_group_sp9_5g }, /* Surface Pro 11 (ARM/QCOM) */ { .compatible = "microsoft,denali", (void *)ssam_node_group_sp11 }, + /* Surface Pro 12in First Edition (ARM/QCOM) */ + { .compatible = "microsoft,surface-pro-12in", (void *)ssam_node_group_sp12in }, /* Surface Laptop 7 */ { .compatible = "microsoft,romulus13", (void *)ssam_node_group_sl7 }, { .compatible = "microsoft,romulus15", (void *)ssam_node_group_sl7 },
Signature · 1 line
2.53.0
PATCH 4/8 firmware: qcom: scm: Allow QSEECOM on Surface Pro 12in
In reply to Harrison VanderbylAdd the Surface Pro 12in to the QSEECOM allowlist
so that the Qualcomm Secure Execution Environment
interface is available on this device.
--- drivers/firmware/qcom/qcom_scm.c | 1 + 1 file changed, 1 insertion(+)
drivers/firmware/qcom/qcom_scm.c +1 -0
@@ -2306,6 +2306,7 @@ static const struct of_device_id qcom_scm_qseecom_allowlist[] __maybe_unused = { { .compatible = "lenovo,yoga-slim7x" }, { .compatible = "medion,sprchrgd14s1" }, { .compatible = "microsoft,arcata", }, + { .compatible = "microsoft,surface-pro-12in", }, { .compatible = "microsoft,blackrock" }, { .compatible = "microsoft,denali", }, { .compatible = "microsoft,romulus13", },
Signature · 1 line
2.53.0
Re: [PATCH v1 4/8] firmware: qcom: scm: Allow QSEECOM on Surface Pro 12in
Quoted 9 lines · Harrison Vanderbyl
Add the Surface Pro 12in to the QSEECOM allowlist
so that the Qualcomm Secure Execution Environment
interface is available on this device.Signed-off-by Harrison Vanderbyl <[email protected]>--- drivers/firmware/qcom/qcom_scm.c | 1 + 1 file changed, 1 insertion(+)
Signature · 2 lines
With best wishes Dmitry
PATCH 5/8 hid: Pen battery quirk for Surface Pro 12in
In reply to Harrison VanderbylThe pen setup for this device uses bluetooth for communicating battery levels and status instead of reporting it over i2c.
Without this quirk, the device either reports an extra, broken phantom battery, or hangs.
--- drivers/hid/hid-ids.h | 1 + drivers/hid/hid-input.c | 2 ++ 2 files changed, 3 insertions(+)
drivers/hid/hid-ids.h +1 -0
@@ -459,6 +459,7 @@#define USB_DEVICE_ID_HP_X2 0x074d#define USB_DEVICE_ID_HP_X2_10_COVER 0x0755#define I2C_DEVICE_ID_CHROMEBOOK_TROGDOR_POMPOM 0x2F81 +#define I2C_DEVICE_ID_SURFACE_PRO_12IN 0x4376#define USB_VENDOR_ID_ELECOM 0x056e#define USB_DEVICE_ID_ELECOM_BM084 0x0061
drivers/hid/hid-input.c +2 -0
@@ -395,6 +395,8 @@ static const struct hid_device_id hid_battery_quirks[] = { HID_BATTERY_QUIRK_AVOID_QUERY }, {HID_I2C_DEVICE (USB_VENDOR_ID_ELAN ,I2C_DEVICE_ID_CHROMEBOOK_TROGDOR_POMPOM ), HID_BATTERY_QUIRK_AVOID_QUERY }, + { HID_I2C_DEVICE(USB_VENDOR_ID_ELAN, I2C_DEVICE_ID_SURFACE_PRO_12IN), + HID_BATTERY_QUIRK_IGNORE },/* * Elan HID touchscreens seem to all report a non present battery, * set HID_BATTERY_QUIRK_IGNORE for all Elan I2C and USB HID devices.
Signature · 1 line
2.53.0
[email protected]
AI reviewRe: [PATCH v1 5/8] hid: Pen battery quirk for Surface Pro 12in
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [Low] Macro value alignment uses spaces instead of a tab. --
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Macro value alignment uses spaces instead of a tab.
--
commit c48c3082a15452ea3cc6ed81c88834aa52ab9d60
Author: Harrison Vanderbyl <[email protected]>
hid: Pen battery quirk for Surface Pro 12in
This commit adds a quirk to ignore the battery on the Surface Pro 12in pen, which uses Bluetooth for battery reporting instead of I2C. This prevents a phantom battery or device hang.
drivers/hid/hid-ids.h line 462
Quoted 8 lines
drivers/hid/hid-ids.h +1
-0@@ -459,6 +459,7 @@#define USB_DEVICE_ID_HP_X2 0x074d#define USB_DEVICE_ID_HP_X2_10_COVER 0x0755#define I2C_DEVICE_ID_CHROMEBOOK_TROGDOR_POMPOM 0x2F81 +#define I2C_DEVICE_ID_SURFACE_PRO_12IN 0x4376
This isn't a bug, but it looks like spaces were used here instead of a tab to align the macro value.
Signature · 1 line
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=5
Re: [PATCH v1 5/8] hid: Pen battery quirk for Surface Pro 12in
In reply to Harrison VanderbylQuoted 8 lines · Harrison Vanderbyl
The pen setup for this device uses bluetooth for communicating battery levels and status instead of reporting it over i2c.
Without this quirk, the device either reports an extra, broken phantom battery, or hangs.
Signed-off-by Harrison Vanderbyl <[email protected]>
As this is apparently part of some bigger series, I am not sure who is expected to merge this.
FWIW
Signature · 2 lines
Jiri Kosina SUSE Labs
PATCH 6/8 drm/panel-edp: Add panel for Surface Pro 12in
In reply to Harrison VanderbylAdd an entry for the BOE NE120DRM-N28 panel,
used in the Microsoft Surface Pro 12-inch.
The values chosen were tested to be working fine
for wake from sleep and hibernation.
--- drivers/gpu/drm/panel/panel-edp.c | 1 + 1 file changed, 1 insertion(+)
drivers/gpu/drm/panel/panel-edp.c +1 -0
@@ -2020,6 +2020,7 @@ static const struct edp_panel_entry edp_panels[] = {EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0c26 , &delay_200_500_p2e200,"NV140WUM-T08" ),EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0c93 , &delay_200_500_e200,"Unknown" ),EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0cb6 , &delay_200_500_e200,"NT116WHM-N44" ), +EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0cc9 , &delay_200_500_e50,"NE120DRM-N28" ),EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0cf2 , &delay_200_500_e200,"NV156FHM-N4S" ),EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0cf6 , &delay_200_500_e200_d100,"NV140WUM-N64" ), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cfa, &delay_200_500_e50, "NV116WHM-A4D"),
Signature · 1 line
2.53.0
Doug Anderson
reviewerRe: [PATCH v1 6/8] drm/panel-edp: Add panel for Surface Pro 12in
Hi,
Quoted 11 lines · Harrison Vanderbyl
Add an entry for the BOE NE120DRM-N28 panel,
used in the Microsoft Surface Pro 12-inch.The values chosen were tested to be working fine
for wake from sleep and hibernation.Signed-off-by Harrison Vanderbyl <[email protected]>--- drivers/gpu/drm/panel/panel-edp.c | 1 + 1 file changed, 1 insertion(+)
Please follow the convention for recent similar patches and include the EDID in the commit message.
-Doug
Re: [PATCH v1 6/8] drm/panel-edp: Add panel for Surface Pro 12in
In reply to Harrison VanderbylQuoted 5 lines · Harrison Vanderbyl
Add an entry for the BOE NE120DRM-N28 panel,
used in the Microsoft Surface Pro 12-inch.The values chosen were tested to be working fine
for wake from sleep and hibernation.
Could you please include panel's EDID in the commit message (see how other panels are added to panel-edp.c)
Quoted 21 lines
Signed-off-by Harrison Vanderbyl <[email protected]>--- drivers/gpu/drm/panel/panel-edp.c | 1 + 1 file changed, 1 insertion(+)drivers/gpu/drm/panel/panel-edp.c +1
-0@@ -2020,6 +2020,7 @@ static const struct edp_panel_entry edp_panels[] = {EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0c26 , &delay_200_500_p2e200,"NV140WUM-T08" ),EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0c93 , &delay_200_500_e200,"Unknown" ),EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0cb6 , &delay_200_500_e200,"NT116WHM-N44" ), +EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0cc9 , &delay_200_500_e50,"NE120DRM-N28" ),EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0cf2 , &delay_200_500_e200,"NV156FHM-N4S" ),EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0cf6 , &delay_200_500_e200_d100,"NV140WUM-N64" ), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cfa, &delay_200_500_e50, "NV116WHM-A4D"),Signature · 1 line
2.53.0
Signature · 2 lines
With best wishes Dmitry
PATCH 7/8 arm64: dts: qcom: hamoa: Add inline crypto for UFS
In reply to Harrison VanderbylAdd the Inline Crypto node and wire it to ufs_mem, enabling UFS storage encryption on x1e80100 and derivative SOCs.
This is needed to support encrypted storage on
the Microsoft Surface Pro 12-inch.
--- arch/arm64/boot/dts/qcom/hamoa.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)
arch/arm64/boot/dts/qcom/hamoa.dtsi +10 -0
@@ -3952,6 +3952,8 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, phys = <&ufs_mem_phy>; phy-names = "ufsphy"; + qcom,ice = <&ice>; + #reset-cells = <1>; status = "disabled";
@@ -3997,6 +3999,14 @@ opp-300000000 { }; }; + ice: crypto@1d88000 { + compatible = "qcom,x1e80100-inline-crypto-engine", + "qcom,inline-crypto-engine"; + reg = <0 0x01d88000 0 0x8000>; + + clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; + }; + cryptobam: dma-controller@1dc4000 { compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0"; reg = <0x0 0x01dc4000 0x0 0x28000>;
Signature · 1 line
2.53.0
Re: [PATCH v1 7/8] arm64: dts: qcom: hamoa: Add inline crypto for UFS
Quoted 26 lines · Harrison Vanderbyl
Add the Inline Crypto node and wire it to
ufs_mem, enabling UFS storage encryption on x1e80100 and derivative SOCs.This is needed to support encrypted storage on
the Microsoft Surface Pro 12-inch.Signed-off-by Harrison Vanderbyl <[email protected]>--- arch/arm64/boot/dts/qcom/hamoa.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)arch/arm64/boot/dts/qcom/hamoa.dtsi +2
-0@@ -3952,6 +3952,8 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, phys = <&ufs_mem_phy>; phy-names = "ufsphy"; + qcom,ice = <&ice>; + #reset-cells = <1>; status = "disabled";
arch/arm64/boot/dts/qcom/hamoa.dtsi opp-300000000 { · line 4005
Quoted 7 lines
arch/arm64/boot/dts/qcom/hamoa.dtsi +4
-0@@ -3997,6 +3999,14 @@ opp-300000000 { }; }; + ice: crypto@1d88000 { + compatible = "qcom,x1e80100-inline-crypto-engine", + "qcom,inline-crypto-engine"; + reg = <0 0x01d88000 0 0x8000>;
0x0 instead of just 0x, please.
Quoted 10 lines
arch/arm64/boot/dts/qcom/hamoa.dtsi +4
-0+ + clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; + }; + cryptobam: dma-controller@1dc4000 { compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0"; reg = <0x0 0x01dc4000 0x0 0x28000>;Signature · 1 line
2.53.0
Signature · 2 lines
With best wishes Dmitry
PATCH 8/8 arm64: dts: qcom: Add Microsoft Surface Pro 12in
In reply to Harrison VanderbylInitial device tree for Microsoft Surface Pro 12in
Currently supported:
- UFS
- Touchscreen
- Pen
- USB 3.2 x2 (DP Alt Mode)
- Audio
- Wifi
- Bluetooth
- CDSP
- ADSP
- GPU
Not currently supported:
- Accelerometer
- Front, Back and IR cameras
- IRIS video decoder
Tested on Surface_Pro_12in_1st_Ed_with_Snapdragon_2110
--- arch/arm64/boot/dts/qcom/Makefile | 2 + .../dts/qcom/x1p42100-microsoft-sp12in.dts | 1160 +++++++++++++++++ 2 files changed, 1162 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts
arch/arm64/boot/dts/qcom/Makefile +2 -0
@@ -449,3 +449,5 @@ x1p42100-lenovo-thinkbook-16-el2-dtbs := x1p42100-lenovo-thinkbook-16.dtb x1-el2 dtb-$(CONFIG_ARCH_QCOM) += x1p42100-lenovo-thinkbook-16.dtb x1p42100-lenovo-thinkbook-16-el2.dtb x1p64100-microsoft-denali-el2-dtbs := x1p64100-microsoft-denali.dtb x1-el2.dtbo dtb-$(CONFIG_ARCH_QCOM) += x1p64100-microsoft-denali.dtb x1p64100-microsoft-denali-el2.dtb +x1p42100-microsoft-sp12in-el2-dtbs := x1p42100-microsoft-sp12in.dtb x1-el2.dtbo +dtb-$(CONFIG_ARCH_QCOM) += x1p42100-microsoft-sp12in.dtb x1p42100-microsoft-sp12in-el2.dtb
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts new file +1160 -0
1,160 lines not on this page · raw message
Signature · 1 line
2.53.0
Re: [PATCH v1 8/8] arm64: dts: qcom: Add Microsoft Surface Pro 12in
Quoted 259 lines · Harrison Vanderbyl
Initial device tree for Microsoft Surface Pro 12in
Currently supported:
- UFS
- Touchscreen
- Pen
- USB 3.2 x2 (DP Alt Mode)
- Audio
- Wifi
- Bluetooth
- CDSP
- ADSP
- GPUNot currently supported:
- Accelerometer
- Front, Back and IR cameras
- IRIS video decoderTested on
Surface_Pro_12in_1st_Ed_with_Snapdragon_2110Signed-off-by Harrison Vanderbyl <[email protected]>--- arch/arm64/boot/dts/qcom/Makefile | 2 + .../dts/qcom/x1p42100-microsoft-sp12in.dts | 1160 +++++++++++++++++ 2 files changed, 1162 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dtsarch/arm64/boot/dts/qcom/Makefile +2
-0@@ -449,3 +449,5 @@ x1p42100-lenovo-thinkbook-16-el2-dtbs := x1p42100-lenovo-thinkbook-16.dtb x1-el2 dtb-$(CONFIG_ARCH_QCOM) += x1p42100-lenovo-thinkbook-16.dtb x1p42100-lenovo-thinkbook-16-el2.dtb x1p64100-microsoft-denali-el2-dtbs := x1p64100-microsoft-denali.dtb x1-el2.dtbo dtb-$(CONFIG_ARCH_QCOM) += x1p64100-microsoft-denali.dtb x1p64100-microsoft-denali-el2.dtb +x1p42100-microsoft-sp12in-el2-dtbs := x1p42100-microsoft-sp12in.dtb x1-el2.dtbo +dtb-$(CONFIG_ARCH_QCOM) += x1p42100-microsoft-sp12in.dtb x1p42100-microsoft-sp12in-el2.dtbarch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts new file +215
-0@@ -0,0 +1,1160 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024, Linaro Limited + * Copyright (c) 2025, Jens Glathe + * Copyright (c) 2025, Harrison Vanderbyl + */ + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/gpio-keys.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h> +#include <dt-bindings/clock/qcom,x1e80100-tcsr.h> + +#include "purwa.dtsi" +#include "hamoa-pmics.dtsi" + +/delete-node/ &pmc8380_6; +/delete-node/ &pmc8380_6_thermal; + +/ { + model = "Surface Pro 12in 1st Edition"; + compatible = "microsoft,surface-pro-12in", "qcom,x1p42100"; + chassis-type = "tablet"; + + aliases { + serial0 = &uart2; + serial1 = &uart14; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pmk8550_pwm 0 5000000>; + + power-supply = <&vreg_edp_3p3>; + }; + + gpio-keys { + compatible = "gpio-keys"; + + pinctrl-0 = <&hall_int_n_default>; + pinctrl-names = "default"; + + switch-lid { + gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; + linux,input-type = <EV_SW>; + linux,code = <SW_LID>; + wakeup-source; + wakeup-event-action = <EV_ACT_DEASSERTED>; + }; + + key-vol-up { + gpios = <&pm8550_gpios 8 GPIO_ACTIVE_LOW>; + linux,code = <KEY_VOLUMEUP>; + debounce-interval = <15>; + linux,can-disable; + wakeup-source; + }; + + key-vol-down { + gpios = <&pm8550_gpios 6 GPIO_ACTIVE_LOW>; + linux,code = <KEY_VOLUMEDOWN>; + debounce-interval = <15>; + linux,can-disable; + wakeup-source; + }; + }; + + pmic-glink { + compatible = "qcom,x1e80100-pmic-glink", + "qcom,sm8550-pmic-glink", + "qcom,pmic-glink"; + #address-cells = <1>; + #size-cells = <0>; + orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>, + <&tlmm 123 GPIO_ACTIVE_HIGH>; + + /* Right-side upper port */ + connector@0 { + compatible = "usb-c-connector"; + reg = <0>; + power-role = "dual"; + data-role = "dual"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + pmic_glink_ss0_hs_in: endpoint { + remote-endpoint = <&usb_1_ss0_dwc3_hs>; + }; + }; + + port@1 { + reg = <1>; + + pmic_glink_ss0_ss_in: endpoint { + remote-endpoint = <&usb_1_ss0_qmpphy_out>; + }; + }; + + port@2 { + reg = <2>; + + pmic_glink_ss0_sbu: endpoint { + remote-endpoint = <&usb_1_ss0_sbu_mux>; + }; + }; + }; + }; + + /* Right-side lower port */ + connector@1 { + compatible = "usb-c-connector"; + reg = <1>; + power-role = "dual"; + data-role = "dual"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + pmic_glink_ss1_hs_in: endpoint { + remote-endpoint = <&usb_1_ss1_dwc3_hs>; + }; + }; + + port@1 { + reg = <1>; + + pmic_glink_ss1_ss_in: endpoint { + remote-endpoint = <&usb_1_ss1_qmpphy_out>; + }; + }; + + port@2 { + reg = <2>; + + pmic_glink_ss1_sbu: endpoint { + remote-endpoint = <&usb_1_ss1_sbu_mux>; + }; + }; + }; + }; + }; + + reserved-memory { + linux,cma { + compatible = "shared-dma-pool"; + size = <0x0 0x20000000>; + reusable; + linux,cma-default; + }; + }; + + vreg_edp_3p3: regulator-edp-3p3 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_EDP_3P3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&tlmm 70 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <&edp_reg_en>; + pinctrl-names = "default"; + + regulator-boot-on; + }; + + vph_pwr: regulator-vph-pwr { + compatible = "regulator-fixed"; + + regulator-name = "vph_pwr"; + regulator-min-microvolt = <3700000>; + regulator-max-microvolt = <3700000>; + }; + + vreg_wcn_0p95: regulator-wcn-0p95 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_WCN_0P95"; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <950000>; + + vin-supply = <&vreg_wcn_3p3>; + }; + + vreg_wcn_1p9: regulator-wcn-1p9 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_WCN_1P9"; + regulator-min-microvolt = <1900000>; + regulator-max-microvolt = <1900000>; + + vin-supply = <&vreg_wcn_3p3>; + }; + + vreg_wcn_3p3: regulator-wcn-3p3 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_WCN_3P3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; +
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts line 225
Quoted 10 lines
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts new file +10
-0+ gpio = <&tlmm 214 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <&wcn_sw_en>; + pinctrl-names = "default"; + }; + + sound { + compatible = "qcom,x1e80100-sndcard"; + model = "X1P42100-Microsoft-Surface-Pro-12in";
I see a PR for alsa-ucm-conf. Would you please also submit the topology to audioreach-topology?
Quoted 7 lines
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts new file +7
-0+ audio-routing = "SpkrLeft IN", "WSA WSA_SPK1 OUT", + "SpkrRight IN", "WSA WSA_SPK2 OUT", + "VA DMIC0", "vdd-micb", + "VA DMIC1", "vdd-micb", + "VA DMIC2", "vdd-micb", + "VA DMIC3", "vdd-micb"; +
[...]
Quoted 10 lines
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts new file +10
-0+ + usb-1-ss1-sbu-mux { + compatible = "onnn,fsusb42", "gpio-sbu-mux"; + + enable-gpios = <&tlmm 179 GPIO_ACTIVE_LOW>; + select-gpios = <&tlmm 178 GPIO_ACTIVE_HIGH>; + + pinctrl-0 = <&usb_1_ss1_sbu_default>; + pinctrl-names = "default"; +
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts line 363
Quoted 10 lines
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts new file +10
-0+ mode-switch; + orientation-switch; + + port { + usb_1_ss1_sbu_mux: endpoint { + remote-endpoint = <&pmic_glink_ss1_sbu>; + }; + }; + }; +
Nit: extra empty line
Quoted 2 lines
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts new file +2
-0+}; +
[...]
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts line 723
Quoted 5 lines
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts new file +5
-0+ +&i2c0 { + clock-frequency = <400000>; + + status = "okay";
If you have an idea of the devices on these busses, would you please add corresponding comments?
Quoted 14 lines
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts new file +14
-0+}; + +&i2c4 { + clock-frequency = <400000>; + + status = "okay"; +}; + +&i2c9 { + clock-frequency = <400000>; + + status = "okay"; +}; +
Signature · 2 lines
With best wishes Dmitry
[email protected]
AI reviewRe: [PATCH v1 8/8] arm64: dts: qcom: Add Microsoft Surface Pro 12in
In reply to Harrison VanderbylThank you for your contribution! Sashiko AI review found 6 potential issue(s) to consider: - [High] Touchscreen reset pin is statically driven high before power is applied. - [Medium] Audio routing…
Thank you for your contribution! Sashiko AI review found 6 potential issue(s) to consider:
- [High] Touchscreen reset pin is statically driven high before power is applied.
- [Medium] Audio routing specifies 4 DMICs but pinctrl only configures pins for DMIC0 and DMIC1.
- [Medium] Regulator enable pin statically forced high by pinctrl.
- [Medium] Inconsistent regulator assignment for USB QMP PHYs.
- [Medium] Missing pinctrl configurations for volume keys.
- [Low] Unused panel_pins pinctrl state defined in device tree.
--
commit bfa1ccc215b18064216c44242bb8398931a0520f
Author: Harrison Vanderbyl <[email protected]>
arm64: dts: qcom: Add Microsoft Surface Pro 12in
This commit adds the initial device tree for the Microsoft Surface Pro 12in, enabling various peripherals such as UFS, touchscreen, audio, and USB.
Quoted 6 lines
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts new file +0
-0@@ -0,0 +1,1160 @@
[ ... ]
Quoted 5 lines
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts new file +5
-0+ key-vol-up { + gpios = <&pm8550_gpios 8 GPIO_ACTIVE_LOW>; + linux,code = <KEY_VOLUMEUP>; + debounce-interval = <15>; + linux,can-disable;
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts line 69
Quoted 10 lines
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts new file +10
-0+ wakeup-source; + }; + + key-vol-down { + gpios = <&pm8550_gpios 6 GPIO_ACTIVE_LOW>; + linux,code = <KEY_VOLUMEDOWN>; + debounce-interval = <15>; + linux,can-disable; + wakeup-source; + };
Will these volume keys be prone to spurious interrupts? These nodes map to pm8550_gpios as GPIO_ACTIVE_LOW, but do not specify any pinctrl to configure internal pull-ups on the physical pads. Unless external pull-ups are present on the board, floating pins could trigger unwanted wakeups.
[ ... ]
Quoted 9 lines
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts new file +9
-0+ sound { + compatible = "qcom,x1e80100-sndcard"; + model = "X1P42100-Microsoft-Surface-Pro-12in"; + audio-routing = "SpkrLeft IN", "WSA WSA_SPK1 OUT", + "SpkrRight IN", "WSA WSA_SPK2 OUT", + "VA DMIC0", "vdd-micb", + "VA DMIC1", "vdd-micb", + "VA DMIC2", "vdd-micb", + "VA DMIC3", "vdd-micb";
[ ... ]
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts line 755
Quoted 8 lines
+&lpass_vamacro {
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts new file +7
-0+ qcom,dmic-sample-rate = <4800000>; + + vdd-micb-supply = <&vreg_l1b_1p8>; + + pinctrl-0 = <&dmic01_default>; + pinctrl-names = "default"; +};
Will audio capture from DMIC2 and DMIC3 fail with this configuration? The audio-routing maps 4 DMICs, but only the dmic01_default pins are configured in pinctrl, leaving the data and clock pins for DMIC2 and DMIC3 unconfigured. Should <&dmic23_default> be included here?
[ ... ]
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts line 717
Quoted 13 lines
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts new file +13
-0+ touchscreen@16 { + compatible = "hid-over-i2c"; + reg = <0x16>; + + hid-descr-addr = <0x1>; + interrupts-extended = <&tlmm 38 IRQ_TYPE_LEVEL_LOW>; + wakeup-source; + + vddl-supply = <&vreg_l15b_1p8>; + + pinctrl-0 = <&ts0_default>; + pinctrl-names = "default"; + };
Could this damage the touchscreen IC? The touchscreen node omits a reset-gpios property, but relies on ts0_default which hardcodes output-high on the reset pin.
Because pinctrl states are applied prior to the driver probe (which enables vddl-supply), driving logic high into the unpowered IC violates power sequencing and risks back-powering via ESD diodes.
Would it be better to provide reset-gpios in the touchscreen node so the driver can manage the line dynamically after regulators stabilize?
[ ... ]
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts line 946
Quoted 11 lines
+&tlmm {
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts new file +10
-0+ gpio-reserved-ranges = <34 2>, /* Unused */ + <44 4>; /* SPI (TPM) */ + + edp_reg_en: edp-reg-en-state { + pins = "gpio70"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + output-high; + };
Does this prevent the regulator framework from turning off vreg_edp_3p3? Hardcoding output-high in the pinctrl state overrides the regulator's ability to autonomously pull the line low when the supply is disabled, such as during system suspend.
[ ... ]
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts line 960
Quoted 7 lines
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts new file +7
-0+ panel_pins: panel-pins-state { + pins = "gpio29"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + output-low; + };
This isn't a bug, but panel_pins is defined here yet never referenced by the panel node or any other component. Is it dead code, or is a reference to it missing elsewhere to properly enable the display?
[ ... ]
Quoted 4 lines
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts new file +4
-0+ ts0_default: ts0-default-state { + int-n-pins { + pins = "gpio38"; + function = "gpio";
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts line 1004
Quoted 10 lines
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts new file +10
-0+ bias-disable; + }; + + reset-n-pins { + pins = "gpio48"; + function = "gpio"; + output-high; + drive-strength = <16>; + }; + };
(This is where output-high is currently defined for the touchscreen reset, as mentioned above.)
[ ... ]
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts line 1118
Quoted 6 lines
+&usb_1_ss0_qmpphy {
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts new file +5
-0+ vdda-phy-supply = <&vreg_l3e_1p2>; + vdda-pll-supply = <&vreg_l1j_0p8>; + + status = "okay"; +};
Should this use vreg_l2j_1p2 for the vdda-phy-supply instead?
Mixing a PHY supply from PMIC 'e' with a PLL supply from PMIC 'j' on the same node differs from usb_1_ss1_qmpphy, which consistently uses vreg_l2j_1p2. Using vreg_l3e_1p2 here looks similar to the pcie4_phy configuration, which could be a copy-paste error resulting in improper voltage scaling for this USB PHY.
Signature · 1 line
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=8
Re: [PATCH v1 8/8] arm64: dts: qcom: Add Microsoft Surface Pro 12in
In reply to Harrison VanderbylQuoted 1 line · Harrison Vanderbyl
Initial device tree for Microsoft Surface Pro 12in
[...]
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts line 79
Quoted 8 lines
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts new file +8
-0+ pmic-glink { + compatible = "qcom,x1e80100-pmic-glink", + "qcom,sm8550-pmic-glink", + "qcom,pmic-glink"; + #address-cells = <1>; + #size-cells = <0>; + orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>, + <&tlmm 123 GPIO_ACTIVE_HIGH>;
Please align the "s and <s
[...]
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts line 242
Quoted 10 lines
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts new file +10
-0+ va-dai-link { + link-name = "VA Capture"; + + cpu { + sound-dai = <&q6apmbedai VA_CODEC_DMA_TX_0>; + }; + + codec { + sound-dai = <&lpass_vamacro 0>; + };
'co'dec < 'cp'u
[...]
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts line 781
Quoted 5 lines
+&mdss_dp3 {
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts new file +4
-0+ /delete-property/ #sound-dai-cells; + + pinctrl-names = "default"; + pinctrl-0 = <&edp0_hpd_default>;
Please make sure to keep this order, file-wide:
property-n
property-names
[...]
Review
Quoted 2 lines
+&ufs_mem_hc {
(quoted diff) +1
-0+ status = "okay";
Let's keep status uniformly the last property, preceded by a \n
[...]
Review
Quoted 3 lines
+&usb_1_ss0 {
(quoted diff) +2
-0+ status = "okay"; + dr_mode = "host";
You declared the Type-C ports as dual-role - does it work if you skip this bit?
Konrad
Re: (subset) [PATCH v1 0/8] Add support for Microsoft Surface Pro 12in 1st Edition (Snapdragon)
In reply to Harrison VanderbylQuoted 11 lines · Harrison Vanderbyl
Add support for the Microsoft Surface Pro 12in 1st Edition (Snapdragon), based on the Qualcomm X1P42100 SoC.
Currently supported:
- UFS (with inline crypto)
- Touchscreen, pen, cover keyboard and touchpad (via SAM)
- USB 3.2 x2 with DP Alt Mode
- Audio, WiFi, Bluetooth
- CDSP, ADSP, GPU
- Display (BOE NE120DRM-N28 panel)
Quoted 1 line
[...]
Applied, thanks!
[4/8] firmware: qcom: scm: Allow QSEECOM on Surface Pro 12in
commit: 667d05a09db3da8b3dfbe0bc1dafae2d7887176b
Best regards,
Signature · 1 line
Bjorn Andersson <[email protected]>
v2 cover Add support for the Microsoft Surface Pro 12in 1st Edition (Snapdragon),
Changes in v2:
Ice device tree:
- Updated to use 0x0 formatting
Panel:
- Add edid to commit message
Device tree:
- Fixed formatting and ordering nits
- Removed extra dmic audio declarations
- Added suspected devices on i2c busses
- Fixed incorrect usb regulator
- Describe panel pin regulator
- Added defaults for volume button GPIOs
QSEECOM patch (4/8 in v1):
- Applied by Bjorn Andersson
Hid patch (5/8 in v1):
- Acked by Jiri Kosina, but not applied yet.
Link to v1:
https://lore.kernel.org/all/[email protected]/
Currently supported:
- UFS (with inline crypto)
- Touchscreen, pen, cover keyboard and touchpad (via SAM)
- USB 3.2 x2 with DP Alt Mode
- Audio, WiFi, Bluetooth
- CDSP, ADSP, GPU
- Display (BOE NE120DRM-N28 panel)
Not yet supported:
- Accelerometer
- Front, back, and IR cameras
- IRIS video decoder
Note on the compatible string: unlike other Microsoft Surface devices upstream (denali, arcata, romulus13, blackrock), this device does not appear to carry an internal codename in firmware. The DSDT, SMBIOS, and EFI variables only refer to it as "Surface Pro 12in 1st Ed with Snapdragon" (SKU 2110). I have used microsoft,surface-pro-12in as the compatible. Suggestions welcome.
Although the device is marketed as just a smaller version of the denali, it has enough differences that it warranted a different compatible and device tree.
Tested on Surface Pro 12in 1st Ed with Snapdragon (SKU 2110).
Harrison Vanderbyl (7):
dt-bindings: arm: qcom: Add Microsoft Surface Pro 12in
dt-bindings: crypto: Add x1e80100 inline crypto platform/surface: SAM: Add support for Surface Pro 12in
hid: Pen battery quirk for Surface Pro 12in drm/panel-edp: Add panel for Surface Pro 12in
arm64: dts: qcom: hamoa: Add inline crypto for UFS
arm64: dts: qcom: Add Microsoft Surface Pro 12in
.../devicetree/bindings/arm/qcom.yaml | 4 + .../crypto/qcom,inline-crypto-engine.yaml | 1 + arch/arm64/boot/dts/qcom/Makefile | 2 + arch/arm64/boot/dts/qcom/hamoa.dtsi | 10 + .../dts/qcom/x1p42100-microsoft-sp12in.dts | 1201 +++++++++++++++++ drivers/gpu/drm/panel/panel-edp.c | 1 + drivers/hid/hid-ids.h | 1 + drivers/hid/hid-input.c | 2 + .../surface/surface_aggregator_registry.c | 15 + 9 files changed, 1237 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts
base-commit: 5d6919055dec134de3c40167a490f33c74c12581
prerequisite-patch-id: a34133ba03bd1d31c0ed08612c31131b62015654
Signature · 1 line
2.53.0
PATCH v2 1/7 dt-bindings: arm: qcom: Add Microsoft Surface Pro 12in
Document the compatible string for the Microsoft Surface Pro 12-inch, 1st Edition with Snapdragon, based on the Qualcomm X1P42100 SoC.
--- Documentation/devicetree/bindings/arm/qcom.yaml | 4 ++++ 1 file changed, 4 insertions(+)
Documentation/devicetree/bindings/arm/qcom.yaml +4 -0
@@ -1168,6 +1168,10 @@ properties: - const: microsoft,denali - const: qcom,x1e80100 + - items: + - const: microsoft,surface-pro-12in + - const: qcom,x1p42100 + - items: - enum: - qcom,purwa-iot-evk
Signature · 1 line
2.53.0
Re: [PATCH v2 1/7] dt-bindings: arm: qcom: Add Microsoft Surface Pro 12in
Quoted 14 lines · Harrison Vanderbyl
Document the compatible string for the Microsoft Surface Pro 12-inch, 1st Edition with Snapdragon, based on the Qualcomm X1P42100 SoC.
Signed-off-by Harrison Vanderbyl <[email protected]>--- Documentation/devicetree/bindings/arm/qcom.yaml | 4 ++++ 1 file changed, 4 insertions(+)Documentation/devicetree/bindings/arm/qcom.yaml +0
-0
Documentation/devicetree/bindings/arm/qcom.yaml properties: · line 1172
Quoted 5 lines
Documentation/devicetree/bindings/arm/qcom.yaml +2
-0@@ -1168,6 +1168,10 @@ properties: - const: microsoft,denali - const: qcom,x1e80100 + - items: + - const: microsoft,surface-pro-12in
Why isn't this part of the other enum with all devices?
Best regards,
Krzysztof
PATCH v2 2/7 dt-bindings: crypto: Add x1e80100 inline crypto
In reply to Harrison VanderbylAdd compatibility string for the x1e80100/x1p42100 inline crypto engine.
--- .../devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml | 1 + 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml +1 -0
@@ -24,6 +24,7 @@ properties: - qcom,sm8550-inline-crypto-engine - qcom,sm8650-inline-crypto-engine - qcom,sm8750-inline-crypto-engine + - qcom,x1e80100-inline-crypto-engine - const: qcom,inline-crypto-engine reg:
Signature · 1 line
2.53.0
Re: [PATCH v2 2/7] dt-bindings: crypto: Add x1e80100 inline crypto
Quoted 4 lines · Harrison Vanderbyl
Add compatibility string for the x1e80100/x1p42100 inline crypto engine.
Signed-off-by Harrison Vanderbyl <[email protected]>
This was posted, please do not duplicate work.
https://lore.kernel.org/all/eggp3un5ufbw2mjamxmpfccq3cs2luxabpa2sucofydzoak4vg@hy7mx3rtqfko/
Do not attach (thread) your patchsets to some other threads (unrelated or older versions). This buries them deep in the mailbox and might interfere with applying entire sets. See also:
https://elixir.bootlin.com/linux/v6.16-rc2/source/Documentation/process/submitting-patches.rst#L830
Best regards,
Krzysztof
PATCH v2 3/7 platform/surface: SAM: Add support for Surface Pro 12in
In reply to Harrison VanderbylAdd a SAM client device node group and registry entry for the Microsoft Surface Pro, 12-inch with Snapdragon.
This set enables the use of the following devices. 1: cover keyboard
2: cover touchpad
3: pen stash events.
The battery info and charger info devices have been purposefully omitted as they are also reported by other drivers and cause conflicts.
--- .../surface/surface_aggregator_registry.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
drivers/platform/surface/surface_aggregator_registry.c +15 -0
@@ -422,6 +422,19 @@ static const struct software_node *ssam_node_group_sp11[] = { NULL, }; +/* Devices for Surface Pro 12" first edition (ARM/QCOM) */ +static const struct software_node *ssam_node_group_sp12in[] = { + &ssam_node_root, + &ssam_node_hub_kip, + &ssam_node_tmp_sensors, + &ssam_node_hid_kip_keyboard, + &ssam_node_hid_sam_penstash, + &ssam_node_hid_kip_touchpad, + &ssam_node_hid_kip_fwupd, + &ssam_node_pos_tablet_switch, +NULL , +}; +/* -- SSAM platform/meta-hub driver. ---------------------------------------- */ static const struct acpi_device_id ssam_platform_hub_acpi_match[] = {
@@ -500,6 +513,8 @@ static const struct of_device_id ssam_platform_hub_of_match[] __maybe_unused = { { .compatible = "microsoft,arcata", (void *)ssam_node_group_sp9_5g }, /* Surface Pro 11 (ARM/QCOM) */ { .compatible = "microsoft,denali", (void *)ssam_node_group_sp11 }, + /* Surface Pro 12in First Edition (ARM/QCOM) */ + { .compatible = "microsoft,surface-pro-12in", (void *)ssam_node_group_sp12in }, /* Surface Laptop 7 */ { .compatible = "microsoft,romulus13", (void *)ssam_node_group_sl7 }, { .compatible = "microsoft,romulus15", (void *)ssam_node_group_sl7 },
Signature · 1 line
2.53.0
[email protected]
AI reviewRe: [PATCH v2 3/7] platform/surface: SAM: Add support for Surface Pro 12in
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [Medium] Incorrect software node used for the pen stash device, breaking pen stash events. --
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Incorrect software node used for the pen stash device, breaking pen stash events. --
commit 66a330e4ed95d1a03b167abb4b106aaef584a66f
Author: Harrison Vanderbyl <[email protected]>
platform/surface: SAM: Add support for Surface Pro 12in
This commit adds a SAM client device node group and registry entry for the Microsoft Surface Pro 12-inch. It specifically mentions enabling the cover keyboard, cover touchpad, and pen stash events.
Quoted 4 lines
drivers/platform/surface/surface_aggregator_registry.c +0
-0
[ ... ]
drivers/platform/surface/surface_aggregator_registry.c static const struct software_node *ssam_node_group_sp11[] = { · line 431
Quoted 11 lines
drivers/platform/surface/surface_aggregator_registry.c +7
-0@@ -422,6 +422,19 @@ static const struct software_node *ssam_node_group_sp11[] = { NULL, }; +/* Devices for Surface Pro 12" first edition (ARM/QCOM) */ +static const struct software_node *ssam_node_group_sp12in[] = { + &ssam_node_root, + &ssam_node_hub_kip, + &ssam_node_tmp_sensors, + &ssam_node_hid_kip_keyboard, + &ssam_node_hid_sam_penstash,
Will this software node work correctly for the Surface Pro pen stash events?
Since the pen is typically stashed inside the detachable cover keyboard on Surface Pro devices, its events are usually routed through the Keyboard Interface Protocol (KIP) hub.
Other Surface Pro models, like the SP11, use ssam_node_hid_kip_penstash instead. Should this use the KIP variant here as well? Using the SAM variant might cause the driver to listen on the wrong target ID and miss the pen stash events entirely.
Quoted 5 lines
drivers/platform/surface/surface_aggregator_registry.c +5
-0+ &ssam_node_hid_kip_touchpad, + &ssam_node_hid_kip_fwupd, + &ssam_node_pos_tablet_switch, + NULL, +};
Signature · 1 line
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=3
Ilpo Järvinen
maintainerRe: [PATCH v2 3/7] platform/surface: SAM: Add support for Surface Pro 12in
In reply to Harrison VanderbylQuoted 22 lines · Harrison Vanderbyl
Add a SAM client device node group and registry entry for the Microsoft Surface Pro, 12-inch with Snapdragon.
This set enables the use of the following devices. 1: cover keyboard
2: cover touchpad
3: pen stash events.The battery info and charger info devices have been purposefully omitted as they are also reported by other drivers and cause conflicts.
Signed-off-by Harrison Vanderbyl <[email protected]>--- .../surface/surface_aggregator_registry.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+)drivers/platform/surface/surface_aggregator_registry.c +0
-0
drivers/platform/surface/surface_aggregator_registry.c static const struct software_node *ssam_node_group_sp11[] = { · line 431
Quoted 10 lines
drivers/platform/surface/surface_aggregator_registry.c +7
-0@@ -422,6 +422,19 @@ static const struct software_node *ssam_node_group_sp11[] = { NULL, }; +/* Devices for Surface Pro 12" first edition (ARM/QCOM) */ +static const struct software_node *ssam_node_group_sp12in[] = { + &ssam_node_root, + &ssam_node_hub_kip, + &ssam_node_tmp_sensors, + &ssam_node_hid_kip_keyboard, + &ssam_node_hid_sam_penstash,
Hi,
Could you please confirm this penstash is correct (sam vs kip)?
Sashiko suggested it might be wrong but take it's report with a grain of salt, it's AI after all and sometimes seems to extrapolate about HW to a sibling HW without any real knowledge:
https://sashiko.dev/#/patchset/cover.1778822464.git.harrison.vanderbyl%40gmail.com
Signature · 1 line
i.
Quoted 18 lines
drivers/platform/surface/surface_aggregator_registry.c +8
-0+ &ssam_node_hid_kip_touchpad, + &ssam_node_hid_kip_fwupd, + &ssam_node_pos_tablet_switch, + NULL, +}; +/* -- SSAM platform/meta-hub driver. ---------------------------------------- */ static const struct acpi_device_id ssam_platform_hub_acpi_match[] = {@@ -500,6 +513,8 @@ static const struct of_device_id ssam_platform_hub_of_match[] __maybe_unused = { { .compatible = "microsoft,arcata", (void *)ssam_node_group_sp9_5g }, /* Surface Pro 11 (ARM/QCOM) */ { .compatible = "microsoft,denali", (void *)ssam_node_group_sp11 }, + /* Surface Pro 12in First Edition (ARM/QCOM) */ + { .compatible = "microsoft,surface-pro-12in", (void *)ssam_node_group_sp12in }, /* Surface Laptop 7 */ { .compatible = "microsoft,romulus13", (void *)ssam_node_group_sl7 }, { .compatible = "microsoft,romulus15", (void *)ssam_node_group_sl7 },
Re: [PATCH v2 3/7] platform/surface: SAM: Add support for Surface Pro 12in
Quoted 5 lines · Ilpo Järvinen
Could you please confirm this penstash is correct (sam vs kip)?
Sashiko suggested it might be wrong but take it's report with a grain of salt, it's AI after all and sometimes seems to extrapolate about HW to a sibling HW without any real knowledge:
Sam is correct here, unlike the surface pro 11, The pen stash is on the reverse of the screen, not on the detachable keyboard.
An image of the pen stash in use is available here:
https://cdn-dynmedia-1.microsoft.com/is/image/microsoftcorp/B04-Surface-Pro-12-inch-1Ed-Family-Rear?wid=1200&hei=900&qlt=90&bgc=F2F2F2F2&fmt=jpg
When using the above config,
pen stash events can be seen with evtest.
Thanks,
Harrison
Re: [PATCH v2 3/7] platform/surface: SAM: Add support for Surface Pro 12in
Quoted 11 lines · Harrison Vanderbyl
Quoted 5 lines · Ilpo Järvinen
Could you please confirm this penstash is correct (sam vs kip)?
Sashiko suggested it might be wrong but take it's report with a grain of salt, it's AI after all and sometimes seems to extrapolate about HW to a sibling HW without any real knowledge:
Sam is correct here, unlike the surface pro 11, The pen stash is on the reverse of the screen, not on the detachable keyboard.
Quoted 5 lines
An image of the pen stash in use is available here:
https://cdn-dynmedia-1.microsoft.com/is/image/microsoftcorp/B04-Surface-Pro-12-inch-1Ed-Family-Rear?wid=1200&hei=900&qlt=90&bgc=F2F2F2F2&fmt=jpgWhen using the above config,
pen stash events can be seen with evtest.
Thanks for confirming (not a big surprise AI couldn't know the spec but it was worth checking if it would have been because of copy-paste).
I've applied this patch 3 now to the review-ilpo-next branch.
Signature · 1 line
i.
PATCH v2 4/7 hid: Pen battery quirk for Surface Pro 12in
In reply to Harrison VanderbylThe pen setup for this device uses bluetooth for communicating battery levels and status instead of reporting it over i2c.
Without this quirk, the device either reports an
extra, broken phantom battery, or hangs.
--- drivers/hid/hid-ids.h | 1 + drivers/hid/hid-input.c | 2 ++ 2 files changed, 3 insertions(+)
drivers/hid/hid-ids.h +1 -0
@@ -459,6 +459,7 @@#define USB_DEVICE_ID_HP_X2 0x074d#define USB_DEVICE_ID_HP_X2_10_COVER 0x0755#define I2C_DEVICE_ID_CHROMEBOOK_TROGDOR_POMPOM 0x2F81 +#define I2C_DEVICE_ID_SURFACE_PRO_12IN 0x4376#define USB_VENDOR_ID_ELECOM 0x056e#define USB_DEVICE_ID_ELECOM_BM084 0x0061
drivers/hid/hid-input.c +2 -0
@@ -395,6 +395,8 @@ static const struct hid_device_id hid_battery_quirks[] = { HID_BATTERY_QUIRK_AVOID_QUERY }, {HID_I2C_DEVICE (USB_VENDOR_ID_ELAN ,I2C_DEVICE_ID_CHROMEBOOK_TROGDOR_POMPOM ), HID_BATTERY_QUIRK_AVOID_QUERY }, + { HID_I2C_DEVICE(USB_VENDOR_ID_ELAN, I2C_DEVICE_ID_SURFACE_PRO_12IN), + HID_BATTERY_QUIRK_IGNORE },/* * Elan HID touchscreens seem to all report a non present battery, * set HID_BATTERY_QUIRK_IGNORE for all Elan I2C and USB HID devices.
Signature · 1 line
2.53.0
[email protected]
AI reviewRe: [PATCH v2 4/7] hid: Pen battery quirk for Surface Pro 12in
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [Low] The newly added macro uses spaces instead of a tab for value alignment. --
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The newly added macro uses spaces instead of a tab for value alignment. --
commit 41dd30be72b9f45b17d28788bd19cb4c73988147
Author: Harrison Vanderbyl <[email protected]>
hid: Pen battery quirk for Surface Pro 12in
This commit adds a battery quirk for the Surface Pro 12in pen, which uses bluetooth for communicating battery levels rather than i2c. Adding this quirk prevents the device from reporting a phantom battery or hanging.
Quoted 4 lines
drivers/hid/hid-ids.h +0
-0
[ ... ]
drivers/hid/hid-ids.h line 462
Quoted 5 lines
drivers/hid/hid-ids.h +1
-0@@ -459,6 +459,7 @@#define USB_DEVICE_ID_HP_X2 0x074d#define USB_DEVICE_ID_HP_X2_10_COVER 0x0755#define I2C_DEVICE_ID_CHROMEBOOK_TROGDOR_POMPOM 0x2F81 +#define I2C_DEVICE_ID_SURFACE_PRO_12IN 0x4376
This isn't a bug, but it looks like spaces were used instead of a tab for alignment here. The surrounding definitions use tabs.
Signature · 1 line
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=4
PATCH v2 5/7 drm/panel-edp: Add panel for Surface Pro 12in
In reply to Harrison VanderbylAdd an entry for the BOE NE120DRM-N28 panel, used in the Microsoft Surface Pro 12-inch.
The values chosen were tested to be working fine for wake from sleep and hibernation.
Panel edid:
00 ff ff ff ff ff ff 00 09 e5 c9 0c a0 06 00 07 0a 22 01 04 a5 19 11 78 07 9f 15 a6 55 4c 9b 25 0e 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 62 53 94 a0 80 b8 2e 50 18 10 3a 00 fe a9 00 00 00 1a 13 7d 94 a0 80 b8 2e 50 18 10 3a 00 fe a9 00 00 00 1a 00 00 00 fd 00 18 5a 5b 88 20 01 0a 20 20 20 20 20 20 00 00 00 fc 00 4e 45 31 32 30 44 52 4d 2d 4e 32 38 0a 00 0a
--- drivers/gpu/drm/panel/panel-edp.c | 1 + 1 file changed, 1 insertion(+)
drivers/gpu/drm/panel/panel-edp.c +1 -0
@@ -2020,6 +2020,7 @@ static const struct edp_panel_entry edp_panels[] = {EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0c26 , &delay_200_500_p2e200,"NV140WUM-T08" ),EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0c93 , &delay_200_500_e200,"Unknown" ),EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0cb6 , &delay_200_500_e200,"NT116WHM-N44" ), +EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0cc9 , &delay_200_500_e50,"NE120DRM-N28" ),EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0cf2 , &delay_200_500_e200,"NV156FHM-N4S" ),EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0cf6 , &delay_200_500_e200_d100,"NV140WUM-N64" ), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cfa, &delay_200_500_e50, "NV116WHM-A4D"),
Signature · 1 line
2.53.0
Re: [PATCH v2 5/7] drm/panel-edp: Add panel for Surface Pro 12in
Hi,
Quoted 18 lines · Harrison Vanderbyl
Add an entry for the BOE NE120DRM-N28 panel, used in the Microsoft Surface Pro 12-inch.
The values chosen were tested to be working fine for wake from sleep and hibernation.
Panel edid:
00 ff ff ff ff ff ff 00 09 e5 c9 0c a0 06 00 07 0a 22 01 04 a5 19 11 78 07 9f 15 a6 55 4c 9b 25 0e 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 62 53 94 a0 80 b8 2e 50 18 10 3a 00 fe a9 00 00 00 1a 13 7d 94 a0 80 b8 2e 50 18 10 3a 00 fe a9 00 00 00 1a 00 00 00 fd 00 18 5a 5b 88 20 01 0a 20 20 20 20 20 20 00 00 00 fc 00 4e 45 31 32 30 44 52 4d 2d 4e 32 38 0a 00 0a
Quoted 4 lines
Signed-off-by Harrison Vanderbyl <[email protected]>--- drivers/gpu/drm/panel/panel-edp.c | 1 + 1 file changed, 1 insertion(+)
Pushed to drm-misc-next:
[5/7] drm/panel-edp: Add panel for Surface Pro 12in
commit: 02f48ffdf96c83ca3e6600fe5dec872b34b68775
PATCH v2 6/7 arm64: dts: qcom: hamoa: Add inline crypto for UFS
In reply to Harrison VanderbylAdd the Inline Crypto node and wire it to ufs_mem, enabling UFS storage encryption on x1e80100 and derivative SOCs.
This is needed to support encrypted storage on
the Microsoft Surface Pro 12-inch.
--- arch/arm64/boot/dts/qcom/hamoa.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)
arch/arm64/boot/dts/qcom/hamoa.dtsi +10 -0
@@ -3952,6 +3952,8 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, phys = <&ufs_mem_phy>; phy-names = "ufsphy"; + qcom,ice = <&ice>; + #reset-cells = <1>; status = "disabled";
@@ -3997,6 +3999,14 @@ opp-300000000 { }; }; + ice: crypto@1d88000 { + compatible = "qcom,x1e80100-inline-crypto-engine", + "qcom,inline-crypto-engine"; + reg = <0x0 0x01d88000 0x0 0x8000>; + + clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; + }; + cryptobam: dma-controller@1dc4000 { compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0"; reg = <0x0 0x01dc4000 0x0 0x28000>;
Signature · 1 line
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[email protected]
AI reviewRe: [PATCH v2 6/7] arm64: dts: qcom: hamoa: Add inline crypto for UFS
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [High] The mapped register size for the `ice` (Inline Crypto Engine) node is too small, which will cause…
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The mapped register size for the ice (Inline Crypto Engine) node is too small, which will cause a kernel panic when Hardware Key Manager (HWKM) features are used. --
commit d49e015ad1235b81d3dc9cb4256b44b206a03560
Author: Harrison Vanderbyl <[email protected]>
arm64: dts: qcom: hamoa: Add inline crypto for UFS
This commit adds the Inline Crypto Engine node and wires it to ufs_mem to enable UFS storage encryption on x1e80100 and derivative SOCs.
Quoted 3 lines
arch/arm64/boot/dts/qcom/hamoa.dtsi +0
-0
[ ... ]
arch/arm64/boot/dts/qcom/hamoa.dtsi opp-300000000 { · line 4005
Quoted 8 lines
arch/arm64/boot/dts/qcom/hamoa.dtsi +4
-0@@ -3997,6 +3999,14 @@ opp-300000000 { }; }; + ice: crypto@1d88000 { + compatible = "qcom,x1e80100-inline-crypto-engine", + "qcom,inline-crypto-engine"; + reg = <0x0 0x01d88000 0x0 0x8000>;
Will this mapped size be large enough when hardware-wrapped keys are enabled via the Hardware Key Manager (HWKM)?
When the qcom_ice driver initializes HWKM, it accesses registers at offsets that appear to exceed the 0x8000 length provided here. For example, it accesses QCOM_ICE_REG_HWKM_TZ_KM_STATUS at 0x9004, and QCOM_ICE_REG_HWKM_BANK0_BBAC_4 at 0xD010.
Could reading or writing to these offsets cause a synchronous external abort and crash the kernel since they fall outside the mapped memory region?
Should the size be expanded to cover the full HWKM address space, such as 0x18000, similar to the configuration on other HWKM-capable SoCs?
Quoted 3 lines
arch/arm64/boot/dts/qcom/hamoa.dtsi +3
-0+ + clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; + };
Signature · 1 line
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=6
PATCH v2 7/7 arm64: dts: qcom: Add Microsoft Surface Pro 12in
In reply to Harrison VanderbylInitial device tree for Microsoft Surface Pro 12in
Currently supported:
- UFS
- Touchscreen
- Pen
- USB 3.2 x2 (DP Alt Mode)
- Audio
- Wifi
- Bluetooth
- CDSP
- ADSP
- GPU
Not currently supported:
- Accelerometer
- Front, Back and IR cameras
- IRIS video decoder
Tested on Surface_Pro_12in_1st_Ed_with_Snapdragon_2110
--- arch/arm64/boot/dts/qcom/Makefile | 2 + .../dts/qcom/x1p42100-microsoft-sp12in.dts | 1201 +++++++++++++++++ 2 files changed, 1203 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts
arch/arm64/boot/dts/qcom/Makefile +2 -0
@@ -449,3 +449,5 @@ x1p42100-lenovo-thinkbook-16-el2-dtbs := x1p42100-lenovo-thinkbook-16.dtb x1-el2 dtb-$(CONFIG_ARCH_QCOM) += x1p42100-lenovo-thinkbook-16.dtb x1p42100-lenovo-thinkbook-16-el2.dtb x1p64100-microsoft-denali-el2-dtbs := x1p64100-microsoft-denali.dtb x1-el2.dtbo dtb-$(CONFIG_ARCH_QCOM) += x1p64100-microsoft-denali.dtb x1p64100-microsoft-denali-el2.dtb +x1p42100-microsoft-sp12in-el2-dtbs := x1p42100-microsoft-sp12in.dtb x1-el2.dtbo +dtb-$(CONFIG_ARCH_QCOM) += x1p42100-microsoft-sp12in.dtb x1p42100-microsoft-sp12in-el2.dtb
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts new file +1201 -0
1,201 lines not on this page · raw message
Signature · 1 line
2.53.0
[email protected]
AI reviewRe: [PATCH v2 7/7] arm64: dts: qcom: Add Microsoft Surface Pro 12in
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider: - [High] Device Tree and Driver mismatch for WSA8845 speaker reset GPIO - [Low] Incorrect indentation in…
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] Device Tree and Driver mismatch for WSA8845 speaker reset GPIO
- [Low] Incorrect indentation in &pm8550_gpios node
--
commit 0876a51b5a0549c867accb3d391daa4e0f3c28b3
Author: Harrison Vanderbyl <[email protected]>
arm64: dts: qcom: Add Microsoft Surface Pro 12in
This commit introduces the initial device tree for the Microsoft Surface Pro 12in, adding support for various peripherals including UFS, touchscreen, USB, audio, Wi-Fi, and Bluetooth.
Quoted 5 lines
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts new file +0
-0
[ ... ]
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts line 889
Quoted 10 lines
+&pm8550_gpios {
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts new file +9
-0+ vol_up_n_default: vol-up-n-state { + pins = "gpio8"; + function = "normal"; + power-source = <1>; + bias-pull-up; + input-enable; + }; + + vol_down_n_default: vol-down-n-state {
This isn't a bug, but should these subnodes be indented with a hardware tab instead of spaces to match standard device tree coding guidelines?
[ ... ]
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts line 956
Quoted 11 lines
+&swr0 {
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts new file +10
-0+ pinctrl-0 = <&wsa_swr_active>, <&spkr_01_sd_n_active>; + pinctrl-names = "default"; + + status = "okay"; + + /* WSA8845, Left speaker */ + left_spkr: speaker@0,0 { + compatible = "sdw20217020400"; + reg = <0 0>; + reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>;
Will this prevent the speakers from enumerating on the SoundWire bus?
Looking at the WSA884x codec driver in sound/soc/codecs/wsa884x.c, it requests this GPIO by the name "powerdown":
devm_gpiod_get_optional(dev, "powerdown", ...)
Because the driver looks for the powerdown-gpios property, it will fail to acquire the GPIO named reset-gpios here. Concurrently, the pinctrl state spkr_01_sd_n_active drives this pin output-low, asserting the active-low reset.
Since the driver never releases the reset, the speakers will stay powered down and audio playback will fail. Should this property be renamed to powerdown-gpios?
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts line 968
Quoted 12 lines
arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts new file +12
-0+ #sound-dai-cells = <0>; + sound-name-prefix = "SpkrLeft"; + vdd-1p8-supply = <&vreg_l15b_1p8>; + vdd-io-supply = <&vreg_l12b_1p2>; + qcom,port-mapping = <1 2 3 7 10 13>; + }; + + /* WSA8845, Right speaker */ + right_spkr: speaker@0,1 { + compatible = "sdw20217020400"; + reg = <0 1>; + reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>;
Does this speaker node have the same naming issue where it should use powerdown-gpios instead of reset-gpios?
Signature · 1 line
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=7
Re: [PATCH v2 7/7] arm64: dts: qcom: Add Microsoft Surface Pro 12in
In reply to Harrison VanderbylQuoted 19 lines · Harrison Vanderbyl
Initial device tree for Microsoft Surface Pro 12in
Currently supported:
- UFS
- Touchscreen
- Pen
- USB 3.2 x2 (DP Alt Mode)
- Audio
- Wifi
- Bluetooth
- CDSP
- ADSP
- GPUNot currently supported:
- Accelerometer
- Front, Back and IR cameras
- IRIS video decoder
Quoted 9 lines
Tested on
Surface_Pro_12in_1st_Ed_with_Snapdragon_2110Signed-off-by Harrison Vanderbyl <[email protected]>--- arch/arm64/boot/dts/qcom/Makefile | 2 + .../dts/qcom/x1p42100-microsoft-sp12in.dts | 1201 +++++++++++++++++ 2 files changed, 1203 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts
Signature · 2 lines
With best wishes Dmitry
Re: [PATCH v2 0/7] Add support for the Microsoft Surface Pro 12in 1st Edition (Snapdragon),
In reply to Harrison VanderbylQuoted 1 line · Harrison Vanderbyl
Changes in v2:
Please don't send new iterations as a reply to the previous iteration. Always start new thread for the new iteration.
Quoted 3 lines
Ice device tree:
- Updated to use0x0formatting
Signature · 2 lines
With best wishes Dmitry