Skip to contentSkip to conversation

arm64: dts: imx93-var-som-symphony: align DTS with hardware revision

PATCH Superseded Stefano Radaelli 3 participants 8 messages May 29 – Jun 3

Subsystems (2)

v2 of 3 Superseded Latest is v3 →

lore
Share & tools
lore
#0 lore raw

v2 cover arm64: dts: imx93-var-som-symphony: align DTS with hardware revision

This series updates the i.MX93 VAR-SOM Symphony device tree to match the latest carrier board hardware revision.

The changes add support for onboard peripherals and complete the board configuration with the required GPIO, pinctrl and PWM settings.

v1->v2:
- Rename pca6408 label to pcal6408 to match the compatible
- Clarify that the TPM enable line is a board-level GPIO hog

Stefano Radaelli (4):
arm64: dts: imx93-var-som-symphony: add TPM support
arm64: dts: imx93-var-som-symphony: enable UART7
arm64: dts: imx93-var-som-symphony: keep RGB_SEL low
arm64: dts: imx93-var-som-symphony: enable TPM3 PWM

 .../dts/freescale/imx93-var-som-symphony.dts  | 61 +++++++++++++++++++
 1 file changed, 61 insertions(+)

base-commit: b3c1d1631f097619f8091f0293e027c4301285d6

Signature · 1 line
2.47.3
#1 lore raw

PATCH v2 1/4 arm64: dts: imx93-var-som-symphony: add TPM support

From: Stefano Radaelli <[email protected]>

Add the ST33KTPM2XI2C TPM device on the Symphony carrier board.

The TPM enable line is a board-level signal driven through the PCAL6408 GPIO expander. Keep it asserted with a GPIO hog so the TPM is enabled on this board.

The TPM binding does not provide a dedicated enable GPIO or supply property, so this cannot currently be expressed as a direct TPM dependency.

---
v1->v2:
- Rename pca6408 label to pcal6408 to match the compatible
- Clarify that the TPM enable line is a board-level GPIO hog

 .../dts/freescale/imx93-var-som-symphony.dts  | 20 +++++++++++++++++++
 1 file changed, 20 insertions(+)
arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts +20 -0
index c0842fb3cfa3..f541308ebf6b 100644
@@ -208,6 +208,26 @@ &lpi2c1 {
 	sda-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
 	status = "okay";
 
+	pcal6408: gpio@21 {
+		compatible = "nxp,pcal6408";
+		reg = <0x21>;
+		gpio-controller;
+		#gpio-cells = <2>;
+		status = "okay";
+
+		tpm-enable-hog {
+			gpio-hog;
+			gpios = <4 GPIO_ACTIVE_HIGH>;
+			output-high;
+			line-name = "tpm_en";
+		};
+	};
+
+	st33ktpm2xi2c: tpm@2e {
+		compatible = "st,st33ktpm2xi2c", "tcg,tpm-tis-i2c";
+		reg = <0x2e>;
+	};
+
 	/* Capacitive touch controller */
 	ft5x06_ts: touchscreen@38 {
 		compatible = "edt,edt-ft5206";
Signature · 1 line
2.47.3
#2 lore raw

Re: [PATCH v2 1/4] arm64: dts: imx93-var-som-symphony: add TPM support

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [High] The TPM device relies on a GPIO hog from a sibling I2C GPIO expander to be enabled, but lacks a…

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The TPM device relies on a GPIO hog from a sibling I2C GPIO expander to be enabled, but lacks a structural device dependency, leading to a probe race condition and potential initialization failures. --

commit 2c29a43f4e74b7d0f118dc8b7401c07e3617e874
Author: Stefano Radaelli <[email protected]>

arm64: dts: imx93-var-som-symphony: add TPM support

This commit adds the ST33KTPM2XI2C TPM device to the Symphony carrier board. It uses a GPIO hog on the PCAL6408 GPIO expander to assert the TPM enable line, since the binding lacks a dedicated enable GPIO property.

Quoted 4 lines
arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts +0 -0
index c0842fb3cfa33..f541308ebf6b8 100644

[ ... ]

Quoted 13 lines
arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts +9 -0
@@ -208,6 +208,26 @@ &lpi2c1 {
 	sda-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
 	status = "okay";
 
+	pcal6408: gpio@21 {
+		compatible = "nxp,pcal6408";
+		reg = <0x21>;
+		gpio-controller;
+		#gpio-cells = <2>;
+		status = "okay";
+
+		tpm-enable-hog {
+			gpio-hog;

arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts &lpi2c1 { · line 229

Quoted 10 lines
arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts +10 -0
+			gpios = <4 GPIO_ACTIVE_HIGH>;
+			output-high;
+			line-name = "tpm_en";
+		};
+	};
+
+	st33ktpm2xi2c: tpm@2e {
+		compatible = "st,st33ktpm2xi2c", "tcg,tpm-tis-i2c";
+		reg = <0x2e>;
+	};

[Severity: High]
Since there is no explicit structural dependency between the TPM device and the GPIO expander, could this introduce a probe order race condition?

Because fw_devlink is unaware of this relationship, if the drivers are loaded asynchronously and the tpm_tis_i2c driver probes before the gpio-pca953x driver, the enable line will remain deasserted.

The TPM driver's initial I2C read might receive a NACK and return a permanent error like -ENXIO instead of returning -EPROBE_DEFER.

Does this setup inadvertently rely on undefined probe ordering to ensure the TPM is enabled before it is initialized?

Signature · 1 line
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=1
maintainer
#3 lore raw

Re: [PATCH v2 1/4] arm64: dts: imx93-var-som-symphony: add TPM support

In reply to Stefano Radaelli
Quoted 11 lines · Stefano Radaelli

From: Stefano Radaelli <[email protected]>

Add the ST33KTPM2XI2C TPM device on the Symphony carrier board.

The TPM enable line is a board-level signal driven through the PCAL6408 GPIO expander. Keep it asserted with a GPIO hog so the TPM is enabled on this board.

The TPM binding does not provide a dedicated enable GPIO or supply property, so this cannot currently be expressed as a direct TPM dependency.

there are reset/reset-gpio, can you use it?

Frank

Quoted 44 lines

---
v1->v2:
- Rename pca6408 label to pcal6408 to match the compatible
- Clarify that the TPM enable line is a board-level GPIO hog

 .../dts/freescale/imx93-var-som-symphony.dts  | 20 +++++++++++++++++++
 1 file changed, 20 insertions(+)
arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts +20 -1
index c0842fb3cfa3..f541308ebf6b 100644
@@ -208,6 +208,26 @@ &lpi2c1 {
 	sda-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
 	status = "okay";
 
+	pcal6408: gpio@21 {
+		compatible = "nxp,pcal6408";
+		reg = <0x21>;
+		gpio-controller;
+		#gpio-cells = <2>;
+		status = "okay";
+
+		tpm-enable-hog {
+			gpio-hog;
+			gpios = <4 GPIO_ACTIVE_HIGH>;
+			output-high;
+			line-name = "tpm_en";
+		};
+	};
+
+	st33ktpm2xi2c: tpm@2e {
+		compatible = "st,st33ktpm2xi2c", "tcg,tpm-tis-i2c";
+		reg = <0x2e>;
+	};
+
 	/* Capacitive touch controller */
 	ft5x06_ts: touchscreen@38 {
 		compatible = "edt,edt-ft5206";
--

2.47.3

#4 lore raw

Re: [PATCH v2 1/4] arm64: dts: imx93-var-som-symphony: add TPM support

Quoted 9 lines · Frank Li
Quoted 8 lines · Stefano Radaelli

From: Stefano Radaelli <[email protected]>

Add the ST33KTPM2XI2C TPM device on the Symphony carrier board.

The TPM enable line is a board-level signal driven through the PCAL6408 GPIO expander. Keep it asserted with a GPIO hog so the TPM is enabled on this board.

Quoted 8 lines
Quoted 3 lines

The TPM binding does not provide a dedicated enable GPIO or supply property, so this cannot currently be expressed as a direct TPM dependency.

there are reset/reset-gpio, can you use it?

Frank

Quoted 1 line

Hi Frank,

you are right, reset-gpios property will do the job.

I'll send V2 soon,

Thank you,
Stefano

#5 lore raw

PATCH v2 2/4 arm64: dts: imx93-var-som-symphony: enable UART7

In reply to Stefano Radaelli

From: Stefano Radaelli <[email protected]>

Enable UART7 on the Symphony carrier board and add its pinctrl configuration.

---
v1->v2:
-

 .../boot/dts/freescale/imx93-var-som-symphony.dts  | 14 ++++++++++++++
 1 file changed, 14 insertions(+)
arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts +14 -0
index f541308ebf6b..f313f168cfb4 100644
@@ -35,6 +35,7 @@ aliases {
 		serial3 = &lpuart4;
 		serial4 = &lpuart5;
 		serial5 = &lpuart6;
+		serial6 = &lpuart7;
 	};
 
 
@@ -310,6 +311,12 @@ &lpuart6 {
 	status = "okay";
 };
 
+&lpuart7 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart7>;
+	status = "okay";
+};
+
 &usbotg1 {
 	dr_mode = "otg";
 	hnp-disable;
@@ -446,6 +453,13 @@ MX93_PAD_GPIO_IO04__LPUART6_TX			0x31e
 		>;
 	};
 
+	pinctrl_uart7: uart7grp {
+		fsl,pins = <
+			MX93_PAD_GPIO_IO09__LPUART7_RX			0x31e
+			MX93_PAD_GPIO_IO08__LPUART7_TX			0x31e
+		>;
+	};
+
 	pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
 		fsl,pins = <
 			MX93_PAD_GPIO_IO18__GPIO2_IO18		0x31e
Signature · 1 line
2.47.3
#6 lore raw

PATCH v2 3/4 arm64: dts: imx93-var-som-symphony: keep RGB_SEL low

In reply to Stefano Radaelli

From: Stefano Radaelli <[email protected]>

Keep the RGB_SEL line driven low on the Symphony carrier board.

This avoids leaving the line floating and ensures the board remains in the expected display configuration.

---
v1->v2:
-

 arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts | 8 ++++++++
 1 file changed, 8 insertions(+)
arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts +8 -0
index f313f168cfb4..37bae4913bcf 100644
@@ -222,6 +222,14 @@ tpm-enable-hog {
 			output-high;
 			line-name = "tpm_en";
 		};
+
+		/* RGB_SEL */
+		lvds-brg-enable-hog {
+			gpio-hog;
+			gpios = <7 GPIO_ACTIVE_HIGH>;
+			output-low;
+			line-name = "lvds_brg_en";
+		};
 	};
 
 	st33ktpm2xi2c: tpm@2e {
Signature · 1 line
2.47.3
#7 lore raw

PATCH v2 4/4 arm64: dts: imx93-var-som-symphony: enable TPM3 PWM

In reply to Stefano Radaelli

From: Stefano Radaelli <[email protected]>

Enable TPM3 on the Symphony carrier board and add the pinctrl states for the PWM output and sleep configuration.

---
v1->v2:
-

 .../dts/freescale/imx93-var-som-symphony.dts  | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts +19 -0
index 37bae4913bcf..a49c8aebfead 100644
@@ -325,6 +325,13 @@ &lpuart7 {
 	status = "okay";
 };
 
+&tpm3 {
+	pinctrl-0 = <&pinctrl_tpm3>;
+	pinctrl-1 = <&pinctrl_tpm3_sleep>;
+	pinctrl-names = "default", "sleep";
+	status = "okay";
+};
+
 &usbotg1 {
 	dr_mode = "otg";
 	hnp-disable;
@@ -447,6 +454,18 @@ MX93_PAD_PDM_BIT_STREAM1__GPIO1_IO10            0x31e
 		>;
 	};
 
+	pinctrl_tpm3: tpm3grp {
+		fsl,pins = <
+			MX93_PAD_GPIO_IO24__TPM3_CH3			0x51e
+		>;
+	};
+
+	pinctrl_tpm3_sleep: tpm3sleepgrp {
+		fsl,pins = <
+			MX93_PAD_GPIO_IO24__GPIO2_IO24			0x51e
+		>;
+	};
+
 	pinctrl_uart1: uart1grp {
 		fsl,pins = <
 			MX93_PAD_UART1_RXD__LPUART1_RX			0x31e
Signature · 1 line
2.47.3