iio: adc: Add support for LTC2378 and similar ADCs

Quoted 7 lines

Documentation/devicetree/bindings/iio/adc/adi,ltc2378.yaml new file +7 -0

+allOf:
+  # Except for LTC2338, all designs require a voltage reference input
+  - if:
+      properties:
+        compatible:
+          not:
+            contains:

Documentation/devicetree/bindings/iio/adc/adi,ltc2378.yaml line 148

Quoted 10 lines

Documentation/devicetree/bindings/iio/adc/adi,ltc2378.yaml new file +10 -0

+              enum:
+                - adi,ltc2338-18
+    then:
+      required:
+        - ref-supply
+      properties:
+        refin-supply: false
+    else:
+      properties:
+        ref-supply: false

[Severity: Medium]
Could these constraints cause a validation regression for valid hardware configurations?

For example, if the LTC2378 uses an internal reference without an external

supply, forcing ref-supply to be mandatory (while forbidding refin-supply) might cause valid device trees to fail validation unless a dummy regulator is instantiated.

Similarly, does the LTC2338-18 support overdriving the internal reference buffer? If so, forbidding ref-supply for adi,ltc2338-18 could prevent accurate hardware descriptions when an external reference is applied.

Support for LTC2378-20 and similar analog-to-digital converters.

Signed-off-by Marcelo Schmitt <[email protected]>

Support for LTC2378-20 and similar analog-to-digital converters.

drivers/iio/adc/ltc2378.c new file +7 -0

+	fsleep(4);
+	ret = spi_sync_transfer(st->spi, &st->xfer, 1);
+	gpiod_set_value_cansleep(st->cnv_gpio, 0);
+
+	return ret;
+}
+

Support for LTC2378-20 and similar analog-to-digital converters.

Signed-off-by Marcelo Schmitt <[email protected]>

---
Change log v5 -> v6:
- Added comment to clarify CPU endianness is used when device native BE is not.
- Protected single sample read procedure with a mutex.
- Dropped mod_devicetable.h, include device-id/spi.h device-id/of.h instead.
- Used iwyu to add missing #includes and dropped superfluous ones.
- Used pahole to minimize memory holes in LTC2378 data structures.

drivers/iio/adc/ltc2378.c new file +5 -0

new file mode 100644
index 000000000000..c9f8b19e0298
 
+#define LTC2378_DIFF_CHANNEL(_sign, _real_bits, _storage_bits, _offload)	\
+{										\
+	.type = IIO_VOLTAGE,							\
+	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |				\
+			      BIT(IIO_CHAN_INFO_SCALE) |			\

drivers/iio/adc/ltc2378.c new file +4 -0

+	},									\
+}
 
+
+struct ltc2378_state {

drivers/iio/adc/ltc2378.c new file +5 -0

+		} data;
+		aligned_s64 timestamp;
+	} scan __aligned(IIO_DMA_MINALIGN);
+};
 
 
 
+static int ltc2378_refin_setup(struct device *dev, struct ltc2378_state *st)

drivers/iio/adc/ltc2378.c new file +4 -0

+		st->ref_uV = ret * 2;
+
+	return 0;
+}

Quoted 8 lines

drivers/iio/adc/ltc2378.c +8 -0

+	/*
+	 * Configure SPI offload PWM trigger.
+	 * The trigger should fire after tBUSYLH + tCONV + tDSDOBUSYL.
+	 * Minimum time needed: TBUSYLH (13ns) + TCONV (part-specific) + TDSDOBUSYL (5ns)
+	 *
+	 * Use the same period as CNV PWM to avoid timing issues.
+	 * Convert back from period to frequency for the SPI offload API.
+	 */

drivers/iio/adc/ltc2378.c static int ltc2378_read_raw(struct iio_dev *indio_dev, · line 460

Quoted 10 lines

drivers/iio/adc/ltc2378.c +10 -0

+	offload_period_ns = cnv_wf.period_length_ns;
+	config->periodic.frequency_hz = DIV_ROUND_UP(HZ_PER_GHZ, offload_period_ns);
+	min_read_offset = LTC2378_TBUSYLH_NS + st->info->tconv_ns + LTC2378_TDSDOBUSYL_NS;
+	offload_offset_ns = min_read_offset;
+	count = 100;
+	do {
+		config->periodic.offset_ns = offload_offset_ns;
+		ret = spi_offload_trigger_validate(st->offload_trigger, config);
+		if (ret)
+			return ret;

[Severity: High]
Does modifying config directly leave the device state out of sync if validation fails?

Here config aliases to &st->offload_trigger_config, and its frequency_hz and offset_ns fields are mutated. If spi_offload_trigger_validate() returns an error, the function returns without restoring the old configuration.

However, st->cnv_wf is only updated at the end of the function. If the buffer is later enabled, could this result in the PWM running with the old frequency while the SPI offload engine tries to use the new, rejected frequency?

drivers/iio/adc/ltc2378.c static int ltc2378_read_raw(struct iio_dev *indio_dev, · line 471

Quoted 11 lines

drivers/iio/adc/ltc2378.c +11 -0

+		offload_offset_ns += 10;
+	} while (count-- && config->periodic.offset_ns < min_read_offset);
+
+	/* Check the minimum CNV to SCLK delay is met */
+	if (config->periodic.offset_ns < min_read_offset)
+		return -EDOM;
+
+	/* Check the PWM periods remain the same */
+	offload_period_ns = div64_u64(HZ_PER_GHZ, config->periodic.frequency_hz);
+	if (cnv_wf.period_length_ns != offload_period_ns)
+		return -EDOM;

[Severity: Medium]
Could this strict equality check unintentionally reject valid sample frequencies due to integer math rounding?

If a requested frequency produces a period (cnv_wf.period_length_ns) that does not perfectly divide 1,000,000,000, DIV_ROUND_UP() might round the frequency up. Converting that frequency back to a period via div64_u64() would yield a slightly smaller period.

For example, 133,333 Hz yields a 7500 ns period. 10^9 / 7500 = 133333.33, which rounds up to 133334. Then 10^9 / 133334 = 7499 ns. Since 7500 != 7499, this check would fail and return -EDOM.

drivers/iio/adc/ltc2378.c static int ltc2378_read_raw(struct iio_dev *indio_dev, · line 477

Quoted 7 lines

drivers/iio/adc/ltc2378.c +6 -0

+
+	st->cnv_wf = cnv_wf;
+	st->cnv_Hz = DIV_ROUND_CLOSEST_ULL(HZ_PER_GHZ, cnv_wf.period_length_ns);
+
+	return 0;
+}

Make use of SPI transfer offloading to speed up data capture, enabling data acquisition at faster sample rates (up to 2 MSPS).

drivers/iio/adc/ltc2378.c +5 -0

+static int ltc2378_prepare_offload_message(struct device *dev,
+					   struct ltc2378_state *st)
+{
+	unsigned int resolution = st->info->offload_chan.scan_type.realbits;
+

drivers/iio/adc/ltc2378.c +27 -0

+
+static int ltc2378_offload_buffer_postenable(struct iio_dev *indio_dev)
+{
+	struct ltc2378_state *st = iio_priv(indio_dev);
+	int ret;
+
+	ret = pwm_set_waveform_might_sleep(st->cnv_trigger, &st->cnv_wf, true);
+	if (ret)
+		return ret;
+
+	ret = spi_offload_trigger_enable(st->offload, st->offload_trigger,
+					 &st->offload_trigger_config);
+	if (ret)
+		goto out_pwm_disable;
+
+	return 0;
+
+out_pwm_disable:
+	pwm_disable(st->cnv_trigger);
+	return ret;
+}
+
+static int ltc2378_offload_buffer_predisable(struct iio_dev *indio_dev)
+{
+	struct ltc2378_state *st = iio_priv(indio_dev);
+
+	spi_offload_trigger_disable(st->offload, st->offload_trigger);

drivers/iio/adc/ltc2378.c +24 -0

+static int ltc2378_spi_offload_setup(struct iio_dev *indio_dev,
+				     struct ltc2378_state *st)
+{
+	struct device *dev = &st->spi->dev;
+	struct dma_chan *rx_dma;
+
+	indio_dev->setup_ops = &ltc2378_offload_buffer_ops;
+
+	st->offload_trigger = devm_spi_offload_trigger_get(dev, st->offload,
+							   SPI_OFFLOAD_TRIGGER_PERIODIC);
+	if (IS_ERR(st->offload_trigger))
+		return dev_err_probe(dev, PTR_ERR(st->offload_trigger),
+				     "failed to get offload trigger\n");
+
+	st->offload_trigger_config.type = SPI_OFFLOAD_TRIGGER_PERIODIC;
+
+	rx_dma = devm_spi_offload_rx_stream_request_dma_chan(dev, st->offload);
+	if (IS_ERR(rx_dma))
+		return dev_err_probe(dev, PTR_ERR(rx_dma), "failed to get offload RX DMA\n");
+
+	return devm_iio_dmaengine_buffer_setup_with_handle(dev, indio_dev, rx_dma,
+							   IIO_BUFFER_DIRECTION_IN);
+}
+

drivers/iio/adc/ltc2378.c +33 -2

@@ -340,8 +672,53 @@ static int ltc2378_probe(struct spi_device *spi)
 		return dev_err_probe(dev, PTR_ERR(st->cnv_gpio),
 				     "failed to get CNV GPIO");
 
-	indio_dev->channels = &st->info->chan;
-	indio_dev->num_channels = 1;
+	st->offload = devm_spi_offload_get(dev, spi, &ltc2378_offload_config);
+	ret = PTR_ERR_OR_ZERO(st->offload);
+	/* Fall back to low speed usage when no SPI offload is available. */
+	if (ret == -ENODEV) {
+		indio_dev->info = &ltc2378_iio_info;
+		indio_dev->channels = &st->info->chan;
+		indio_dev->num_channels = 1;
+	} else if (ret) {
+		return dev_err_probe(dev, ret, "failed to get offload\n");
+	} else {
+		indio_dev->info = &ltc2378_offload_iio_info;
+		indio_dev->channels = &st->info->offload_chan;
+		indio_dev->num_channels = 1;
+		ret = ltc2378_spi_offload_setup(indio_dev, st);
+		if (ret)
+			return dev_err_probe(dev, ret,
+					     "failed to setup SPI offload\n");
+
+		ret = ltc2378_pwm_get(st);
+		if (ret)
+			return dev_err_probe(dev, ret, "failed to get PWM\n");
+
+		st->sample_freq_range[0] = 1; /* min */
+		st->sample_freq_range[1] = 1; /* step */
+		st->sample_freq_range[2] = st->info->max_sample_rate_Hz; /* max */
+
+		/*
+		 * Start with a slower sampling rate so there is some room for
+		 * adjusting the sample averaging and the sampling frequency
+		 * without hitting the maximum conversion rate.
+		 */
+		ret = ltc2378_update_conversion_rate(st, st->info->max_sample_rate_Hz >> 4);
+		if (ret)

drivers/iio/adc/ltc2378.c +5 -0

+		 * offload_chan specifications for single-shot reads.
+		 */
+		st->xfer.bits_per_word = st->info->offload_chan.scan_type.realbits;
+	}
 
 	st->xfer.rx_buf = &st->scan.data;
 	st->xfer.len = spi_bpw_to_bytes(indio_dev->channels[0].scan_type.realbits);

@@ -412,3 +789,4 @@ module_spi_driver(ltc2378_driver);
 MODULE_AUTHOR("Marcelo Schmitt <[email protected]>");
 MODULE_DESCRIPTION("Analog Devices LTC2378 ADC series driver");
 MODULE_LICENSE("GPL");
+MODULE_IMPORT_NS("IIO_DMAENGINE_BUFFER");

This patch series adds support for LTC2378 and similar low noise, low power, high speed, successive approximation register (SAR) ADCs. These ADCs are similar among each other, varying mainly on the amount of precision bits, maximum sample rate, and input configuration (either fully differential or pseudo-differential).

Patch 1 adds device tree documentation for LTC2378.

Patch 2 enables single-shot sample read with a GPIO connected to the LTC2378 CNV pin.

Patch 3 enables high-speed data captures with SPI offloading.
The setup is similar to AD4030, with a specialized PWM generator being used both for SPI offload triggering and conversion start signaling.

Patch 4 enables running buffered data captures without SPI offloading.