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IXP425: make cmd_go handle caches correctly Part 1/1

PATCH New Stefan Althoefer 3 participants 4 messages Dec 4, 2008 – Jan 4, 2009

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PATCH 1/1 IXP425: make cmd_go handle caches correctly Part 1/1

[PATCH] IXP425: make cmd_go handle caches correctly

This patch adds icache_invalidate() and dcache_flush() to cpu/ixp/cpu.c.

Also it adds do_go_exec() which is called from do_go(). This private implementation performs cache handling before jumping into the code.

Without this cache handling, you will jump into stale code if you download a program several times.

The patch is against "latest" u-boot git-repository

Please (still) be patient if style of submission or patches are offending.

----

cpu/ixp/cpu.c renamed from /cpu/ixp/cpu.c +32 -0
diff -uprN u-boot-orig//cpu/ixp/cpu.c u-boot/cpu/ixp/cpu.c
@@ -171,6 +207,22 @@ int icache_status (void)
 	return (i & 0x1000);
 }
 
+void icache_invalidate (void)
+{
+        register u32 i;
+
+        /* FIXME: Required to check if icache is enabled before we do this? */
+        
+        /* invalidate I-cache (i is ignored)*/
+	i = 0;
+        asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
+
+        /* cpwait */
+        asm ("mrc  p15,0,%0,c2,c0,0;\
+            mov  %0,%0;\
+            sub  pc,pc,#4" : : "r" (i) );
+}
+
 /* we will never enable dcache, because we have to setup MMU first */
 void dcache_enable (void)
 {
@@ -187,6 +239,11 @@ int dcache_status (void)
 	return 0;					/* always off */
 }
 
+void dcache_flush (void)
+{
+	return;
+}
+
 /* FIXME */
 /*
 void pci_init(void)
@@ -195,6 +252,17 @@ void pci_init(void)
 }
 */
 
+/* With IXP (and ARM generally) we need to handle caches to avoid
+   stale data. */
+unsigned long do_go_exec (ulong (*entry)(int, char *[]), int argc, char *argv[])
+{ 
+	dcache_flush();
+	icache_invalidate();
+
+        return entry (argc, argv);
+}
+
+
 #ifdef CONFIG_BOOTCOUNT_LIMIT
 
 void bootcount_store (ulong a)
#1 lore raw

PATCH 1/1 IXP425: make cmd_go handle caches correctly Part 1/1

Dear Stefan Althoefer,

Quoted 11 lines · In message <49384710.DwdG58IaB1mKOO9U%[email protected]> you wrote:

[PATCH] IXP425: make cmd_go handle caches correctly

This patch adds icache_invalidate() and dcache_flush() to cpu/ixp/cpu.c.

Also it adds do_go_exec() which is called from do_go(). This private implementation performs cache handling before jumping into the code.

Without this cache handling, you will jump into stale code if you download a program several times.

Coding style: please use TABs for indentation.

Quoted 4 lines

The patch is against "latest" u-boot git-repository

Please (still) be patient if style of submission or patches are offending.

And move such comments below th e"---" line, please.

Best regards,

Wolfgang Denk

Signature · 5 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
The first thing we do is kill all the lawyers.
(Shakespeare. II Henry VI, Act IV, scene ii)
#2 lore raw

PATCH 1/1 IXP425: make cmd_go handle caches correctly Part 1/1

IXP425: make cmd_go handle caches correctly

This patch adds icache_invalidate() and dcache_flush() to cpu/ixp/cpu.c.

Also it adds do_go_exec() which is called from do_go(). This private implementation performs cache handling before jumping into the code.

Without this cache handling, you will jump into stale code if you download a program several times.

---

Quoted 3 lines

Coding style: please use TABs for indentation.

Sorry for the spaces.

BTW: In function calls: Is the space between function name are opening bracket desired or not? Seems this is handled very inconsistent.

-- Stefan

 cpu/ixp/cpu.c |   32 ++++++++++++++++++++++++++++++++
 1 files changed, 32 insertions(+), 0 deletions(-)
cpu/ixp/cpu.c +32 -0
index 27872fb..9035d98 100644
@@ -171,6 +171,22 @@ int icache_status (void)
 	return (i & 0x1000);
 }
 
+void icache_invalidate (void)
+{
+	register u32 i;
+
+	/* FIXME: Required to check if icache is enabled before we do this? */
+
+	/* invalidate I-cache (i is ignored)*/
+	i = 0;
+	asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
+
+	/* cpwait */
+	asm ("mrc  p15,0,%0,c2,c0,0;\
+	    mov  %0,%0;\
+	    sub  pc,pc,#4" : : "r" (i) );
+}
+
 /* we will never enable dcache, because we have to setup MMU first */
 void dcache_enable (void)
 {
@@ -187,6 +203,11 @@ int dcache_status (void)
 	return 0;					/* always off */
 }
 
+void dcache_flush (void)
+{
+	return;
+}
+
 /* FIXME */
 /*
 void pci_init(void)
@@ -195,6 +216,17 @@ void pci_init(void)
 }
 */
 
+/* With IXP (and ARM generally) we need to handle caches to avoid
+   stale data. */
+unsigned long do_go_exec (ulong (*entry)(int, char *[]), int argc, char *argv[])
+{
+	dcache_flush ();
+	icache_invalidate ();
+
+	return entry (argc, argv);
+}
+
+
 #ifdef CONFIG_BOOTCOUNT_LIMIT
 
 void bootcount_store (ulong a)
Signature · 1 line
1.5.6
#3 lore raw

PATCH 1/1 IXP425: make cmd_go handle caches correctly Part 1/1

cpu/ixp/cpu.c int icache_status (void) · line 176

Quoted 12 lines
cpu/ixp/cpu.c +3 -0
index 27872fb..9035d98 100644
@@ -171,6 +171,22 @@ int icache_status (void)
 	return (i & 0x1000);
 }
 
+void icache_invalidate (void)
+{
+	register u32 i;

why do you need it?

Quoted 29 lines
cpu/ixp/cpu.c +18 -0
+
+	/* FIXME: Required to check if icache is enabled before we do this? */
+
+	/* invalidate I-cache (i is ignored)*/
+	i = 0;
+	asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
+
+	/* cpwait */
+	asm ("mrc  p15,0,%0,c2,c0,0;\
+	    mov  %0,%0;\
+	    sub  pc,pc,#4" : : "r" (i) );
+}
+
 /* we will never enable dcache, because we have to setup MMU first */
 void dcache_enable (void)
 {
@@ -187,6 +203,11 @@ int dcache_status (void)
 	return 0;					/* always off */
 }
 
+void dcache_flush (void)
+{
+	return;
+}
+
 /* FIXME */
 /*
 void pci_init(void)

cpu/ixp/cpu.c void pci_init(void) · line 218

Quoted 3 lines
cpu/ixp/cpu.c +0 -0
@@ -195,6 +216,17 @@ void pci_init(void)
 }
 */
 

general arm function need to be in the lib_arm

cpu/ixp/cpu.c void pci_init(void) · line 228

Quoted 10 lines
cpu/ixp/cpu.c +10 -0
+/* With IXP (and ARM generally) we need to handle caches to avoid
+   stale data. */
+unsigned long do_go_exec (ulong (*entry)(int, char *[]), int argc, char *argv[])
+{
+	dcache_flush ();
+	icache_invalidate ();
+
+	return entry (argc, argv);
+}
+

Best Regards,
J.