clk: lpc32xx: add clock support for NXP LPC32xx
Subsystems (5)
Vladimir Zapolskiy
maintainercover clk: lpc32xx: add clock support for NXP LPC32xx
This changeset adds common clock framework driver for NXP LPC32xx boards.
The changeset has dependencies on the recent updates to LPC32xx DTS:
http://permalink.gmane.org/gmane.linux.ports.arm.kernel/456304
The RFC version of CCF driver 9/11 can be found here:
http://www.spinics.net/lists/devicetree/msg100583.html
Changes from RFC to v1:
* added definitions of a missed IRDA clock,
* renamed compatible property from lpc32xx-scb to lpc32xx-clk
* switched to regmap interface instead of mmio, this is required to secure access to registers shared between pinmux, dma and clock driver, unfortunately this change has to pull some code snippets from common gate, divider and mux helpers rebased on regmap API,
* split clock definitions from the driver to be able to update dts files separately from CCF driver.
The driver is written from scratch, here are main functional differences with the legacy driver arch/arm/mach-lpc32xx/clock.c:
* serialized access to SCB registers,
* reworked routines to select PLL parameters,
* now the clock driver has detailed description of all clocks, the original driver misses several clock entries and most of fine grained clock controls, here every mux and divider are accounted,
* now clocks and clock hierarchies can be described in board DT file,
* sophisticated management of USB clocks, for example now USB device controller needs only one clock instead of USB PLL, USB OTG and USB device clocks,
* other benefits from a driver powered by CCF.
Patch 9/11 may produce false positives from checkpatch, the fix to checkpatch can be found in Andrew's tree.
Vladimir Zapolskiy (11):
dt-bindings: clock: add description of LPC32xx clock controller
dt-bindings: clock: add description of LPC32xx USB clock controller
dt-bindings: clock: add NXP LPC32xx clock list for consumers
arm: dts: lpc32xx: add device nodes for external oscillators
arm: dts: lpc32xx: add clock controller device node
arm: dts: lpc32xx: add clock properties to device nodes
arm: dts: lpc32xx: add USB clock controller
clk: lpc18xx: add NXP specific common clock framework selection
clk: lpc32xx: add common clock framework driver
arm: lpc32xx: switch to common clock framework
arm: dts: lpc32xx: remove clock frequency property from UART device
nodes
.../devicetree/bindings/clock/nxp,lpc3220-clk.txt | 30 + .../bindings/clock/nxp,lpc3220-usb-clk.txt | 22 + arch/arm/Kconfig | 4 +- arch/arm/boot/dts/lpc32xx.dtsi | 87 +- arch/arm/mach-lpc32xx/Makefile | 3 +- arch/arm/mach-lpc32xx/clock.c | 1284 ---------------- arch/arm/mach-lpc32xx/phy3250.c | 1 - arch/arm/mach-lpc32xx/serial.c | 3 - arch/arm/mach-lpc32xx/timer.c | 144 -- drivers/clk/Kconfig | 6 + drivers/clk/Makefile | 2 +- drivers/clk/nxp/Makefile | 1 + drivers/clk/nxp/clk-lpc32xx.c | 1562 ++++++++++++++++++++ include/dt-bindings/clock/lpc32xx-clock.h | 56 + 14 files changed, 1765 insertions(+), 1440 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/nxp,lpc3220-clk.txt create mode 100644 Documentation/devicetree/bindings/clock/nxp,lpc3220-usb-clk.txt delete mode 100644 arch/arm/mach-lpc32xx/clock.c delete mode 100644 arch/arm/mach-lpc32xx/timer.c create mode 100644 drivers/clk/nxp/clk-lpc32xx.c create mode 100644 include/dt-bindings/clock/lpc32xx-clock.h
Signature · 1 line
2.1.4
Vladimir Zapolskiy
maintainerPATCH 1/11 dt-bindings: clock: add description of LPC32xx clock controller
NXP LPC32xx SoC has a clocking and power control unit (CPC) as a part of system control block (SCB). CPC is supplied by two external oscillators and it manages core and most of peripheral clocks, the change adds description of DT bindings for clock controller found on LPC32xx SoC series.
--- .../devicetree/bindings/clock/nxp,lpc3220-clk.txt | 30 ++++++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/nxp,lpc3220-clk.txt
Documentation/devicetree/bindings/clock/nxp,lpc3220-clk.txt new file +30 -0
@@ -0,0 +1,30 @@ +NXP LPC32xx Clock Controller + +Required properties: +- compatible: should be "nxp,lpc3220-clk" +- reg: should contain clock controller registers location and length +- #clock-cells: must be 1, the cell holds id of a clock provided by the + clock controller +- clocks: phandles of external oscillators, the list must contain one + 32768 Hz oscillator and may have one optional high frequency oscillator +- clock-names: list of external oscillator clock names, must contain + "xtal_32k" and may have optional "xtal" + +Examples: + + /* System Control Block */ + scb { + compatible = "simple-bus"; + ranges = <0x0 0x040004000 0x00001000>; + #address-cells = <1>; + #size-cells = <1>; + + clk: clock-controller at 0 { + compatible = "nxp,lpc3220-clk"; + reg = <0x00 0x114>; + #clock-cells = <1>; + + clocks = <&xtal_32k>, <&xtal>; + clock-names = "xtal_32k", "xtal"; + }; + };
Signature · 1 line
2.1.4
PATCH 1/11 dt-bindings: clock: add description of LPC32xx clock controller
Quoted 18 lines · On Friday 20 November 2015 03:05:01 Vladimir Zapolskiy wrote:
NXP LPC32xx SoC has a clocking and power control unit (CPC) as a part of system control block (SCB). CPC is supplied by two external oscillators and it manages core and most of peripheral clocks, the change adds description of DT bindings for clock controller found on LPC32xx SoC series.
Signed-off-by Vladimir Zapolskiy <[email protected]>--- .../devicetree/bindings/clock/nxp,lpc3220-clk.txt | 30 ++++++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/nxp,lpc3220-clk.txtDocumentation/devicetree/bindings/clock/nxp,lpc3220-clk.txt new file +0
-0
Documentation/devicetree/bindings/clock/nxp,lpc3220-clk.txt line 4
Quoted 4 lines
Documentation/devicetree/bindings/clock/nxp,lpc3220-clk.txt new file +4
-0@@ -0,0 +1,30 @@ +NXP LPC32xx Clock Controller + +Required properties: +- compatible: should be "nxp,lpc3220-clk"
Please use a specific model number without 'xx' wildcards. If you have multiple chips that are mutually compatible, pick one as the base number and then list the others as more specific instances, like
compatible = "nxp,lpc3250-clk", "nxp,lpc3220-clk"; Arnd
Vladimir Zapolskiy
maintainerPATCH 1/11 dt-bindings: clock: add description of LPC32xx clock controller
Arnd,
Quoted 28 lines · Arnd Bergmann
Quoted 18 lines · On Friday 20 November 2015 03:05:01 Vladimir Zapolskiy wrote:
NXP LPC32xx SoC has a clocking and power control unit (CPC) as a part of system control block (SCB). CPC is supplied by two external oscillators and it manages core and most of peripheral clocks, the change adds description of DT bindings for clock controller found on LPC32xx SoC series.
Signed-off-by Vladimir Zapolskiy <[email protected]>--- .../devicetree/bindings/clock/nxp,lpc3220-clk.txt | 30 ++++++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/nxp,lpc3220-clk.txtDocumentation/devicetree/bindings/clock/nxp,lpc3220-clk.txt new file +0
-0Documentation/devicetree/bindings/clock/nxp,lpc3220-clk.txt line 4
Quoted 4 lines
Documentation/devicetree/bindings/clock/nxp,lpc3220-clk.txt new file +4
-0@@ -0,0 +1,30 @@ +NXP LPC32xx Clock Controller + +Required properties: +- compatible: should be "nxp,lpc3220-clk"Please use a specific model number without 'xx' wildcards. If you have multiple chips that are mutually compatible, pick one as the base number and then list the others as more specific instances, like
Quoted 1 line
compatible = "nxp,lpc3250-clk", "nxp,lpc3220-clk";
Do you ask me to change a title? You may see that compatible property does not contain any wildcards?
--
Vladimir
PATCH 1/11 dt-bindings: clock: add description of LPC32xx clock controller
Quoted 10 lines · On Friday 20 November 2015 20:01:00 Vladimir Zapolskiy wrote:
Quoted 6 lines
Please use a specific model number without 'xx' wildcards. If you have multiple chips that are mutually compatible, pick one as the base number and then list the others as more specific instances, like
compatible = "nxp,lpc3250-clk", "nxp,lpc3220-clk";Do you ask me to change a title? You may see that compatible property does not contain any wildcards?
Nevermind, I saw so many 'xx's that I didn't notice you got the important one right.
Arnd
Vladimir Zapolskiy
maintainerPATCH 2/11 dt-bindings: clock: add description of LPC32xx USB clock controller
In reply to Vladimir ZapolskiyNXP LPC32xx USB controller has a subdevice, which controls USB AHB slave, USB OTG, USB OHCI, USB device and I2C controller to USB phy clocks, this change adds description of the clock controller, for more details reference LPC32xx User's Manual, namely USB control, OTG clock control and OTG clock status registers.
--- .../bindings/clock/nxp,lpc3220-usb-clk.txt | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/nxp,lpc3220-usb-clk.txt
Documentation/devicetree/bindings/clock/nxp,lpc3220-usb-clk.txt new file +22 -0
@@ -0,0 +1,22 @@ +NXP LPC32xx USB Clock Controller + +Required properties: +- compatible: should be "nxp,lpc3220-usb-clk" +- reg: should contain clock controller registers location and length +- #clock-cells: must be 1, the cell holds id of a clock provided by the + USB clock controller + +Examples: + + usb { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0x31020000 0x00001000>; + + usbclk: clock-controller at F00 { + compatible = "nxp,lpc3220-usb-clk"; + reg = <0xF00 0x100>; + #clock-cells = <1>; + }; + };
Signature · 1 line
2.1.4
Rob Herring
maintainerPATCH 2/11 dt-bindings: clock: add description of LPC32xx USB clock controller
Quoted 19 lines · Vladimir Zapolskiy
NXP LPC32xx USB controller has a subdevice, which controls USB AHB slave, USB OTG, USB OHCI, USB device and I2C controller to USB phy clocks, this change adds description of the clock controller, for more details reference LPC32xx User's Manual, namely USB control, OTG clock control and OTG clock status registers.
Signed-off-by Vladimir Zapolskiy <[email protected]>--- .../bindings/clock/nxp,lpc3220-usb-clk.txt | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/nxp,lpc3220-usb-clk.txtDocumentation/devicetree/bindings/clock/nxp,lpc3220-usb-clk.txt new file +1
-0@@ -0,0 +1,22 @@ +NXP LPC32xx USB Clock Controller
Documentation/devicetree/bindings/clock/nxp,lpc3220-usb-clk.txt line 11
Quoted 10 lines
Documentation/devicetree/bindings/clock/nxp,lpc3220-usb-clk.txt new file +10
-0+ +Required properties: +- compatible: should be "nxp,lpc3220-usb-clk" +- reg: should contain clock controller registers location and length +- #clock-cells: must be 1, the cell holds id of a clock provided by the + USB clock controller + +Examples: + + usb {
I don't understand the full structure of USB blocks. Can you make the example complete. All the blocks are a child of this node?
Documentation/devicetree/bindings/clock/nxp,lpc3220-usb-clk.txt line 17
Quoted 6 lines
Documentation/devicetree/bindings/clock/nxp,lpc3220-usb-clk.txt new file +6
-0+ #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0x31020000 0x00001000>; + + usbclk: clock-controller at F00 {
lower case ^
Documentation/devicetree/bindings/clock/nxp,lpc3220-usb-clk.txt line 19
Quoted 2 lines
Documentation/devicetree/bindings/clock/nxp,lpc3220-usb-clk.txt new file +2
-0+ compatible = "nxp,lpc3220-usb-clk"; + reg = <0xF00 0x100>;
lower case
Quoted 6 lines
Documentation/devicetree/bindings/clock/nxp,lpc3220-usb-clk.txt new file +3
-0+ #clock-cells = <1>; + }; + };Signature · 1 line
2.1.4
Vladimir Zapolskiy
maintainerPATCH 2/11 dt-bindings: clock: add description of LPC32xx USB clock controller
Quoted 25 lines · Rob Herring
Quoted 24 lines · Vladimir Zapolskiy
NXP LPC32xx USB controller has a subdevice, which controls USB AHB slave, USB OTG, USB OHCI, USB device and I2C controller to USB phy clocks, this change adds description of the clock controller, for more details reference LPC32xx User's Manual, namely USB control, OTG clock control and OTG clock status registers.
Signed-off-by Vladimir Zapolskiy <[email protected]>--- .../bindings/clock/nxp,lpc3220-usb-clk.txt | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/nxp,lpc3220-usb-clk.txtDocumentation/devicetree/bindings/clock/nxp,lpc3220-usb-clk.txt new file +6
-0@@ -0,0 +1,22 @@ +NXP LPC32xx USB Clock Controller + +Required properties: +- compatible: should be "nxp,lpc3220-usb-clk" +- reg: should contain clock controller registers location and length +- #clock-cells: must be 1, the cell holds id of a clock provided by the
Quoted 8 lines
Documentation/devicetree/bindings/clock/nxp,lpc3220-usb-clk.txt line 11
Quoted 5 lines
Documentation/devicetree/bindings/clock/nxp,lpc3220-usb-clk.txt new file +5
-0+ USB clock controller + +Examples: + + usb {I don't understand the full structure of USB blocks. Can you make the example complete. All the blocks are a child of this node?
Yes, all the blocks are children of this node.
USB controller contains 5 subdevices, interestingly one of these subdevices, I2C controller, is the same as a general purpose I2C controller device.
Please find some description here:
http://www.spinics.net/lists/devicetree/msg98538.html
Quoted 8 lines
Documentation/devicetree/bindings/clock/nxp,lpc3220-usb-clk.txt line 17
Quoted 6 lines
Documentation/devicetree/bindings/clock/nxp,lpc3220-usb-clk.txt new file +6
-0+ #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0x31020000 0x00001000>; + + usbclk: clock-controller at F00 {lower case ^
Quoted 4 lines
Documentation/devicetree/bindings/clock/nxp,lpc3220-usb-clk.txt line 19
Quoted 2 lines
Documentation/devicetree/bindings/clock/nxp,lpc3220-usb-clk.txt new file +2
-0+ compatible = "nxp,lpc3220-usb-clk"; + reg = <0xF00 0x100>;lower case
Ok, thanks for pointing it out.
Quoted 6 lines
Quoted 6 lines
Documentation/devicetree/bindings/clock/nxp,lpc3220-usb-clk.txt new file +3
-0+ #clock-cells = <1>; + }; + };Signature · 1 line
2.1.4
--
Vladimir
Vladimir Zapolskiy
maintainerPATCH 3/11 dt-bindings: clock: add NXP LPC32xx clock list for consumers
In reply to Vladimir ZapolskiyThe change adds a list of NXP LPC32xx clocks, which can be requested by clock consumers.
--- include/dt-bindings/clock/lpc32xx-clock.h | 56 +++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) create mode 100644 include/dt-bindings/clock/lpc32xx-clock.h
include/dt-bindings/clock/lpc32xx-clock.h new file +56 -0
@@ -0,0 +1,56 @@ +/* +* Copyright (c) 2015 Vladimir Zapolskiy <[email protected]> +* +* This code is released using a dual license strategy: BSD/GPL +* You can choose the licence that better fits your requirements. +* +* Released under the terms of 3-clause BSD License +* Released under the terms of GNU General Public License Version 2.0 +* +*/ + +#ifndef __DT_BINDINGS_LPC32XX_CLOCK_H +#define __DT_BINDINGS_LPC32XX_CLOCK_H + +/* LPC32XX System Control Block clocks */ +#define LPC32XX_CLK_RTC 0 +#define LPC32XX_CLK_DMA 1 +#define LPC32XX_CLK_MLC 2 +#define LPC32XX_CLK_SLC 3 +#define LPC32XX_CLK_LCD 4 +#define LPC32XX_CLK_MAC 5 +#define LPC32XX_CLK_SD 6 +#define LPC32XX_CLK_DDRAM 7 +#define LPC32XX_CLK_SSP0 8 +#define LPC32XX_CLK_SSP1 9 +#define LPC32XX_CLK_UART3 10 +#define LPC32XX_CLK_UART4 11 +#define LPC32XX_CLK_UART5 12 +#define LPC32XX_CLK_UART6 13 +#define LPC32XX_CLK_IRDA 14 +#define LPC32XX_CLK_I2C1 15 +#define LPC32XX_CLK_I2C2 16 +#define LPC32XX_CLK_TIMER0 17 +#define LPC32XX_CLK_TIMER1 18 +#define LPC32XX_CLK_TIMER2 19 +#define LPC32XX_CLK_TIMER3 20 +#define LPC32XX_CLK_TIMER4 21 +#define LPC32XX_CLK_TIMER5 22 +#define LPC32XX_CLK_WDOG 23 +#define LPC32XX_CLK_I2S0 24 +#define LPC32XX_CLK_I2S1 25 +#define LPC32XX_CLK_SPI1 26 +#define LPC32XX_CLK_SPI2 27 +#define LPC32XX_CLK_MCPWM 28 +#define LPC32XX_CLK_HSTIMER 29 +#define LPC32XX_CLK_KEY 30 +#define LPC32XX_CLK_PWM1 31 +#define LPC32XX_CLK_PWM2 32 +#define LPC32XX_CLK_ADC 33 + +/* LPC32XX USB clocks */ +#define LPC32XX_USB_CLK_I2C 0 +#define LPC32XX_USB_CLK_DEVICE 1 +#define LPC32XX_USB_CLK_HOST 2 + +#endif /* __DT_BINDINGS_LPC32XX_CLOCK_H */
Signature · 1 line
2.1.4
PATCH 3/11 dt-bindings: clock: add NXP LPC32xx clock list for consumers
Quoted 9 lines · On Friday 20 November 2015 03:05:03 Vladimir Zapolskiy wrote:
include/dt-bindings/clock/lpc32xx-clock.h new file +8
-0+ +/* LPC32XX System Control Block clocks */ +#define LPC32XX_CLK_RTC 0 +#define LPC32XX_CLK_DMA 1 +#define LPC32XX_CLK_MLC 2 +#define LPC32XX_CLK_SLC 3 +#define LPC32XX_CLK_LCD 4 +#define LPC32XX_CLK_MAC 5
include/dt-bindings/clock/lpc32xx-clock.h line 31
Quoted 10 lines
include/dt-bindings/clock/lpc32xx-clock.h new file +10
-0+#define LPC32XX_CLK_SD 6 +#define LPC32XX_CLK_DDRAM 7 +#define LPC32XX_CLK_SSP0 8 +#define LPC32XX_CLK_SSP1 9 +#define LPC32XX_CLK_UART3 10 +#define LPC32XX_CLK_UART4 11 +#define LPC32XX_CLK_UART5 12 +#define LPC32XX_CLK_UART6 13 +#define LPC32XX_CLK_IRDA 14 +#define LPC32XX_CLK_I2C1 15
Any chance we can avoid the include file? This is going to make it really hard to merge everything in one merge window with the dependencies between the driver, the bindings and the platform code.
If there is a way to describe the clocks based on numbers from the data sheet instead of making up your own, that makes life much easier for us.
Arnd
Vladimir Zapolskiy
maintainerPATCH 3/11 dt-bindings: clock: add NXP LPC32xx clock list for consumers
Quoted 16 lines · Arnd Bergmann
Quoted 15 lines · On Friday 20 November 2015 03:05:03 Vladimir Zapolskiy wrote:
include/dt-bindings/clock/lpc32xx-clock.h new file +15
-0+ +/* LPC32XX System Control Block clocks */ +#define LPC32XX_CLK_RTC 0 +#define LPC32XX_CLK_DMA 1 +#define LPC32XX_CLK_MLC 2 +#define LPC32XX_CLK_SLC 3 +#define LPC32XX_CLK_LCD 4 +#define LPC32XX_CLK_MAC 5 +#define LPC32XX_CLK_SD 6 +#define LPC32XX_CLK_DDRAM 7 +#define LPC32XX_CLK_SSP0 8 +#define LPC32XX_CLK_SSP1 9 +#define LPC32XX_CLK_UART3 10 +#define LPC32XX_CLK_UART4 11 +#define LPC32XX_CLK_UART5 12
Quoted 8 lines
include/dt-bindings/clock/lpc32xx-clock.h line 31
Quoted 4 lines
include/dt-bindings/clock/lpc32xx-clock.h new file +3
-0+#define LPC32XX_CLK_UART6 13 +#define LPC32XX_CLK_IRDA 14 +#define LPC32XX_CLK_I2C1 15Any chance we can avoid the include file? This is going to make it really hard to merge everything in one merge window with the dependencies between the driver, the bindings and the platform code.
I see only one option to avoid this commit, namely squash it with the CCF driver and merge it before making changes in DTS.
However I suppose ARM trees won't be synced on clk tree, so probably it won't simplify maintainer's work.
Quoted 3 lines
If there is a way to describe the clocks based on numbers from the data sheet instead of making up your own, that makes life much easier for us.
There are no any clock numbers in the datasheet, unfortunately.
--
Vladimir
PATCH 3/11 dt-bindings: clock: add NXP LPC32xx clock list for consumers
Quoted 26 lines · On Friday 20 November 2015 19:58:06 Vladimir Zapolskiy wrote:
Quoted 16 lines · Arnd Bergmann
Quoted 15 lines · On Friday 20 November 2015 03:05:03 Vladimir Zapolskiy wrote:
include/dt-bindings/clock/lpc32xx-clock.h new file +15
-0+ +/* LPC32XX System Control Block clocks */ +#define LPC32XX_CLK_RTC 0 +#define LPC32XX_CLK_DMA 1 +#define LPC32XX_CLK_MLC 2 +#define LPC32XX_CLK_SLC 3 +#define LPC32XX_CLK_LCD 4 +#define LPC32XX_CLK_MAC 5 +#define LPC32XX_CLK_SD 6 +#define LPC32XX_CLK_DDRAM 7 +#define LPC32XX_CLK_SSP0 8 +#define LPC32XX_CLK_SSP1 9 +#define LPC32XX_CLK_UART3 10 +#define LPC32XX_CLK_UART4 11 +#define LPC32XX_CLK_UART5 12Quoted 8 lines
include/dt-bindings/clock/lpc32xx-clock.h line 31
Quoted 4 lines
include/dt-bindings/clock/lpc32xx-clock.h new file +3
-0+#define LPC32XX_CLK_UART6 13 +#define LPC32XX_CLK_IRDA 14 +#define LPC32XX_CLK_I2C1 15Any chance we can avoid the include file? This is going to make it really hard to merge everything in one merge window with the dependencies between the driver, the bindings and the platform code.
Quoted 5 lines
I see only one option to avoid this commit, namely squash it with the CCF driver and merge it before making changes in DTS.
However I suppose ARM trees won't be synced on clk tree, so probably it won't simplify maintainer's work.
I think the best way for this would then be to have one git branch that contains the binding header, and base the other patches on top of that branch, for both the changes going into the clk git and arm-soc.
That way, both have the commit we need, but we don't get duplicate commits when they are both merged into mainline.
Quoted 5 lines
Quoted 3 lines
If there is a way to describe the clocks based on numbers from the data sheet instead of making up your own, that makes life much easier for us.
There are no any clock numbers in the datasheet, unfortunately.
I was thinking that maybe there would be a logical numbering based on the register layout, e.g. a tuple of register index and bit position, but it seems that the mmio area is too irregular to make that easy.
Arnd
Vladimir Zapolskiy
maintainerPATCH 3/11 dt-bindings: clock: add NXP LPC32xx clock list for consumers
Hi Arnd,
Quoted 33 lines · Arnd Bergmann
Quoted 26 lines · On Friday 20 November 2015 19:58:06 Vladimir Zapolskiy wrote:
Quoted 16 lines · Arnd Bergmann
Quoted 15 lines · On Friday 20 November 2015 03:05:03 Vladimir Zapolskiy wrote:
include/dt-bindings/clock/lpc32xx-clock.h new file +15
-0+ +/* LPC32XX System Control Block clocks */ +#define LPC32XX_CLK_RTC 0 +#define LPC32XX_CLK_DMA 1 +#define LPC32XX_CLK_MLC 2 +#define LPC32XX_CLK_SLC 3 +#define LPC32XX_CLK_LCD 4 +#define LPC32XX_CLK_MAC 5 +#define LPC32XX_CLK_SD 6 +#define LPC32XX_CLK_DDRAM 7 +#define LPC32XX_CLK_SSP0 8 +#define LPC32XX_CLK_SSP1 9 +#define LPC32XX_CLK_UART3 10 +#define LPC32XX_CLK_UART4 11 +#define LPC32XX_CLK_UART5 12Quoted 8 lines
include/dt-bindings/clock/lpc32xx-clock.h line 31
Quoted 4 lines
include/dt-bindings/clock/lpc32xx-clock.h new file +3
-0+#define LPC32XX_CLK_UART6 13 +#define LPC32XX_CLK_IRDA 14 +#define LPC32XX_CLK_I2C1 15Any chance we can avoid the include file? This is going to make it really hard to merge everything in one merge window with the dependencies between the driver, the bindings and the platform code.
Quoted 5 lines
I see only one option to avoid this commit, namely squash it with the CCF driver and merge it before making changes in DTS.
However I suppose ARM trees won't be synced on clk tree, so probably it won't simplify maintainer's work.
Quoted 6 lines
I think the best way for this would then be to have one git branch that contains the binding header, and base the other patches on top of that branch, for both the changes going into the clk git and arm-soc.
That way, both have the commit we need, but we don't get duplicate commits when they are both merged into mainline.
I isolated the binding header, because in my opinion it may be reviewed (and hopefully accepted unchanged) separately from the CCF driver. If I am not mistaken, merging of two branches with an identical commit is seamless.
It is hard to predict, when the CCF driver gets into mainline, but the presence of the binding header in arm-soc tree will allow to avoid lots of conflicts and/or code rebases concerning lpc32xx.dtsi file.
Quoted 9 lines
Quoted 5 lines
Quoted 3 lines
If there is a way to describe the clocks based on numbers from the data sheet instead of making up your own, that makes life much easier for us.
There are no any clock numbers in the datasheet, unfortunately.
I was thinking that maybe there would be a logical numbering based on the register layout, e.g. a tuple of register index and bit position, but it seems that the mmio area is too irregular to make that easy.
Absolutely correct. Only if we consider registers, the clock controller registers are scattered in System Control Block, which also contains 3 wakeup controllers, partially pinmux and DMA settings, "software interrupt" controller, fine tuned configurations of ARM core debugging mechanisms and so on.
--
With best wishes,
Vladimir
Vladimir Zapolskiy
maintainerPATCH 4/11 arm: dts: lpc32xx: add device nodes for external oscillators
In reply to Vladimir ZapolskiyNXP LPC32xx SoC has two external oscillators - one is mandatory and always on 32768 Hz oscillator and one optional 10-20MHz oscillator, which is practically always present on LPC32xx boards, because its presence is needed to supply USB controller clock and by default it supplies ARM and most of the peripheral clocks, LPC32xx User's Manual references it as a main oscillator.
The change adds device nodes for both oscillators, frequency of the main oscillator is selected to be 13MHz by default, this variant is found on all LPC32xx reference boards.
The device nodes for external oscillators are needed to describe input clocks of LPC32xx clock controller.
--- arch/arm/boot/dts/lpc32xx.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
arch/arm/boot/dts/lpc32xx.dtsi +16 -0
@@ -28,6 +28,22 @@ }; }; + clocks { + xtal_32k: xtal_32k { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-output-names = "xtal_32k"; + }; + + xtal: xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <13000000>; + clock-output-names = "xtal"; + }; + }; + ahb { #address-cells = <1>; #size-cells = <1>;
Signature · 1 line
2.1.4
Vladimir Zapolskiy
maintainerPATCH 5/11 arm: dts: lpc32xx: add clock controller device node
In reply to Vladimir ZapolskiyNXP LPC32xx SoC has a clocking and power control unit (CPC) as a part of system control block (SCB). CPC is supplied by two external oscillators and it manages core and most of peripheral clocks, the change adds SCB and CPC descriptions to shared LPC32xx dtsi file.
--- arch/arm/boot/dts/lpc32xx.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)
arch/arm/boot/dts/lpc32xx.dtsi +17 -0
@@ -247,6 +247,23 @@ compatible = "simple-bus"; ranges = <0x20000000 0x20000000 0x30000000>; + /* System Control Block */ + scb { + compatible = "simple-bus"; + ranges = <0x0 0x040004000 0x00001000>; + #address-cells = <1>; + #size-cells = <1>; + + clk: clock-controller at 0 { + compatible = "nxp,lpc3220-clk"; + reg = <0x00 0x114>; + #clock-cells = <1>; + + clocks = <&xtal_32k>, <&xtal>; + clock-names = "xtal_32k", "xtal"; + }; + }; + /* * MIC Interrupt controller includes: * MIC @40008000
Signature · 1 line
2.1.4
Vladimir Zapolskiy
maintainerPATCH 6/11 arm: dts: lpc32xx: add clock properties to device nodes
In reply to Vladimir ZapolskiyThe change adds clock properties to all described peripheral devices, clock ids are taken from dt-bindings/clock/lpc32xx-clock.h
Some existing drivers expect to get clock names, in those cases clock-names are added as well.
--- arch/arm/boot/dts/lpc32xx.dtsi | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+)
arch/arm/boot/dts/lpc32xx.dtsi +41 -0
@@ -13,6 +13,8 @@ #include "skeleton.dtsi" +#include <dt-bindings/clock/lpc32xx-clock.h> + / { compatible = "nxp,lpc3220"; interrupt-parent = <&mic>;
@@ -57,6 +59,7 @@ slc: flash at 20020000 { compatible = "nxp,lpc3220-slc"; reg = <0x20020000 0x1000>; + clocks = <&clk LPC32XX_CLK_SLC>; status = "disabled"; };
@@ -64,6 +67,7 @@ compatible = "nxp,lpc3220-mlc"; reg = <0x200a8000 0x11000>; interrupts = <11 0>; + clocks = <&clk LPC32XX_CLK_MLC>; status = "disabled"; };
@@ -71,6 +75,8 @@ compatible = "arm,pl080", "arm,primecell"; reg = <0x31000000 0x1000>; interrupts = <0x1c 0>; + clocks = <&clk LPC32XX_CLK_DMA>; + clock-names = "apb_pclk"; }; usb {
@@ -110,6 +116,8 @@ compatible = "arm,pl110", "arm,primecell"; reg = <0x31040000 0x1000>; interrupts = <0x0e 0>; + clocks = <&clk LPC32XX_CLK_LCD>; + clock-names = "apb_pclk"; status = "disabled"; };
@@ -117,11 +125,14 @@ compatible = "nxp,lpc-eth"; reg = <0x31060000 0x1000>; interrupts = <0x1d 0>; + clocks = <&clk LPC32XX_CLK_MAC>; }; emc: memory-controller at 31080000 { compatible = "arm,pl175", "arm,primecell"; reg = <0x31080000 0x1000>; + clocks = <&clk LPC32XX_CLK_DDRAM>, <&clk LPC32XX_CLK_DDRAM>; + clock-names = "mpmcclk", "apb_pclk"; #address-cells = <1>; #size-cells = <1>;
@@ -142,6 +153,8 @@ compatible = "arm,pl022", "arm,primecell"; reg = <0x20084000 0x1000>; interrupts = <0x14 0>; + clocks = <&clk LPC32XX_CLK_SSP0>; + clock-names = "apb_pclk"; }; spi1: spi at 20088000 {
@@ -153,6 +166,8 @@ compatible = "arm,pl022", "arm,primecell"; reg = <0x2008c000 0x1000>; interrupts = <0x15 0>; + clocks = <&clk LPC32XX_CLK_SSP1>; + clock-names = "apb_pclk"; }; spi2: spi at 20090000 {
@@ -169,6 +184,8 @@ compatible = "arm,pl18x", "arm,primecell"; reg = <0x20098000 0x1000>; interrupts = <0x0f 0>, <0x0d 0>; + clocks = <&clk LPC32XX_CLK_SD>; + clock-names = "apb_pclk"; status = "disabled"; };
@@ -185,6 +202,7 @@ interrupts = <9 0>; clock-frequency = <13000000>; reg-shift = <2>; + clocks = <&clk LPC32XX_CLK_UART5>; status = "disabled"; };
@@ -194,6 +212,7 @@ interrupts = <7 0>; clock-frequency = <13000000>; reg-shift = <2>; + clocks = <&clk LPC32XX_CLK_UART3>; status = "disabled"; };
@@ -203,6 +222,7 @@ interrupts = <8 0>; clock-frequency = <13000000>; reg-shift = <2>; + clocks = <&clk LPC32XX_CLK_UART4>; status = "disabled"; };
@@ -212,6 +232,7 @@ interrupts = <10 0>; clock-frequency = <13000000>; reg-shift = <2>; + clocks = <&clk LPC32XX_CLK_UART6>; status = "disabled"; };
@@ -222,6 +243,7 @@ #address-cells = <1>; #size-cells = <0>; pnx,timeout = <0x64>; + clocks = <&clk LPC32XX_CLK_I2C1>; }; i2c2: i2c at 400A8000 {
@@ -231,6 +253,7 @@ #address-cells = <1>; #size-cells = <0>; pnx,timeout = <0x64>; + clocks = <&clk LPC32XX_CLK_I2C2>; }; mpwm: mpwm at 400E8000 {
@@ -302,6 +325,7 @@ compatible = "nxp,lpc3220-rtc"; reg = <0x40024000 0x1000>; interrupts = <0x34 0>; + clocks = <&clk LPC32XX_CLK_RTC>; }; gpio: gpio at 40028000 {
@@ -315,6 +339,8 @@ compatible = "nxp,lpc3220-timer"; reg = <0x4002C000 0x1000>; interrupts = <0x3 0>; + clocks = <&clk LPC32XX_CLK_TIMER4>; + clock-names = "timerclk"; status = "disabled"; };
@@ -322,17 +348,22 @@ compatible = "nxp,lpc3220-timer"; reg = <0x40030000 0x1000>; interrupts = <0x4 0>; + clocks = <&clk LPC32XX_CLK_TIMER5>; + clock-names = "timerclk"; status = "disabled"; }; watchdog: watchdog at 4003C000 { compatible = "nxp,pnx4008-wdt"; reg = <0x4003C000 0x1000>; + clocks = <&clk LPC32XX_CLK_WDOG>; }; timer0: timer at 40044000 { compatible = "nxp,lpc3220-timer"; reg = <0x40044000 0x1000>; + clocks = <&clk LPC32XX_CLK_TIMER0>; + clock-names = "timerclk"; interrupts = <0x10 0>; };
@@ -347,6 +378,7 @@ compatible = "nxp,lpc3220-adc"; reg = <0x40048000 0x1000>; interrupts = <0x27 0>; + clocks = <&clk LPC32XX_CLK_ADC>; status = "disabled"; };
@@ -354,6 +386,7 @@ compatible = "nxp,lpc3220-tsc"; reg = <0x40048000 0x1000>; interrupts = <0x27 0>; + clocks = <&clk LPC32XX_CLK_ADC>; status = "disabled"; };
@@ -361,6 +394,8 @@ compatible = "nxp,lpc3220-timer"; reg = <0x4004C000 0x1000>; interrupts = <0x11 0>; + clocks = <&clk LPC32XX_CLK_TIMER1>; + clock-names = "timerclk"; }; key: key at 40050000 {
@@ -374,18 +409,22 @@ compatible = "nxp,lpc3220-timer"; reg = <0x40058000 0x1000>; interrupts = <0x12 0>; + clocks = <&clk LPC32XX_CLK_TIMER2>; + clock-names = "timerclk"; status = "disabled"; }; pwm1: pwm at 4005C000 { compatible = "nxp,lpc3220-pwm"; reg = <0x4005C000 0x4>; + clocks = <&clk LPC32XX_CLK_PWM1>; status = "disabled"; }; pwm2: pwm at 4005C004 { compatible = "nxp,lpc3220-pwm"; reg = <0x4005C004 0x4>; + clocks = <&clk LPC32XX_CLK_PWM2>; status = "disabled"; };
@@ -393,6 +432,8 @@ compatible = "nxp,lpc3220-timer"; reg = <0x40060000 0x1000>; interrupts = <0x13 0>; + clocks = <&clk LPC32XX_CLK_TIMER3>; + clock-names = "timerclk"; status = "disabled"; }; };
Signature · 1 line
2.1.4
Vladimir Zapolskiy
maintainerPATCH 7/11 arm: dts: lpc32xx: add USB clock controller
In reply to Vladimir ZapolskiyThe change adds device node of LPC32xx USB clock controller and adds clock properties to USB OHCI, USB device and I2C controller to USB phy device nodes.
--- arch/arm/boot/dts/lpc32xx.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)
arch/arm/boot/dts/lpc32xx.dtsi +9 -0
@@ -92,6 +92,7 @@ compatible = "nxp,ohci-nxp", "usb-ohci"; reg = <0x0 0x300>; interrupts = <0x3b 0>; + clocks = <&usbclk LPC32XX_USB_CLK_HOST>; status = "disabled"; };
@@ -99,6 +100,7 @@ compatible = "nxp,lpc3220-udc"; reg = <0x0 0x300>; interrupts = <0x3d 0>, <0x3e 0>, <0x3c 0>, <0x3a 0>; + clocks = <&usbclk LPC32XX_USB_CLK_DEVICE>; status = "disabled"; };
@@ -106,10 +108,17 @@ compatible = "nxp,pnx-i2c"; reg = <0x300 0x100>; interrupts = <0x3f 0>; + clocks = <&usbclk LPC32XX_USB_CLK_I2C>; #address-cells = <1>; #size-cells = <0>; pnx,timeout = <0x64>; }; + + usbclk: clock-controller at F00 { + compatible = "nxp,lpc3220-usb-clk"; + reg = <0xF00 0x100>; + #clock-cells = <1>; + }; }; clcd: clcd at 31040000 {
Signature · 1 line
2.1.4
Vladimir Zapolskiy
maintainerPATCH 8/11 clk: lpc18xx: add NXP specific common clock framework selection
In reply to Vladimir ZapolskiyThe change adds COMMON_CLK_NXP configuration symbol and enables it for NXP LPC18XX architecture, this is needed to reuse drivers/clk/nxp folder for NXP common clock framework drivers other than LPC18XX one.
--- arch/arm/Kconfig | 1 + drivers/clk/Kconfig | 5 +++++ drivers/clk/Makefile | 2 +- 3 files changed, 7 insertions(+), 1 deletion(-)
arch/arm/Kconfig +1 -0
@@ -952,6 +952,7 @@ config ARCH_LPC18XX select ARCH_HAS_RESET_CONTROLLER select ARM_AMBA select CLKSRC_LPC32XX + select COMMON_CLK select PINCTRL help Support for NXP's LPC18xx Cortex-M3 and LPC43xx Cortex-M4
drivers/clk/Kconfig +5 -0
@@ -175,6 +175,11 @@ config COMMON_CLK_PWM Adapter driver so that any PWM output can be (mis)used as clock signal at 50% duty cycle. +config COMMON_CLK_NXP + def_bool COMMON_CLK && ARCH_LPC18XX + ---help--- + Support for clock providers on NXP platforms. + config COMMON_CLK_PXA def_bool COMMON_CLK && ARCH_PXA ---help---
drivers/clk/Makefile +1 -1
@@ -62,8 +62,8 @@ endif obj-$(CONFIG_PLAT_ORION) += mvebu/ obj-$(CONFIG_ARCH_MESON) += meson/ obj-$(CONFIG_ARCH_MXS) += mxs/ -obj-$(CONFIG_ARCH_LPC18XX) += nxp/ obj-$(CONFIG_MACH_PISTACHIO) += pistachio/ +obj-$(CONFIG_COMMON_CLK_NXP) += nxp/ obj-$(CONFIG_COMMON_CLK_PXA) += pxa/ obj-$(CONFIG_COMMON_CLK_QCOM) += qcom/ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
Signature · 1 line
2.1.4
PATCH 8/11 clk: lpc18xx: add NXP specific common clock framework selection
Hi Vladimir,
Quoted 17 lines · Vladimir Zapolskiy
The change adds
COMMON_CLK_NXPconfiguration symbol and enables it for NXP LPC18XX architecture, this is needed to reusedrivers/clk/nxpfolder for NXP common clock framework drivers other than LPC18XX one.Signed-off-by Vladimir Zapolskiy <[email protected]>Cc Joachim Eastwood <[email protected]>--- arch/arm/Kconfig | 1 + drivers/clk/Kconfig | 5 +++++ drivers/clk/Makefile | 2 +- 3 files changed, 7 insertions(+), 1 deletion(-)arch/arm/Kconfig +0
-0
arch/arm/Kconfig config ARCH_LPC18XX · line 955
Quoted 4 lines
arch/arm/Kconfig +1
-0@@ -952,6 +952,7 @@ config ARCH_LPC18XX select ARCH_HAS_RESET_CONTROLLER select ARM_AMBA select CLKSRC_LPC32XX + select COMMON_CLK
COMMON_CLK is already selected by ARM_SINGLE_ARMV7M which ARCH_LPC18XX depends on so this hunk should not be necessary.
Quoted 24 lines
arch/arm/Kconfig +0
-0select PINCTRL help Support for NXP's LPC18xx Cortex-M3 and LPC43xx Cortex-M4drivers/clk/Kconfig +5
-0@@ -175,6 +175,11 @@ config COMMON_CLK_PWM Adapter driver so that any PWM output can be (mis)used as clock signal at 50% duty cycle. +config COMMON_CLK_NXP + def_bool COMMON_CLK && ARCH_LPC18XX + ---help--- + Support for clock providers on NXP platforms. + config COMMON_CLK_PXA def_bool COMMON_CLK && ARCH_PXA ---help---drivers/clk/Makefile +0
-0
drivers/clk/Makefile endif
Quoted 10 lines
drivers/clk/Makefile +1
-2@@ -62,8 +62,8 @@ endif obj-$(CONFIG_PLAT_ORION) += mvebu/ obj-$(CONFIG_ARCH_MESON) += meson/ obj-$(CONFIG_ARCH_MXS) += mxs/ -obj-$(CONFIG_ARCH_LPC18XX) += nxp/ obj-$(CONFIG_MACH_PISTACHIO) += pistachio/ +obj-$(CONFIG_COMMON_CLK_NXP) += nxp/ obj-$(CONFIG_COMMON_CLK_PXA) += pxa/ obj-$(CONFIG_COMMON_CLK_QCOM) += qcom/ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ --
Other than the one comment above it looks good to me:
I'll try to find the time look through the other patches you have for lpc32xx. I also have a EA LPC3250 dev kit v2
(http://embeddedartists.com/products/kits/lpc3250_kit_v2.php) in my collection.
regards,
Joachim Eastwood
Vladimir Zapolskiy
maintainerPATCH 9/11 clk: lpc32xx: add common clock framework driver
In reply to Vladimir ZapolskiyAdd support for all configurable clocks found on NXP LPC32xx SoC.
The list contains several heterogenous groups of clocks:
* system clocks including multiple dividers and muxes,
* x397 PLL, HCLK PLL and USB PLL,
* peripheral clocks inherited from rtc, hclk and pclk,
* USB controller clocks: AHB slave, I2C, OTG, OHCI and device.
--- drivers/clk/Kconfig | 3 +- drivers/clk/nxp/Makefile | 1 + drivers/clk/nxp/clk-lpc32xx.c | 1562 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 1565 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/nxp/clk-lpc32xx.c
drivers/clk/Kconfig +2 -1
@@ -176,7 +176,8 @@ config COMMON_CLK_PWM at 50% duty cycle. config COMMON_CLK_NXP - def_bool COMMON_CLK && ARCH_LPC18XX + def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX) + select REGMAP_MMIO if ARCH_LPC32XX ---help--- Support for clock providers on NXP platforms.
drivers/clk/nxp/Makefile +1 -0
@@ -1,2 +1,3 @@ obj-$(CONFIG_ARCH_LPC18XX) += clk-lpc18xx-cgu.o obj-$(CONFIG_ARCH_LPC18XX) += clk-lpc18xx-ccu.o +obj-$(CONFIG_ARCH_LPC32XX) += clk-lpc32xx.o
drivers/clk/nxp/clk-lpc32xx.c new file +1562 -0
1,562 lines not on this page · raw message
Signature · 1 line
2.1.4
PATCH 9/11 clk: lpc32xx: add common clock framework driver
Quoted 9 lines · On Friday 20 November 2015 03:05:09 Vladimir Zapolskiy wrote:
drivers/clk/nxp/clk-lpc32xx.c new file +9
-0+ +struct clk_proto_t { +const char *name; +const u8 parents[LPC32XX_CLK_PARENTS_MAX ]; +u8 num_parents; +unsigned long flags; +}; + +#define CLK_PREFIX (LITERAL ) LPC32XX_CLK_ ## LITERAL
drivers/clk/nxp/clk-lpc32xx.c line 202
Quoted 10 lines
drivers/clk/nxp/clk-lpc32xx.c new file +10
-0+#define NUMARGS (...) (sizeof((int[]){__VA_ARGS__})/sizeof(int)) + +#define LPC32XX_CLK_DEFINE (_idx, _name, _flags, ...) \ + [CLK_PREFIX(_idx)] = { \ + .name = #_name, \ + .flags = _flags, \ + .parents = { __VA_ARGS__ }, \ + .num_parents = NUMARGS(__VA_ARGS__), \ + } +
Try to not outsmart yourself with the macros. It's better to avoid string concatenation so it's possible to grep for uses of some constant.
I would probably not use a macro at all here and just open-code the entire table. If you ensure that '0' is not a valid parent, then you can leave out the .num_parents field and just look for the zero-termination.
Arnd
Vladimir Zapolskiy
maintainerPATCH 9/11 clk: lpc32xx: add common clock framework driver
Quoted 25 lines · Arnd Bergmann
Quoted 9 lines · On Friday 20 November 2015 03:05:09 Vladimir Zapolskiy wrote:
drivers/clk/nxp/clk-lpc32xx.c new file +9
-0+ +struct clk_proto_t { +const char *name; +const u8 parents[LPC32XX_CLK_PARENTS_MAX ]; +u8 num_parents; +unsigned long flags; +}; + +#define CLK_PREFIX (LITERAL ) LPC32XX_CLK_ ## LITERALdrivers/clk/nxp/clk-lpc32xx.c line 202
Quoted 10 lines
drivers/clk/nxp/clk-lpc32xx.c new file +10
-0+#define NUMARGS (...) (sizeof((int[]){__VA_ARGS__})/sizeof(int)) + +#define LPC32XX_CLK_DEFINE (_idx, _name, _flags, ...) \ + [CLK_PREFIX(_idx)] = { \ + .name = #_name, \ + .flags = _flags, \ + .parents = { __VA_ARGS__ }, \ + .num_parents = NUMARGS(__VA_ARGS__), \ + } +Try to not outsmart yourself with the macros. It's better to avoid string concatenation so it's possible to grep for uses of some constant.
Quoted 4 lines
I would probably not use a macro at all here and just open-code the entire table. If you ensure that '0' is not a valid parent, then you can leave out the .num_parents field and just look for the zero-termination.
Macros are here for simplicity, code size reduction and to avoid some stupid mistakes like different number of .parents and .num_parents.
I believe macro unwrapping in this code will add another 1000 LoC and will result in quite unreadable and less maintainable code.
--
Best wishes,
Vladimir
PATCH 9/11 clk: lpc32xx: add common clock framework driver
Quoted 31 lines · On Friday 20 November 2015 20:07:46 Vladimir Zapolskiy wrote:
Quoted 25 lines · Arnd Bergmann
Quoted 9 lines · On Friday 20 November 2015 03:05:09 Vladimir Zapolskiy wrote:
drivers/clk/nxp/clk-lpc32xx.c new file +9
-0+ +struct clk_proto_t { +const char *name; +const u8 parents[LPC32XX_CLK_PARENTS_MAX ]; +u8 num_parents; +unsigned long flags; +}; + +#define CLK_PREFIX (LITERAL ) LPC32XX_CLK_ ## LITERALdrivers/clk/nxp/clk-lpc32xx.c line 202
Quoted 10 lines
drivers/clk/nxp/clk-lpc32xx.c new file +10
-0+#define NUMARGS (...) (sizeof((int[]){__VA_ARGS__})/sizeof(int)) + +#define LPC32XX_CLK_DEFINE (_idx, _name, _flags, ...) \ + [CLK_PREFIX(_idx)] = { \ + .name = #_name, \ + .flags = _flags, \ + .parents = { __VA_ARGS__ }, \ + .num_parents = NUMARGS(__VA_ARGS__), \ + } +Try to not outsmart yourself with the macros. It's better to avoid string concatenation so it's possible to grep for uses of some constant.
Quoted 4 lines
I would probably not use a macro at all here and just open-code the entire table. If you ensure that '0' is not a valid parent, then you can leave out the .num_parents field and just look for the zero-termination.
Quoted 5 lines
Macros are here for simplicity, code size reduction and to avoid some stupid mistakes like different number of .parents and .num_parents.
I believe macro unwrapping in this code will add another 1000 LoC and will result in quite unreadable and less maintainable code.
I mean specifically the macro above:
static const struct clk_proto_t clk_proto[LPC32XX_CLK_CCF_MAX] __initconst = {
+ LPC32XX_CLK_DEFINE(XTAL, xtal, 0x0),
+ LPC32XX_CLK_DEFINE(XTAL_32K, xtal_32k, 0x0),
+
+ LPC32XX_CLK_DEFINE(RTC, rtc, 0x0, LPC32XX_CLK_XTAL_32K), + LPC32XX_CLK_DEFINE(OSC, osc, CLK_IGNORE_UNUSED, LPC32XX_CLK_XTAL), + LPC32XX_CLK_DEFINE(SYS, sys, CLK_IGNORE_UNUSED,
+ LPC32XX_CLK_OSC, LPC32XX_CLK_PLL397X),
+ LPC32XX_CLK_DEFINE(PLL397X, pll_397x, CLK_IGNORE_UNUSED,
+ LPC32XX_CLK_RTC),
can become
static const struct clk_proto_t clk_proto[] __initconst = {
[LPC32XX_CLK_XTAL] = { "xtal" },
[LPC32XX_CLK_XTAL_32K] = { "xtal_32k" },
[LPC32XX_CLK_RTC] = { "rtc",
.parents = { LPC32XX_CLK_XTAL_32K, 0 } },
[LPC32XX_CLK_OSC] = { "osc", CLK_IGNORE_UNUSED,
.parents = { LPC32XX_CLK_XTAL, 0 } },
[LPC32XX_CLK_SYS] = { "sys", CLK_IGNORE_UNUSED,
.parents = { LPC32XX_CLK_OSC, LPC32XX_CLK_PLL397X, 0) },
[LPC32XX_CLK_PLL397X] = { "pll_397x", CLK_IGNORE_UNUSED,
.parents = { LPC32XX_CLK_RTC, 0 },Not harder to read at all, not really longer, but easier to grep for.
Arnd
Vladimir Zapolskiy
maintainerPATCH 9/11 clk: lpc32xx: add common clock framework driver
Hi Arnd,
Quoted 51 lines · Arnd Bergmann
Quoted 31 lines · On Friday 20 November 2015 20:07:46 Vladimir Zapolskiy wrote:
Quoted 25 lines · Arnd Bergmann
Quoted 9 lines · On Friday 20 November 2015 03:05:09 Vladimir Zapolskiy wrote:
drivers/clk/nxp/clk-lpc32xx.c new file +9
-0+ +struct clk_proto_t { +const char *name; +const u8 parents[LPC32XX_CLK_PARENTS_MAX ]; +u8 num_parents; +unsigned long flags; +}; + +#define CLK_PREFIX (LITERAL ) LPC32XX_CLK_ ## LITERALdrivers/clk/nxp/clk-lpc32xx.c line 202
Quoted 10 lines
drivers/clk/nxp/clk-lpc32xx.c new file +10
-0+#define NUMARGS (...) (sizeof((int[]){__VA_ARGS__})/sizeof(int)) + +#define LPC32XX_CLK_DEFINE (_idx, _name, _flags, ...) \ + [CLK_PREFIX(_idx)] = { \ + .name = #_name, \ + .flags = _flags, \ + .parents = { __VA_ARGS__ }, \ + .num_parents = NUMARGS(__VA_ARGS__), \ + } +Try to not outsmart yourself with the macros. It's better to avoid string concatenation so it's possible to grep for uses of some constant.
Quoted 4 lines
I would probably not use a macro at all here and just open-code the entire table. If you ensure that '0' is not a valid parent, then you can leave out the .num_parents field and just look for the zero-termination.
Quoted 5 lines
Macros are here for simplicity, code size reduction and to avoid some stupid mistakes like different number of .parents and .num_parents.
I believe macro unwrapping in this code will add another 1000 LoC and will result in quite unreadable and less maintainable code.
I mean specifically the macro above:
static const struct
clk_proto_tclk_proto[LPC32XX_CLK_CCF_MAX]__initconst= {drivers/clk/nxp/clk-lpc32xx.c new file +9
-0+LPC32XX_CLK_DEFINE (XTAL , xtal,0x0 ), +LPC32XX_CLK_DEFINE (XTAL_32K , xtal_32k,0x0 ), + +LPC32XX_CLK_DEFINE (RTC , rtc,0x0 ,LPC32XX_CLK_XTAL_32K ), +LPC32XX_CLK_DEFINE (OSC , osc,CLK_IGNORE_UNUSED ,LPC32XX_CLK_XTAL ), +LPC32XX_CLK_DEFINE (SYS , sys,CLK_IGNORE_UNUSED , +LPC32XX_CLK_OSC ,LPC32XX_CLK_PLL397X ), +LPC32XX_CLK_DEFINE (PLL397X , pll_397x,CLK_IGNORE_UNUSED , + LPC32XX_CLK_RTC),
Quoted 7 lines
can become
static const struct clk_proto_t clk_proto[] __initconst = { [LPC32XX_CLK_XTAL] = { "xtal" }, [LPC32XX_CLK_XTAL_32K] = { "xtal_32k" }, [LPC32XX_CLK_RTC] = { "rtc", .parents = { LPC32XX_CLK_XTAL_32K, 0 } },
this one and all below are two lines instead of one.
Also .num_parents is not set at compilation stage, this will require running over parents arrays for every registered clock on boot, it might noticeably slow down the booting process on a 200MHz core.
The clocks in the beginning have not so many parents, at the opposite extreme the situation is worse:
LPC32XX_CLK_DEFINE(TEST1, test1, 0x0, LPC32XX_CLK_PERIPH, LPC32XX_CLK_RTC, LPC32XX_CLK_OSC), LPC32XX_CLK_DEFINE(TEST2, test2, 0x0, LPC32XX_CLK_HCLK, LPC32XX_CLK_PERIPH, LPC32XX_CLK_USB, LPC32XX_CLK_OSC, LPC32XX_CLK_PLL397X),
vs.
[LPC32XX_CLK_TEST1] = { "test1",
.parents = { LPC32XX_CLK_PERIPH, LPC32XX_CLK_RTC,
LPC32XX_CLK_OSC, 0 } },
[LPC32XX_CLK_TEST1] = { "test2",
.parents = { LPC32XX_CLK_HCLK, LPC32XX_CLK_PERIPH,
LPC32XX_CLK_USB, LPC32XX_CLK_OSC,
LPC32XX_CLK_PLL397X, 0 } },Quoted 9 lines
[LPC32XX_CLK_OSC] = { "osc", CLK_IGNORE_UNUSED, .parents = { LPC32XX_CLK_XTAL, 0 } }, [LPC32XX_CLK_SYS] = { "sys", CLK_IGNORE_UNUSED, .parents = { LPC32XX_CLK_OSC, LPC32XX_CLK_PLL397X, 0) }, [LPC32XX_CLK_PLL397X] = { "pll_397x", CLK_IGNORE_UNUSED, .parents = { LPC32XX_CLK_RTC, 0 },Not harder to read at all, not really longer, but easier to grep for.
If it is not principal, I would prefer to keep the original notation, but convert stringified values to plane strings, all in all the table is fixed and it is not supposed to be updated anymore.
But in general I got your idea, I can implement it in v2, if you ask.
--
With best wishes,
Vladimir
Vladimir Zapolskiy
maintainerPATCH 10/11 arm: lpc32xx: switch to common clock framework
In reply to Vladimir ZapolskiyThe change switches NXP LPC32xx platforms to LPC32xx clock driver powered by common clock framework, this obsoletes mach-lpc32xx/clock.o legacy clock driver and thus it is removed.
Legacy timer driver mach-lpc32xx/timer.o strictly depends on legacy clock support, but fortunately an existing LPC32xx clock source and clock event driver completely replaces it, and thus it can be removed as well.
Noticeably platform UART driver directly operates on LPC32xx source control block registers, remove this dependency to avoid overlapping with common clock framework driver, also this guarantees that UART is working expectedly.
--- arch/arm/Kconfig | 3 +- arch/arm/mach-lpc32xx/Makefile | 3 +- arch/arm/mach-lpc32xx/clock.c | 1284 --------------------------------------- arch/arm/mach-lpc32xx/phy3250.c | 1 - arch/arm/mach-lpc32xx/serial.c | 3 - arch/arm/mach-lpc32xx/timer.c | 144 ----- 6 files changed, 3 insertions(+), 1435 deletions(-) delete mode 100644 arch/arm/mach-lpc32xx/clock.c delete mode 100644 arch/arm/mach-lpc32xx/timer.c
arch/arm/Kconfig +2 -1
@@ -592,7 +592,8 @@ config ARCH_LPC32XX select ARCH_REQUIRE_GPIOLIB select ARM_AMBA select CLKDEV_LOOKUP - select CLKSRC_MMIO + select CLKSRC_LPC32XX + select COMMON_CLK select CPU_ARM926T select GENERIC_CLOCKEVENTS select HAVE_IDE
arch/arm/mach-lpc32xx/Makefile +1 -2
@@ -2,7 +2,6 @@ # Makefile for the linux kernel. # -obj-y := timer.o irq.o common.o serial.o clock.o +obj-y := irq.o common.o serial.o obj-y += pm.o suspend.o obj-y += phy3250.o -
arch/arm/mach-lpc32xx/clock.c deleted +0 -1284
1,284 lines not on this page · raw message
arch/arm/mach-lpc32xx/phy3250.c +0 -1
@@ -260,7 +260,6 @@ DT_MACHINE_START(LPC32XX_DT, "LPC32XX SoC (Flattened Device Tree)") .atag_offset = 0x100, .map_io = lpc32xx_map_io, .init_irq = lpc32xx_init_irq, - .init_time = lpc32xx_timer_init, .init_machine = lpc3250_machine_init, .dt_compat = lpc32xx_dt_compat, .restart = lpc23xx_restart,
arch/arm/mach-lpc32xx/serial.c +0 -3
@@ -76,9 +76,6 @@ void __init lpc32xx_serial_init(void)unsigned int puart;int i, j; -/* UART clocks are off, let clock driver manage them */ -__raw_writel (0 ,LPC32XX_CLKPWR_UART_CLK_CTRL ); -for (i =0 ; i <ARRAY_SIZE (uartinit_data); i++) { clk =clk_get (NULL , uartinit_data[i].uart_ck_name);if (!IS_ERR (clk)) {
arch/arm/mach-lpc32xx/timer.c deleted +0 -144
144 lines not on this page · raw message
Signature · 1 line
2.1.4
Vladimir Zapolskiy
maintainerPATCH 11/11 arm: dts: lpc32xx: remove clock frequency property from UART device nodes
In reply to Vladimir ZapolskiyIf clock-frequency property is given, then it substitutes calculation of supplying clock frequency from parent clock, this may break UART, if parent clock is given and managed by common clock framework.
--- arch/arm/boot/dts/lpc32xx.dtsi | 4 ---- 1 file changed, 4 deletions(-)
arch/arm/boot/dts/lpc32xx.dtsi +0 -4
@@ -209,7 +209,6 @@ compatible = "nxp,lpc3220-uart"; reg = <0x40090000 0x1000>; interrupts = <9 0>; - clock-frequency = <13000000>; reg-shift = <2>; clocks = <&clk LPC32XX_CLK_UART5>; status = "disabled";
@@ -219,7 +218,6 @@ compatible = "nxp,lpc3220-uart"; reg = <0x40080000 0x1000>; interrupts = <7 0>; - clock-frequency = <13000000>; reg-shift = <2>; clocks = <&clk LPC32XX_CLK_UART3>; status = "disabled";
@@ -229,7 +227,6 @@ compatible = "nxp,lpc3220-uart"; reg = <0x40088000 0x1000>; interrupts = <8 0>; - clock-frequency = <13000000>; reg-shift = <2>; clocks = <&clk LPC32XX_CLK_UART4>; status = "disabled";
@@ -239,7 +236,6 @@ compatible = "nxp,lpc3220-uart"; reg = <0x40098000 0x1000>; interrupts = <10 0>; - clock-frequency = <13000000>; reg-shift = <2>; clocks = <&clk LPC32XX_CLK_UART6>; status = "disabled";
Signature · 1 line
2.1.4
Quoted 3 lines · Vladimir Zapolskiy
This changeset adds common clock framework driver for NXP LPC32xx boards.
Hi Vladimir,
Just to let you know that we did some testing using this changeset; I installed patches 4 to 7, 10 & 11 on top of 4.5-rc1.
I was able to run our software (SIC1 interrupt sources disable) without any problem a custom LPC32xx board.
We did not get any problem with the clock signals we are using.
Sylvain Lemieux
Quoted 5 lines
Vladimir Zapolskiy (11):
dt-bindings: clock: add description of LPC32xx clock controller
dt-bindings: clock: add description of LPC32xx USB clock controller
dt-bindings: clock: add NXP LPC32xx clock list for consumers
arm: dts: lpc32xx: add device nodes for external oscillators
Quoted 8 lines
arm: dts: lpc32xx: add clock controller device node
arm: dts: lpc32xx: add clock properties to device nodes
arm: dts: lpc32xx: add USB clock controller
clk: lpc18xx: add NXP specific common clock framework selection
clk: lpc32xx: add common clock framework driver
arm: lpc32xx: switch to common clock framework
arm: dts: lpc32xx: remove clock frequency property from UART device
nodes
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Vladimir Zapolskiy
maintainercover clk: lpc32xx: add clock support for NXP LPC32xx
Hi Sylvain,
Quoted 5 lines · Sylvain Lemieux
Quoted 3 lines · Vladimir Zapolskiy
This changeset adds common clock framework driver for NXP LPC32xx boards.
Quoted 7 lines
Hi Vladimir,
Just to let you know that we did some testing using this changeset; I installed patches 4 to 7, 10 & 11 on top of 4.5-rc1.
I was able to run our software (SIC1 interrupt sources disable) without any problem a custom LPC32xx board.
this is a known issue, and I hope it will be fixed in upstream in v4.6, the required changes in irqchip and gpiochip drivers were sent for review some time ago, a bit more work is needed to
Also 2-3 more clean-up changes in USB host and gadget drivers are done locally (no more need to configure clocks out of the common clock framework), but not yet submitted, will do it tomorrow.
Quoted 2 lines
We did not get any problem with the clock signals we are using.
Thank you for testing, I'm going to add your Tested-by tag (if you don't mind) and submit a PR to ARM maintainers shortly.
Quoted 5 lines
Quoted 5 lines
Vladimir Zapolskiy (11):
dt-bindings: clock: add description of LPC32xx clock controller
dt-bindings: clock: add description of LPC32xx USB clock controller
dt-bindings: clock: add NXP LPC32xx clock list for consumers
arm: dts: lpc32xx: add device nodes for external oscillators
Quoted 10 lines
Quoted 8 lines
arm: dts: lpc32xx: add clock controller device node
arm: dts: lpc32xx: add clock properties to device nodes
arm: dts: lpc32xx: add USB clock controller
clk: lpc18xx: add NXP specific common clock framework selection
clk: lpc32xx: add common clock framework driver
arm: lpc32xx: switch to common clock framework
arm: dts: lpc32xx: remove clock frequency property from UART device
nodes
With best wishes,
Vladimir
cover clk: lpc32xx: add clock support for NXP LPC32xx
Hi Vladimir,
Quoted 11 lines · Vladimir Zapolskiy
Hi Sylvain,
Quoted 8 lines · Sylvain Lemieux
Quoted 3 lines · Vladimir Zapolskiy
This changeset adds common clock framework driver for NXP LPC32xx boards.
Just to let you know that we did some testing using this changeset; I installed patches 4 to 7, 10 & 11 on top of 4.5-rc1.
Quoted 7 lines
Quoted 2 lines
I was able to run our software (SIC1 interrupt sources disable) without any problem a custom LPC32xx board.
this is a known issue, and I hope it will be fixed in upstream in v4.6, the required changes in irqchip and gpiochip drivers were sent for review some time ago, a bit more work is needed to
I also tested the irqchip patches you sent previously; I will send a separate e-mail with the information.
Quoted 10 lines
Also 2-3 more clean-up changes in USB host and gadget drivers are done locally (no more need to configure clocks out of the common clock framework), but not yet submitted, will do it tomorrow.
Quoted 2 lines
We did not get any problem with the clock signals we are using.
Thank you for testing, I'm going to add your Tested-by tag (if you don't mind) and submit a PR to ARM maintainers shortly.
You can go ahead for the tag; please use slemieux at tycoint.com
Quoted 18 lines
Quoted 5 lines
Quoted 5 lines
Vladimir Zapolskiy (11):
dt-bindings: clock: add description of LPC32xx clock controller
dt-bindings: clock: add description of LPC32xx USB clock controller
dt-bindings: clock: add NXP LPC32xx clock list for consumers
arm: dts: lpc32xx: add device nodes for external oscillatorsQuoted 10 lines
Quoted 8 lines
arm: dts: lpc32xx: add clock controller device node
arm: dts: lpc32xx: add clock properties to device nodes
arm: dts: lpc32xx: add USB clock controller
clk: lpc18xx: add NXP specific common clock framework selection
clk: lpc32xx: add common clock framework driver
arm: lpc32xx: switch to common clock framework
arm: dts: lpc32xx: remove clock frequency property from UART device
nodesWith best wishes,
Vladimir