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Amlogic: GXBB: Add pin controller

PATCH New Carlo Caione 5 participants 16 messages May 2, 2016 – May 23, 2016

Subsystems (5)
Device tree bindings GPIO Arm/Amlogic Meson SoC support arm64 +1 more subsystems
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Carlo Caione

author
#0 lore raw

v2 cover Amlogic: GXBB: Add pin controller

From: Carlo Caione <[email protected]>

Patchset to add and enable the pin controller driver on a couple of Amlogic boards with a Meson GXBB SoC.

Please note that:
* This patch depends on http://www.spinics.net/lists/devicetree/msg120964.html
([PATCH] ARM64: dts: amlogic: Add hiu and periphs buses).

* The platform driver is still missing a lot of muxing configurations. This is because Amlogic still hasn't publicly released documentation for the GXBB. Since Kevin has already this documentation under NDA, he will integrate and complete this driver with a separate submission.

Changelog:
* v2:
- Split patchset in 4 different patches

Carlo Caione (4):
pinctrl: amlogic: Add support for Amlogic Meson GXBB SoC
documentation: Add compatibles for Amlogic Meson GXBB pin controllers
ARM64: Kconfig: Select the Amlogic Meson pin controller driver
ARM64: dts: amlogic: Enable pin controller on GXBB-based platforms

 .../devicetree/bindings/pinctrl/meson,pinctrl.txt  |   2 +
 arch/arm64/Kconfig.platforms                       |   2 +
 .../arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts |  13 +
 arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi   |   2 +
 .../boot/dts/amlogic/meson-gxbb-vega-s95.dtsi      |   3 +
 arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi        |  41 ++
 drivers/pinctrl/meson/Makefile                     |   2 +-
 drivers/pinctrl/meson/pinctrl-meson-gxbb.c         | 432 +++++++++++++++++++++
 drivers/pinctrl/meson/pinctrl-meson.c              |   8 +
 drivers/pinctrl/meson/pinctrl-meson.h              |   2 +
 include/dt-bindings/gpio/meson-gxbb-gpio.h         | 154 ++++++++
 11 files changed, 660 insertions(+), 1 deletion(-)
 create mode 100644 drivers/pinctrl/meson/pinctrl-meson-gxbb.c
 create mode 100644 include/dt-bindings/gpio/meson-gxbb-gpio.h
Signature · 1 line
2.7.4
author
#1 lore raw

PATCH v2 1/4 pinctrl: amlogic: Add support for Amlogic Meson GXBB SoC

From: Carlo Caione <[email protected]>

This patch adds the basic platform file to support the pin controller found on the Amlogic Meson GXBB SoCs.

Signed-off-by Carlo Caione <[email protected]>
---
 drivers/pinctrl/meson/Makefile             |   2 +-
 drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 432 +++++++++++++++++++++++++++++
 drivers/pinctrl/meson/pinctrl-meson.c      |   8 +
 drivers/pinctrl/meson/pinctrl-meson.h      |   2 +
 include/dt-bindings/gpio/meson-gxbb-gpio.h | 154 ++++++++++
 5 files changed, 597 insertions(+), 1 deletion(-)
 create mode 100644 drivers/pinctrl/meson/pinctrl-meson-gxbb.c
 create mode 100644 include/dt-bindings/gpio/meson-gxbb-gpio.h
drivers/pinctrl/meson/Makefile +1 -1
index c751d22..24434f1 100644
@@ -1,2 +1,2 @@
-obj-y	+= pinctrl-meson8.o pinctrl-meson8b.o
+obj-y	+= pinctrl-meson8.o pinctrl-meson8b.o pinctrl-meson-gxbb.o
 obj-y	+= pinctrl-meson.o
drivers/pinctrl/meson/pinctrl-meson-gxbb.c new file +432 -0

432 lines not on this page · raw message

drivers/pinctrl/meson/pinctrl-meson.c +8 -0
index e610112..11623c6 100644
@@ -549,6 +549,14 @@ static const struct of_device_id meson_pinctrl_dt_match[] = {
 		.compatible = "amlogic,meson8b-aobus-pinctrl",
 		.data = &meson8b_aobus_pinctrl_data,
 	},
+	{
+		.compatible = "amlogic,meson-gxbb-periphs-pinctrl",
+		.data = &meson_gxbb_periphs_pinctrl_data,
+	},
+	{
+		.compatible = "amlogic,meson-gxbb-aobus-pinctrl",
+		.data = &meson_gxbb_aobus_pinctrl_data,
+	},
 	{ },
 };
drivers/pinctrl/meson/pinctrl-meson.h +2 -0
index 9c93e0d..d89442e 100644
@@ -199,3 +199,5 @@ extern struct meson_pinctrl_data meson8_cbus_pinctrl_data;
 extern struct meson_pinctrl_data meson8_aobus_pinctrl_data;
 extern struct meson_pinctrl_data meson8b_cbus_pinctrl_data;
 extern struct meson_pinctrl_data meson8b_aobus_pinctrl_data;
+extern struct meson_pinctrl_data meson_gxbb_periphs_pinctrl_data;
+extern struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data;
include/dt-bindings/gpio/meson-gxbb-gpio.h new file +154 -0

154 lines not on this page · raw message

Signature · 1 line
2.7.4
#2 lore raw

PATCH v2 1/4 pinctrl: amlogic: Add support for Amlogic Meson GXBB SoC

Quoted 6 lines · Carlo Caione

From: Carlo Caione <[email protected]>

This patch adds the basic platform file to support the pin controller found on the Amlogic Meson GXBB SoCs.

Signed-off-by Carlo Caione <[email protected]>

Patch applied with Kevin's ACK/review tag.

Yours,
Linus Walleij

author
#3 lore raw

PATCH v2 2/4 documentation: Add compatibles for Amlogic Meson GXBB pin controllers

In reply to Carlo Caione

From: Carlo Caione <[email protected]>

Add the two new compatibles for the Amlogic Meson GXBB pin controllers.

Signed-off-by Carlo Caione <[email protected]>
---
 Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt | 2 ++
 1 file changed, 2 insertions(+)
Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt +2 -0
index 32f4a2d..fe7fe0b 100644
@@ -5,6 +5,8 @@ Required properties for the root node:
 		      "amlogic,meson8b-cbus-pinctrl"
 		      "amlogic,meson8-aobus-pinctrl"
 		      "amlogic,meson8b-aobus-pinctrl"
+		      "amlogic,meson-gxbb-periphs-pinctrl"
+		      "amlogic,meson-gxbb-aobus-pinctrl"
  - reg: address and size of registers controlling irq functionality
 
 === GPIO sub-nodes ===
Signature · 1 line
2.7.4
#5 lore raw

PATCH v2 2/4 documentation: Add compatibles for Amlogic Meson GXBB pin controllers

In reply to Carlo Caione
Quoted 14 lines · Carlo Caione

From: Carlo Caione <[email protected]>

Add the two new compatibles for the Amlogic Meson GXBB pin controllers.

Signed-off-by Carlo Caione <[email protected]>
---
 Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt | 2 ++
 1 file changed, 2 insertions(+)
Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt +0 -0
index 32f4a2d..fe7fe0b 100644

Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt Required properties for the root node: · line 10

Quoted 6 lines
Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt +2 -0
@@ -5,6 +5,8 @@ Required properties for the root node:
                      "amlogic,meson8b-cbus-pinctrl"
                      "amlogic,meson8-aobus-pinctrl"
                      "amlogic,meson8b-aobus-pinctrl"
+                     "amlogic,meson-gxbb-periphs-pinctrl"
+                     "amlogic,meson-gxbb-aobus-pinctrl"
  - reg: address and size of registers controlling irq functionality

This does NOT apply to the pin control tree because upstream does NOT look like this. It looks like that in linux-next however.

So I guess this must be patched somewhere else
than the pin control tree, so apply it there:

Acked-by Linus Walleij <[email protected]>

Yours,
Linus Walleij

author
#6 lore raw

PATCH v2 2/4 documentation: Add compatibles for Amlogic Meson GXBB pin controllers

Quoted 11 lines · Linus Walleij
Quoted 9 lines · Carlo Caione

From: Carlo Caione <[email protected]>

Add the two new compatibles for the Amlogic Meson GXBB pin controllers.

Signed-off-by Carlo Caione <[email protected]>
---
 Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt | 2 ++
 1 file changed, 2 insertions(+)
Quoted 14 lines

Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt Required properties for the root node: · line 10

Quoted 11 lines
Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt +2 -0
index 32f4a2d..fe7fe0b 100644
@@ -5,6 +5,8 @@ Required properties for the root node:
                      "amlogic,meson8b-cbus-pinctrl"
                      "amlogic,meson8-aobus-pinctrl"
                      "amlogic,meson8b-aobus-pinctrl"
+                     "amlogic,meson-gxbb-periphs-pinctrl"
+                     "amlogic,meson-gxbb-aobus-pinctrl"
  - reg: address and size of registers controlling irq functionality

This does NOT apply to the pin control tree because upstream does NOT look like this. It looks like that in linux-next however.

Linus master looks like that
https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
If you want I can merge it through my tree with the DTS changes.

Signature · 1 line
Carlo Caione
#7 lore raw

PATCH v2 2/4 documentation: Add compatibles for Amlogic Meson GXBB pin controllers

Quoted 28 lines · Carlo Caione
Quoted 11 lines · Linus Walleij
Quoted 9 lines · Carlo Caione

From: Carlo Caione <[email protected]>

Add the two new compatibles for the Amlogic Meson GXBB pin controllers.

Signed-off-by Carlo Caione <[email protected]>
---
 Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt | 2 ++
 1 file changed, 2 insertions(+)
Quoted 14 lines

Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt Required properties for the root node: · line 10

Quoted 11 lines
Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt +2 -0
index 32f4a2d..fe7fe0b 100644
@@ -5,6 +5,8 @@ Required properties for the root node:
                      "amlogic,meson8b-cbus-pinctrl"
                      "amlogic,meson8-aobus-pinctrl"
                      "amlogic,meson8b-aobus-pinctrl"
+                     "amlogic,meson-gxbb-periphs-pinctrl"
+                     "amlogic,meson-gxbb-aobus-pinctrl"
  - reg: address and size of registers controlling irq functionality

This does NOT apply to the pin control tree because upstream does NOT look like this. It looks like that in linux-next however.

Quoted 2 lines

Linus master looks like that
https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt

Aha so it was merged by some other tree during the release cycle. OK sorry, I was confused.

Quoted 1 line

If you want I can merge it through my tree with the DTS changes.

Sure that makes things easier for me, else I need to backmerge the -rc6 or something.

Yours,
Linus Walleij

author
#8 lore raw

PATCH v2 3/4 ARM64: Kconfig: Select the Amlogic Meson pin controller driver

In reply to Carlo Caione

From: Carlo Caione <[email protected]>

Select the Meson pin controller driver also for the AArch64 Meson platform.

Signed-off-by Carlo Caione <[email protected]>
---
 arch/arm64/Kconfig.platforms | 2 ++
 1 file changed, 2 insertions(+)
arch/arm64/Kconfig.platforms +2 -0
index 54967ff..fc051f0 100644
@@ -65,6 +65,8 @@ config ARCH_MEDIATEK
 
 config ARCH_MESON
 	bool "Amlogic Platforms"
+	select PINCTRL
+	select PINCTRL_MESON
 	help
 	  This enables support for the Amlogic S905 SoCs.
Signature · 1 line
2.7.4
#10 lore raw

PATCH v2 3/4 ARM64: Kconfig: Select the Amlogic Meson pin controller driver

Quoted 4 lines · On Wednesday 11 May 2016 10:53:35 Linus Walleij wrote:
Quoted 2 lines · Carlo Caione

From: Carlo Caione <[email protected]>

Quoted 9 lines
Quoted 4 lines

Select the Meson pin controller driver also for the AArch64 Meson platform.

Signed-off-by Carlo Caione <[email protected]>
Acked-by Linus Walleij <[email protected]>

I guess this should get merged through the ARM SoC tree.

I'd keep it together with the other changes for clarity and merge it through your tree.

Acked-by Arnd Bergmann <[email protected]>
author
#11 lore raw

PATCH v2 3/4 ARM64: Kconfig: Select the Amlogic Meson pin controller driver

Quoted 10 lines · Arnd Bergmann
Quoted 9 lines · On Wednesday 11 May 2016 10:53:35 Linus Walleij wrote:
Quoted 6 lines · Carlo Caione

From: Carlo Caione <[email protected]>

Select the Meson pin controller driver also for the AArch64 Meson platform.

Signed-off-by Carlo Caione <[email protected]>
Quoted 7 lines
Quoted 4 lines
Acked-by Linus Walleij <[email protected]>

I guess this should get merged through the ARM SoC tree.

I'd keep it together with the other changes for clarity and merge it through your tree.

Linus,
did you take it? otherwise I can merge it through my repo.

Cheers,

Signature · 1 line
Carlo Caione
#12 lore raw

PATCH v2 3/4 ARM64: Kconfig: Select the Amlogic Meson pin controller driver

Quoted 13 lines · Carlo Caione
Quoted 12 lines · Arnd Bergmann
Quoted 11 lines · On Wednesday 11 May 2016 10:53:35 Linus Walleij wrote:
Quoted 6 lines · Carlo Caione

From: Carlo Caione <[email protected]>

Select the Meson pin controller driver also for the AArch64 Meson platform.

Signed-off-by Carlo Caione <[email protected]>
Acked-by Linus Walleij <[email protected]>
Quoted 8 lines
Quoted 5 lines
Quoted 2 lines

I guess this should get merged through the ARM SoC tree.

I'd keep it together with the other changes for clarity and merge it through your tree.

Linus,
did you take it? otherwise I can merge it through my repo.

Nope didn't pick this one. I prefer to not take such patches since they tend to generate collissions. Please take this through ARM SoC.

Yours,
Linus Walleij

author
#13 lore raw

PATCH v2 4/4 ARM64: dts: amlogic: Enable pin controller on GXBB-based platforms

In reply to Carlo Caione

From: Carlo Caione <[email protected]>

Update DTS and DTSI files to enable the pin controller. We also now support the blinking blue LED on the Odroid-C2.

Signed-off-by Carlo Caione <[email protected]>
Acked-by Linus Walleij <[email protected]>
---
 .../arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts | 13 +++++++
 arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi   |  2 ++
 .../boot/dts/amlogic/meson-gxbb-vega-s95.dtsi      |  3 ++
 arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi        | 41 ++++++++++++++++++++++
 4 files changed, 59 insertions(+)
arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts +13 -0
index 7f2c674..41e1e66 100644
@@ -45,6 +45,7 @@
 /dts-v1/;
 
 #include "meson-gxbb.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 
 / {
 	compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb";

@@ -62,8 +63,20 @@
 		device_type = "memory";
 		reg = <0x0 0x0 0x0 0x80000000>;
 	};
+
+	leds {
+		compatible = "gpio-leds";
+		blue {
+			label = "c2:blue:alive";
+			gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "heartbeat";
+			default-state = "off";
+		};
+	};
 };
 
 &uart_AO {
 	status = "okay";
+	pinctrl-0 = <&uart_ao_a_pins>;
+	pinctrl-names = "default";
 };
arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi +2 -0
index bf7ff1d..22e6298 100644
@@ -62,4 +62,6 @@
 /* This UART is brought out to the DB9 connector */
 &uart_AO {
 	status = "okay";
+	pinctrl-0 = <&uart_ao_a_pins>;
+	pinctrl-names = "default";
 };
arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi +3 -0
index 012cdcc..54bb7c7 100644
@@ -56,4 +56,7 @@
 
 &uart_AO {
 	status = "okay";
+	pinctrl-0 = <&uart_ao_a_pins>;
+	pinctrl-names = "default";
+
 };
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +41 -0

59 lines not on this page · raw message

Signature · 1 line
2.7.4
maintainer
#14 lore raw

v2 cover Amlogic: GXBB: Add pin controller

In reply to Carlo Caione
Quoted 4 lines · Carlo Caione

From: Carlo Caione <[email protected]>

Patchset to add and enable the pin controller driver on a couple of Amlogic boards with a Meson GXBB SoC.

Reviewed-by Kevin Hilman <[email protected]>

I tested this series on GXBB odroid-c2 and p200 boards, along with some additional pins (patches forthcoming)

Tested-by Kevin Hilman <[email protected]>
Quoted 3 lines

Please note that:
* This patch depends on http://www.spinics.net/lists/devicetree/msg120964.html
([PATCH] ARM64: dts: amlogic: Add hiu and periphs buses).

Linus, with your ack, we could keep this series together, or if you prefer, you can take patch 1, and Carlo can take the others through his tree.

Quoted 4 lines

* The platform driver is still missing a lot of muxing configurations. This is because Amlogic still hasn't publicly released documentation for the GXBB. Since Kevin has already this documentation under NDA, he will integrate and complete this driver with a separate submission.

Coming soon...

Kevin

#15 lore raw

v2 cover Amlogic: GXBB: Add pin controller

Quoted 3 lines · Kevin Hilman

Linus, with your ack, we could keep this series together, or if you prefer, you can take patch 1, and Carlo can take the others through his tree.

I've applied 1/4.

The rest can go in wherever, they seem pretty orthogonal.

Yours,
Linus Walleij