add missing L2 cache properties for Meson8 and Meson8b

This adds three missing L2 cache properties for the cache controller on Meson8 and Meson8b.

This patch was originally written by Carlo Caione, I just took it and applied it to Meson8 as well and rebased it.

This patch is based on my previous series from [0]: "Amlogic Meson (32-bit) .dts cleanups"

[0] http://lists.infradead.org/pipermail/linux-amlogic/2017-April/003399.html

Carlo Caione (1):
ARM: dts: meson: Extend L2 cache controller node for Meson8 and
Meson8b

 arch/arm/boot/dts/meson8.dtsi  | 6 ++++++
 arch/arm/boot/dts/meson8b.dtsi | 6 ++++++
 2 files changed, 12 insertions(+)

2.12.2

From: Carlo Caione <[email protected]>

This patch extends the L2 cache controller node for the Amlogic Meson8 and Meson8b SoCs with some missing parameters. These are taken from the Amlogic GPL kernel source.

---
 arch/arm/boot/dts/meson8.dtsi  | 6 ++++++
 arch/arm/boot/dts/meson8b.dtsi | 6 ++++++
 2 files changed, 12 insertions(+)

index 5eaaf067c76a..6993077331c7 100644
@@ -188,6 +188,12 @@
 	clocks = <&clk81>;
 };
 
+&L2 {
+	arm,data-latency = <3 3 3>;
+	arm,tag-latency = <2 2 2>;
+	arm,filter-ranges = <0x100000 0xc0000000>;
+};
+
 &spifc {
 	clocks = <&clk81>;
 };

index ef9ac974111c..d9f116a418b2 100644
@@ -171,6 +171,12 @@
 	};
 };
 
+&L2 {
+	arm,data-latency = <3 3 3>;
+	arm,tag-latency = <2 2 2>;
+	arm,filter-ranges = <0x100000 0xc0000000>;
+};
+
 &uart_AO {
 	clocks = <&clkc CLKID_CLK81>;
 };

2.12.2

Applied to v4.13/dt64,

Thanks,

Kevin