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: Same cp0 regs are 64bits and other 32bit

PATCH New Juan Quintela 1 participant 1 message Mar 27, 2003 MIPS

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Juan Quintela

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PATCH 1/1 : Same cp0 regs are 64bits and other 32bit

Hi

*some* cp0 regs are unsigned long, not unsigned int.

Later, Juan.

 build/arch/mips/kernel/traps.c |    7 +++----
 1 files changed, 3 insertions(+), 4 deletions(-)
build/arch/mips/kernel/traps.c renamed from build/arch/mips/kernel/traps.c~cp0_regs_are_unsigned_long +3 -4
diff -puN build/arch/mips/kernel/traps.c~cp0_regs_are_unsigned_long build/arch/mips/kernel/traps.c
@@ -788,9 +788,8 @@ asmlinkage void cache_parity_error(void)
 	unsigned int reg_val;
 
 	/* For the moment, report the problem and hang. */
-	reg_val = read_c0_errorepc();
 	printk("Cache error exception:\n");
-	printk("cp0_errorepc == %08x\n", read_c0_errorepc());
+	printk("cp0_errorepc == %08lx\n", read_c0_errorepc());
 	reg_val = read_c0_cacheerr();
 	printk("c0_cacheerr == %08x\n", reg_val);
 

@@ -809,10 +808,10 @@ asmlinkage void cache_parity_error(void)
 
 #if defined(CONFIG_CPU_MIPS32) || defined (CONFIG_CPU_MIPS64)
 	if (reg_val & (1<<22))
-		printk("DErrAddr0: 0x%08x\n", read_c0_derraddr0());
+		printk("DErrAddr0: 0x%08lx\n", read_c0_derraddr0());
 
 	if (reg_val & (1<<23))
-		printk("DErrAddr1: 0x%08x\n", read_c0_derraddr1());
+		printk("DErrAddr1: 0x%08lx\n", read_c0_derraddr1());
 #endif
 
 	panic("Can't handle the cache error!");

_

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