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clk: meson-gxbb: expose clock CLKID_RNG0

PATCH New Heiner Kallweit 6 participants 14 messages Feb 22, 2017 – Mar 28, 2017

Subsystems (6)
Device tree bindings Arm/Amlogic Meson SoC support Common clk Crypto API +2 more subsystems
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Heiner Kallweit

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#0 lore raw

PATCH v3 1/3 clk: meson-gxbb: expose clock CLKID_RNG0

Expose clock CLKID_RNG0 which is needed for the HW random number generator.

Signed-off-by Heiner Kallweit <[email protected]>

---
v2:
- added clk and DT maintainers
- split exposing the clock and using it in DT into two patches
- comment out clock definition in drivers/clk/meson/gxbb.h
- silently move CLKID_SPI to the right place
v3:
- no changes

---
 drivers/clk/meson/gxbb.h              | 2 +-
 include/dt-bindings/clock/gxbb-clkc.h | 3 ++-
 2 files changed, 3 insertions(+), 2 deletions(-)
drivers/clk/meson/gxbb.h +1 -1
index 8ee2022c..cbd62e46 100644
@@ -193,7 +193,7 @@
 /* CLKID_I2C */
 /* #define CLKID_SAR_ADC */
 #define CLKID_SMART_CARD	  24
-#define CLKID_RNG0		  25
+/* CLKID_RNG0 */
 #define CLKID_UART0		  26
 #define CLKID_SDHC		  27
 #define CLKID_STREAM		  28
include/dt-bindings/clock/gxbb-clkc.h +2 -1
index 692846c7..63f4c2c4 100644
@@ -12,9 +12,10 @@
 #define CLKID_FCLK_DIV4		6
 #define CLKID_CLK81		12
 #define CLKID_MPLL2		15
-#define CLKID_SPI		34
 #define CLKID_I2C		22
 #define CLKID_SAR_ADC		23
+#define CLKID_RNG0		25
+#define CLKID_SPI		34
 #define CLKID_ETH		36
 #define CLKID_USB0		50
 #define CLKID_USB1		51
Signature · 1 line
2.11.1
author
#1 lore raw

PATCH v3 2/4 ARM64: dts: meson-gx: add clock to DT binding documentation for hwrng

Add clock to DT binding documentation.

Signed-off-by Heiner Kallweit <[email protected]>

---
v2:
- splitted first version of patch into two
- add DT binding documentation
- mention that clock is optional
- replace spaces with tabs in DT binding example
v3:
- splitted DT extension and binding documentation update into two patches

---
 Documentation/devicetree/bindings/rng/amlogic,meson-rng.txt | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/rng/amlogic,meson-rng.txt +9 -2
index 202f2d09..4d403645 100644
@@ -6,9 +6,16 @@ Required properties:
 - compatible : should be "amlogic,meson-rng"
 - reg : Specifies base physical address and size of the registers.
 
+Optional properties:
+
+- clocks : phandle to the following named clocks
+- clock-names: Name of core clock, must be "core"
+
 Example:
 
 rng {
-        compatible = "amlogic,meson-rng";
-        reg = <0x0 0xc8834000 0x0 0x4>;
+	compatible = "amlogic,meson-rng";
+	reg = <0x0 0xc8834000 0x0 0x4>;
+	clocks = <&clkc CLKID_RNG0>;
+	clock-names = "core";
 };
Signature · 1 line
2.11.1
maintainer
#2 lore raw

PATCH v3 2/4 ARM64: dts: meson-gx: add clock to DT binding documentation for hwrng

Quoted 11 lines · Heiner Kallweit

Add clock to DT binding documentation.

Signed-off-by Heiner Kallweit <[email protected]>

---
v2:
- splitted first version of patch into two
- add DT binding documentation
- mention that clock is optional
- replace spaces with tabs in DT binding example
v3:
- splitted DT extension and binding documentation update into two patches

Quoted 3 lines
---
 Documentation/devicetree/bindings/rng/amlogic,meson-rng.txt | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

Now the subject should really be: "dt-bindings: rng: ..."

Acked-by Rob Herring <[email protected]>
author
#3 lore raw

PATCH v3 3/4 ARM64: dts: meson-gx: add clock CLKID_RNG0 to hwrng node

In reply to Heiner Kallweit

Add clock CLKID_RNG0 to HW randon number generator node.

Signed-off-by Heiner Kallweit <[email protected]>

---
v2:
- splitted first version of patch into two
- add DT binding documentation
- mention that clock is optional
- replace spaces with tabs in DT binding example
v3:
- splitted DT extension and binding documentation update into two patches

---
 arch/arm64/boot/dts/amlogic/meson-gx.dtsi   | 2 +-
 arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 5 +++++
 2 files changed, 6 insertions(+), 1 deletion(-)
arch/arm64/boot/dts/amlogic/meson-gx.dtsi +1 -1
index 5d995f77..620495a4 100644
@@ -380,7 +380,7 @@
 			#size-cells = <2>;
 			ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
 
-			rng {
+			hwrng: rng {
 				compatible = "amlogic,meson-rng";
 				reg = <0x0 0x0 0x0 0x4>;
 			};
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +5 -0
index 04b3324b..a375cb21 100644
@@ -524,3 +524,8 @@
 &vpu {
 	compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
 };
+
+&hwrng {
+	clocks = <&clkc CLKID_RNG0>;
+	clock-names = "core";
+};
Signature · 1 line
2.11.1
author
#4 lore raw

PATCH v3 4/4 hwrng: meson: add clock handling to driver

In reply to Heiner Kallweit

Add handling of RNG0 clock to the driver.

Signed-off-by Heiner Kallweit <[email protected]>

---
v2:
- consider that clock is optional
- use managed call to clk_disable_unprepare to ensure that cleaning up is done in the right order if driver is removed
v3:
- no changes

---
 drivers/char/hw_random/meson-rng.c | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)
drivers/char/hw_random/meson-rng.c +22 -0
index 119d6984..2e23be80 100644
@@ -62,6 +62,7 @@
 #include <linux/slab.h>
 #include <linux/types.h>
 #include <linux/of.h>
+#include <linux/clk.h>
 
 #define RNG_DATA 0x00
 

@@ -69,6 +70,7 @@ struct meson_rng_data {
 	void __iomem *base;
 	struct platform_device *pdev;
 	struct hwrng rng;
+	struct clk *core_clk;
 };
 
 static int meson_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)

@@ -81,11 +83,17 @@ static int meson_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
 	return sizeof(u32);
 }
 
+static void meson_rng_clk_disable(void *data)
+{
+	clk_disable_unprepare(data);
+}
+
 static int meson_rng_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
 	struct meson_rng_data *data;
 	struct resource *res;
+	int ret;
 
 	data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
 	if (!data)

@@ -98,6 +106,20 @@ static int meson_rng_probe(struct platform_device *pdev)
 	if (IS_ERR(data->base))
 		return PTR_ERR(data->base);
 
+	data->core_clk = devm_clk_get(dev, "core");
+	if (IS_ERR(data->core_clk))
+		data->core_clk = NULL;
+
+	if (data->core_clk) {
+		ret = clk_prepare_enable(data->core_clk);
+		if (ret)
+			return ret;
+		ret = devm_add_action_or_reset(dev, meson_rng_clk_disable,
+					       data->core_clk);
+		if (ret)
+			return ret;
+	}
+
 	data->rng.name = pdev->name;
 	data->rng.read = meson_rng_read;
Signature · 1 line
2.11.1
#5 lore raw

PATCH v3 1/3 clk: meson-gxbb: expose clock CLKID_RNG0

In reply to Heiner Kallweit
Quoted 11 lines · Heiner Kallweit

Expose clock CLKID_RNG0 which is needed for the HW random number generator.

Signed-off-by Heiner Kallweit <[email protected]>

---
v2:
- added clk and DT maintainers
- split exposing the clock and using it in DT into two patches
- comment out clock definition in drivers/clk/meson/gxbb.h
- silently move CLKID_SPI to the right place
v3:
- no changes

Quoted 5 lines
---
 drivers/clk/meson/gxbb.h              | 2 +-
 include/dt-bindings/clock/gxbb-clkc.h | 3 ++-
 2 files changed, 3 insertions(+), 2 deletions(-)

Hi Heiner,

This looks all good to me, but you should always send a cover letter for each revisions of the patchset.

Using "git send-email" along the "--cover-letter" of "get format-patch" feature would also help send them in a row with a up-to-date cover letter.

For the third patch, it may be good to also add the same to the GXL dtsi, no ?

Anyway :

Reviewed-by Neil Armstrong <[email protected]>

Thanks,
Neil

maintainer
#7 lore raw

PATCH v3 1/3 clk: meson-gxbb: expose clock CLKID_RNG0

Hi Herbert,

Quoted 6 lines · Herbert Xu
Quoted 3 lines · Heiner Kallweit

Expose clock CLKID_RNG0 which is needed for the HW random number generator.

Signed-off-by Heiner Kallweit <[email protected]>

All patches applied. Thanks.

Actually, can you just apply [PATCH 4/4] to your tree?

The clock and DT patches need to go through their respective trees or will otherwise have conflicts with other things going in via those trees.

Thanks,

Kevin

maintainer
#8 lore raw

PATCH v3 1/3 clk: meson-gxbb: expose clock CLKID_RNG0

Quoted 9 lines · Kevin Hilman

Hi Herbert,

Quoted 5 lines · Herbert Xu
Quoted 3 lines · Heiner Kallweit

Expose clock CLKID_RNG0 which is needed for the HW random number generator.

Signed-off-by Heiner Kallweit <[email protected]>
Quoted 7 lines
Quoted 1 line

All patches applied. Thanks.

Actually, can you just apply [PATCH 4/4] to your tree?

The clock and DT patches need to go through their respective trees or will otherwise have conflicts with other things going in via those trees.

It's too late now. Please speak up sooner next time. These patches were posted a month ago.

Thanks,

Signature · 3 lines
Email: Herbert Xu <[email protected]>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
maintainer
#9 lore raw

PATCH v3 1/3 clk: meson-gxbb: expose clock CLKID_RNG0

Quoted 12 lines · Herbert Xu
Quoted 11 lines · Kevin Hilman

Hi Herbert,

Quoted 6 lines · Herbert Xu
Quoted 3 lines · Heiner Kallweit

Expose clock CLKID_RNG0 which is needed for the HW random number generator.

Signed-off-by Heiner Kallweit <[email protected]>

All patches applied. Thanks.

Quoted 8 lines
Quoted 5 lines

Actually, can you just apply [PATCH 4/4] to your tree?

The clock and DT patches need to go through their respective trees or will otherwise have conflicts with other things going in via those trees.

It's too late now. Please speak up sooner next time. These patches were posted a month ago.

Sorry, I didn't realize you would be applying everything. Also, I'm not the original author, just the platform maintainer that noticed it and now has to deal with the conflicts. :(

Most other driver maintainers are only applying patches that directly apply to their subsystem and leave patches to other drivers (e.g. clk) and platform-specific stuff (e.g. DT) to go in via their proper trees, so that's what I was expecting to happen here too.

Kevin

maintainer
#10 lore raw

PATCH v3 1/3 clk: meson-gxbb: expose clock CLKID_RNG0

In reply to Herbert Xu
Quoted 12 lines · Herbert Xu
Quoted 11 lines · Kevin Hilman

Hi Herbert,

Quoted 6 lines · Herbert Xu
Quoted 3 lines · Heiner Kallweit

Expose clock CLKID_RNG0 which is needed for the HW random number generator.

Signed-off-by Heiner Kallweit <[email protected]>

All patches applied. Thanks.

Quoted 8 lines
Quoted 5 lines

Actually, can you just apply [PATCH 4/4] to your tree?

The clock and DT patches need to go through their respective trees or will otherwise have conflicts with other things going in via those trees.

It's too late now. Please speak up sooner next time. These patches were posted a month ago.

Because this will be causing conflicts with both the platform (amlogic) tree and the clk tree, could provide an immutable branch where these are applied to help us handle these conflicts?

Thanks,

Kevin

#11 lore raw

PATCH v3 1/3 clk: meson-gxbb: expose clock CLKID_RNG0

Quoting Kevin Hilman (2017-03-22 08:24:08)

Quoted 20 lines
Quoted 18 lines · Herbert Xu
Quoted 16 lines · Kevin Hilman

Hi Herbert,

Quoted 6 lines · Herbert Xu
Quoted 3 lines · Heiner Kallweit

Expose clock CLKID_RNG0 which is needed for the HW random number generator.

Signed-off-by Heiner Kallweit <[email protected]>

All patches applied. Thanks.

Actually, can you just apply [PATCH 4/4] to your tree?

The clock and DT patches need to go through their respective trees or will otherwise have conflicts with other things going in via those trees.

Quoted 6 lines
Quoted 2 lines

It's too late now. Please speak up sooner next time. These patches were posted a month ago.

Because this will be causing conflicts with both the platform (amlogic) tree and the clk tree, could provide an immutable branch where these are applied to help us handle these conflicts?

+1

The DT header changes will cause conflicts in the clk tree. Much better to either arrange for the patches to be applied by the correct maintainers or to provide a stable, immutable branch.

Best regards,
Mike

Quoted 4 lines

Thanks,

Kevin

maintainer
#12 lore raw

PATCH v3 1/3 clk: meson-gxbb: expose clock CLKID_RNG0

In reply to Kevin Hilman
Quoted 4 lines · Kevin Hilman

Because this will be causing conflicts with both the platform (amlogic) tree and the clk tree, could provide an immutable branch where these are applied to help us handle these conflicts?

If you apply the same patches to your tree there should be no conflicts at all. git is able to resolve this automatically.

Cheers,

Signature · 3 lines
Email: Herbert Xu <[email protected]>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
#13 lore raw

PATCH v3 1/3 clk: meson-gxbb: expose clock CLKID_RNG0

Herbert,

Quoted 8 lines · Herbert Xu
Quoted 4 lines · Kevin Hilman

Because this will be causing conflicts with both the platform (amlogic) tree and the clk tree, could provide an immutable branch where these are applied to help us handle these conflicts?

If you apply the same patches to your tree there should be no conflicts at all. git is able to resolve this automatically.

The commits will have different SHA1 hashes (commit id's). Having multiple "copies" of the same patch with separate id's is undesirable and completely avoidable. Immutable, shared branches resolve this issue.

Best regards,
Mike

Quoted 6 lines

Cheers,
--
Email: Herbert Xu <[email protected]> Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt