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Amlogic Meson (32-bit) .dts cleanups

PATCH New Martin Blumenstingl 2 participants 7 messages Apr 17, 2017 – May 26, 2017

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Martin Blumenstingl

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#0 lore raw

cover Amlogic Meson (32-bit) .dts cleanups

This series provides a few cleanups in the 32-bit Amlogic .dts files.

The first patch introduces the actual busses so the .dts' basic structure is similar to what we have in the 64-bit .dts files.

The second patch removes even more duplication by inheriting meson.dtsi from meson8b.dtsi (just like meson6.dtsi and meson8.dtsi are doing).

There should not be any functional changes with these patches. However, I was only test this on a Meson8 based device, so it would be great if somebody could test this on a Meson8b device.

Martin Blumenstingl (2):
ARM: dts: meson: organize devices in their corresponding busses
ARM: dts: meson8b: inherit meson.dtsi from meson8b.dtsi

 arch/arm/boot/dts/meson.dtsi   | 180 ++++++++++++++++++-----------------
 arch/arm/boot/dts/meson6.dtsi  |   2 -
 arch/arm/boot/dts/meson8.dtsi  | 116 +++++++++++++++--------
 arch/arm/boot/dts/meson8b.dtsi | 210 +++++++++++++++++------------------------
 4 files changed, 255 insertions(+), 253 deletions(-)
Signature · 1 line
2.12.2
author reviewer
#1 lore raw

PATCH 1/2 ARM: dts: meson: organize devices in their corresponding busses

The Amlogic Meson SoCs have most of the internal peripherals organized in busses. Use them to make the dts easier to read and to avoid duplicated register (bus) offset definitions.

The bus information is taken from the vendor kernel:

	#define IO_CBUS_PHY_BASE        0xc1100000  ///2M
	#define IO_AOBUS_PHY_BASE       0xc8100000  ///1M

There are more internal busses (such as the abp bus which seems to contain audio, HDMI and Mali registers), but since we don't have drivers for them yet these are not added (yet).

---
 arch/arm/boot/dts/meson.dtsi  | 180 ++++++++++++++++++++++--------------------
 arch/arm/boot/dts/meson6.dtsi |   2 -
 arch/arm/boot/dts/meson8.dtsi | 116 ++++++++++++++++++---------
 3 files changed, 171 insertions(+), 127 deletions(-)
arch/arm/boot/dts/meson.dtsi +93 -87
index 8c77c87660cd..9701bd1bc298 100644
@@ -65,110 +65,116 @@
 		#interrupt-cells = <3>;
 	};
 
-	timer at c1109940 {
-		compatible = "amlogic,meson6-timer";
-		reg = <0xc1109940 0x18>;
-		interrupts = <0 10 1>;
-	};
-
 	soc {
 		compatible = "simple-bus";
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges;
 
-		wdt: watchdog at c1109900 {
-			compatible = "amlogic,meson6-wdt";
-			reg = <0xc1109900 0x8>;
-			interrupts = <0 0 1>;
-		};
-
-		uart_AO: serial at c81004c0 {
-			compatible = "amlogic,meson-uart";
-			reg = <0xc81004c0 0x18>;
-			interrupts = <0 90 1>;
-			clocks = <&clk81>;
-			status = "disabled";
-		};
-
-		uart_A: serial at c11084c0 {
-			compatible = "amlogic,meson-uart";
-			reg = <0xc11084c0 0x18>;
-			interrupts = <0 26 1>;
-			clocks = <&clk81>;
-			status = "disabled";
-		};
-
-		uart_B: serial at c11084dc {
-			compatible = "amlogic,meson-uart";
-			reg = <0xc11084dc 0x18>;
-			interrupts = <0 75 1>;
-			clocks = <&clk81>;
-			status = "disabled";
-		};
-
-		uart_C: serial at c1108700 {
-			compatible = "amlogic,meson-uart";
-			reg = <0xc1108700 0x18>;
-			interrupts = <0 93 1>;
-			clocks = <&clk81>;
-			status = "disabled";
-		};
-
-		i2c_AO: i2c at c8100500 {
-			compatible = "amlogic,meson6-i2c";
-			reg = <0xc8100500 0x20>;
-			interrupts = <0 92 1>;
-			clocks = <&clk81>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			status = "disabled";
-		};
-
-		i2c_A: i2c at c1108500 {
-			compatible = "amlogic,meson6-i2c";
-			reg = <0xc1108500 0x20>;
-			interrupts = <0 21 1>;
-			clocks = <&clk81>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			status = "disabled";
-		};
-
-		i2c_B: i2c at c11087c0 {
-			compatible = "amlogic,meson6-i2c";
-			reg = <0xc11087c0 0x20>;
-			interrupts = <0 128 1>;
-			clocks = <&clk81>;
+		cbus: cbus at c1100000 {
+			compatible = "simple-bus";
+			reg = <0xc1100000 0x200000>;
 			#address-cells = <1>;
-			#size-cells = <0>;
-			status = "disabled";
+			#size-cells = <1>;
+			ranges = <0x0 0xc1100000 0x200000>;
+
+			uart_A: serial at 84c0 {
+				compatible = "amlogic,meson-uart";
+				reg = <0x84c0 0x18>;
+				interrupts = <0 26 1>;
+				status = "disabled";
+			};
+
+			uart_B: serial at 84dc {
+				compatible = "amlogic,meson-uart";
+				reg = <0x84dc 0x18>;
+				interrupts = <0 75 1>;
+				status = "disabled";
+			};
+
+			i2c_A: i2c at 8500 {
+				compatible = "amlogic,meson6-i2c";
+				reg = <0x8500 0x20>;
+				interrupts = <0 21 1>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+
+			uart_C: serial at 8700 {
+				compatible = "amlogic,meson-uart";
+				reg = <0x8700 0x18>;
+				interrupts = <0 93 1>;
+				status = "disabled";
+			};
+
+			i2c_B: i2c at 87c0 {
+				compatible = "amlogic,meson6-i2c";
+				reg = <0x87c0 0x20>;
+				interrupts = <0 128 1>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+
+			spifc: spi at 8c80 {
+				compatible = "amlogic,meson6-spifc";
+				reg = <0x8c80 0x80>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+
+			wdt: watchdog at 9900 {
+				compatible = "amlogic,meson6-wdt";
+				reg = <0x9900 0x8>;
+				interrupts = <0 0 1>;
+			};
+
+			timer at 9940 {
+				compatible = "amlogic,meson6-timer";
+				reg = <0x9940 0x18>;
+				interrupts = <0 10 1>;
+			};
 		};
 
-		ir_receiver: ir-receiver at c8100480 {
-			compatible= "amlogic,meson6-ir";
-			reg = <0xc8100480 0x20>;
-			interrupts = <0 15 1>;
-			status = "disabled";
-		};
-
-		spifc: spi at c1108c80 {
-			compatible = "amlogic,meson6-spifc";
-			reg = <0xc1108c80 0x80>;
+		aobus: aobus at c8100000 {
+			compatible = "simple-bus";
+			reg = <0xc8100000 0x100000>;
 			#address-cells = <1>;
-			#size-cells = <0>;
-			clocks = <&clk81>;
-			status = "disabled";
+			#size-cells = <1>;
+			ranges = <0x0 0xc8100000 0x100000>;
+
+			ir_receiver: ir-receiver at 480 {
+				compatible= "amlogic,meson6-ir";
+				reg = <0x480 0x20>;
+				interrupts = <0 15 1>;
+				status = "disabled";
+			};
+
+			uart_AO: serial at 4c0 {
+				compatible = "amlogic,meson-uart";
+				reg = <0x4c0 0x18>;
+				interrupts = <0 90 1>;
+				status = "disabled";
+			};
+
+			i2c_AO: i2c at 500 {
+				compatible = "amlogic,meson6-i2c";
+				reg = <0x500 0x20>;
+				interrupts = <0 92 1>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
 		};
 
 		ethmac: ethernet at c9410000 {
 			compatible = "amlogic,meson6-dwmac", "snps,dwmac";
 			reg = <0xc9410000 0x10000
-			       0xc1108108 0x4>;
+			0xc1108108 0x4>;
 			interrupts = <0 8 1>;
 			interrupt-names = "macirq";
-			clocks = <&clk81>;
-			clock-names = "stmmaceth";
 			status = "disabled";
 		};
 	};
arch/arm/boot/dts/meson6.dtsi +0 -2
index 8b33be15af94..b0fc91ffd6a1 100644
@@ -51,8 +51,6 @@
 	model = "Amlogic Meson6 SoC";
 	compatible = "amlogic,meson6";
 
-	interrupt-parent = <&gic>;
-
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
arch/arm/boot/dts/meson8.dtsi +78 -38

140 lines not on this page · raw message

Signature · 1 line
2.12.2
maintainer
#2 lore raw

PATCH 1/2 ARM: dts: meson: organize devices in their corresponding busses

Quoted 5 lines · Martin Blumenstingl

The Amlogic Meson SoCs have most of the internal peripherals organized in busses. Use them to make the dts easier to read and to avoid duplicated register (bus) offset definitions.

The bus information is taken from the vendor kernel:

Quoted 8 lines
	#define IO_CBUS_PHY_BASE        0xc1100000  ///2M
	#define IO_AOBUS_PHY_BASE       0xc8100000  ///1M

There are more internal busses (such as the abp bus which seems to contain audio, HDMI and Mali registers), but since we don't have drivers for them yet these are not added (yet).

I tested this series on my meson8b-odroidc1 and it boots fine.

Series looks fine to me, except...

[...]

arch/arm/boot/dts/meson.dtsi line 175

Quoted 6 lines
arch/arm/boot/dts/meson.dtsi +1 -1
 		ethmac: ethernet at c9410000 {
 			compatible = "amlogic,meson6-dwmac", "snps,dwmac";
 			reg = <0xc9410000 0x10000
-			       0xc1108108 0x4>;
+			0xc1108108 0x4>;

stray tab removal?

I fixed that up locally and applied to v4.13/dt64 branch.

Thanks for the patches!

Kevin

author reviewer
#3 lore raw

PATCH 1/2 ARM: dts: meson: organize devices in their corresponding busses

Quoted 23 lines · Kevin Hilman
Quoted 5 lines · Martin Blumenstingl

The Amlogic Meson SoCs have most of the internal peripherals organized in busses. Use them to make the dts easier to read and to avoid duplicated register (bus) offset definitions.

The bus information is taken from the vendor kernel:

Quoted 8 lines
      #define IO_CBUS_PHY_BASE        0xc1100000  ///2M
      #define IO_AOBUS_PHY_BASE       0xc8100000  ///1M

There are more internal busses (such as the abp bus which seems to contain audio, HDMI and Mali registers), but since we don't have drivers for them yet these are not added (yet).

I tested this series on my meson8b-odroidc1 and it boots fine.

Series looks fine to me, except...

[...]

Quoted 1 line
Quoted 7 lines

arch/arm/boot/dts/meson.dtsi line 175

Quoted 5 lines
              ethmac: ethernet at c9410000 {
                      compatible = "amlogic,meson6-dwmac", "snps,dwmac";
                      reg = <0xc9410000 0x10000
arch/arm/boot/dts/meson.dtsi +1 -1
-                            0xc1108108 0x4>;
+                     0xc1108108 0x4>;

stray tab removal?

oh, excellent catch - thank you!

Quoted 1 line

I fixed that up locally and applied to v4.13/dt64 branch.

nice, thank you!

do the ARM maintainers still want separate pull-requests for 32-bit and 64-bit .dts/defconfig/etc. changes?
you might want to move the three latest commits from v4.13/dt64 to v4.13/dt32 in that case, but this should be trivial (since these patches don't depend on anything else)

Quoted 1 line

Thanks for the patches!

you're welcome, hopefully more to follow!

Regards,
Martin

maintainer
#4 lore raw

PATCH 1/2 ARM: dts: meson: organize devices in their corresponding busses

Quoted 33 lines · Martin Blumenstingl
Quoted 23 lines · Kevin Hilman
Quoted 5 lines · Martin Blumenstingl

The Amlogic Meson SoCs have most of the internal peripherals organized in busses. Use them to make the dts easier to read and to avoid duplicated register (bus) offset definitions.

The bus information is taken from the vendor kernel:

Quoted 8 lines
      #define IO_CBUS_PHY_BASE        0xc1100000  ///2M
      #define IO_AOBUS_PHY_BASE       0xc8100000  ///1M

There are more internal busses (such as the abp bus which seems to contain audio, HDMI and Mali registers), but since we don't have drivers for them yet these are not added (yet).

I tested this series on my meson8b-odroidc1 and it boots fine.

Series looks fine to me, except...

[...]

Quoted 1 line
Quoted 7 lines

arch/arm/boot/dts/meson.dtsi line 175

Quoted 5 lines
              ethmac: ethernet at c9410000 {
                      compatible = "amlogic,meson6-dwmac", "snps,dwmac";
                      reg = <0xc9410000 0x10000
arch/arm/boot/dts/meson.dtsi +1 -1
-                            0xc1108108 0x4>;
+                     0xc1108108 0x4>;

stray tab removal?

oh, excellent catch - thank you!

Quoted 8 lines
Quoted 1 line

I fixed that up locally and applied to v4.13/dt64 branch.

nice, thank you!

do the ARM maintainers still want separate pull-requests for 32-bit and 64-bit .dts/defconfig/etc. changes?
you might want to move the three latest commits from v4.13/dt64 to v4.13/dt32 in that case, but this should be trivial (since these patches don't depend on anything else)

yes, you're right. I'll move them.

Kevin

author reviewer
#5 lore raw

PATCH 2/2 ARM: dts: meson8b: inherit meson.dtsi from meson8b.dtsi

In reply to Martin Blumenstingl

Currently only meson6.dtsi and meson8.dtsi inherit the generic meson.dtsi. However, since the Meson8b platform is basically a slightly updated version of Meson8 we can safely inherit meson.dtsi. An indicator for this are the nodes which are identical in meson.dtsi and meson8b.dtsi (L2, gic, timer, uart_AO, uart_A, uart_B, uart_C).

Additionally this makes the following devices available on Meson8b which were not avaialble before (however, since all affected drivers support Meson6, Meson8 and the whole GX series there's no reason to assume that they are not working):
- i2c_a and i2c_B
- the IR receiver
- SPFIC (SPI flash controller)
- the dwmac ethernet controller

Differences between Meson8 and Meson8b seem to be:
- ARM Cortex-A5 core instead of Cortex-A9 on Meson8
- dwmac on Meson8b supports RGMII
- small pinctrl updates

Inheriting meson.dtsi makes it easier to maintain by removing duplicate definitions.

---
 arch/arm/boot/dts/meson8b.dtsi | 210 +++++++++++++++++------------------------
 1 file changed, 84 insertions(+), 126 deletions(-)
arch/arm/boot/dts/meson8b.dtsi +84 -126
index 828aa49c678c..ef9ac974111c 100644
@@ -47,11 +47,9 @@
 #include <dt-bindings/clock/meson8b-clkc.h>
 #include <dt-bindings/gpio/meson8b-gpio.h>
 #include <dt-bindings/reset/amlogic,meson8b-reset.h>
-#include "skeleton.dtsi"
+#include "meson.dtsi"
 
 / {
-	interrupt-parent = <&gic>;
-
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
@@ -84,147 +82,107 @@
 			reg = <0x203>;
 		};
 	};
+}; /* end of / */
 
-	soc {
-		compatible = "simple-bus";
+&aobus {
+	pinctrl_aobus: pinctrl at 84 {
+		compatible = "amlogic,meson8b-aobus-pinctrl";
+		reg = <0x84 0xc>;
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges;
 
-		L2: l2-cache-controller at c4200000 {
-			compatible = "arm,pl310-cache";
-			reg = <0xc4200000 0x1000>;
-			cache-unified;
-			cache-level = <2>;
+		gpio_ao: ao-bank at 14 {
+			reg = <0x14 0x4>,
+				<0x2c 0x4>,
+				<0x24 0x8>;
+			reg-names = "mux", "pull", "gpio";
+			gpio-controller;
+			#gpio-cells = <2>;
+			gpio-ranges = <&pinctrl_aobus 0 130 16>;
 		};
 
-		gic: interrupt-controller at c4301000 {
-			compatible = "arm,cortex-a9-gic";
-			reg = <0xc4301000 0x1000>,
-			      <0xc4300100 0x0100>;
-			interrupt-controller;
-			#interrupt-cells = <3>;
-		};
-
-		reset: reset-controller at c1104404 {
-			compatible = "amlogic,meson8b-reset";
-			reg = <0xc1104404 0x20>;
-			#reset-cells = <1>;
-		};
-
-		wdt: watchdog at c1109900 {
-			compatible = "amlogic,meson8b-wdt";
-			reg = <0xc1109900 0x8>;
-			interrupts = <0 0 1>;
+		uart_ao_a_pins: uart_ao_a {
+			mux {
+				groups = "uart_tx_ao_a", "uart_rx_ao_a";
+				function = "uart_ao";
+			};
 		};
+	};
+};
 
-		timer at c1109940 {
-			compatible = "amlogic,meson6-timer";
-			reg = <0xc1109940 0x18>;
-			interrupts = <0 10 1>;
-		};
+&cbus {
+	clkc: clock-controller at 4000 {
+		#clock-cells = <1>;
+		compatible = "amlogic,meson8b-clkc";
+		reg = <0x8000 0x4>, <0x4000 0x460>;
+	};
 
-		uart_AO: serial at c81004c0 {
-			compatible = "amlogic,meson-uart";
-			reg = <0xc81004c0 0x18>;
-			interrupts = <0 90 1>;
-			clocks = <&clkc CLKID_CLK81>;
-			status = "disabled";
-		};
+	reset: reset-controller at 4404 {
+		compatible = "amlogic,meson8b-reset";
+		reg = <0x4404 0x20>;
+		#reset-cells = <1>;
+	};
 
-		uart_A: serial at c11084c0 {
-			compatible = "amlogic,meson-uart";
-			reg = <0xc11084c0 0x18>;
-			interrupts = <0 26 1>;
-			clocks = <&clkc CLKID_CLK81>;
-			status = "disabled";
-		};
+	pwm_ab: pwm at 8550 {
+		compatible = "amlogic,meson8b-pwm";
+		reg = <0x8550 0x10>;
+		#pwm-cells = <3>;
+		status = "disabled";
+	};
 
-		uart_B: serial at c11084dc {
-			compatible = "amlogic,meson-uart";
-			reg = <0xc11084dc 0x18>;
-			interrupts = <0 75 1>;
-			clocks = <&clkc CLKID_CLK81>;
-			status = "disabled";
-		};
+	pwm_cd: pwm at 8650 {
+		compatible = "amlogic,meson8b-pwm";
+		reg = <0x8650 0x10>;
+		#pwm-cells = <3>;
+		status = "disabled";
+	};
 
-		uart_C: serial at c1108700 {
-			compatible = "amlogic,meson-uart";
-			reg = <0xc1108700 0x18>;
-			interrupts = <0 93 1>;
-			clocks = <&clkc CLKID_CLK81>;
-			status = "disabled";
-		};
+	pwm_ef: pwm at 86c0 {
+		compatible = "amlogic,meson8b-pwm";
+		reg = <0x86c0 0x10>;
+		#pwm-cells = <3>;
+		status = "disabled";
+	};
 
-		clkc: clock-controller at c1104000 {
-			#clock-cells = <1>;
-			compatible = "amlogic,meson8b-clkc";
-			reg = <0xc1108000 0x4>, <0xc1104000 0x460>;
-		};
+	wdt: watchdog at 9900 {
+		compatible = "amlogic,meson8b-wdt";
+		reg = <0x9900 0x8>;
+		interrupts = <0 0 1>;
+	};
 
-		pwm_ab: pwm at 8550 {
-			compatible = "amlogic,meson8b-pwm";
-			reg = <0xc1108550 0x10>;
-			#pwm-cells = <3>;
-			status = "disabled";
-		};
+	pinctrl_cbus: pinctrl at 9880 {
+		compatible = "amlogic,meson8b-cbus-pinctrl";
+		reg = <0x9880 0x10>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
 
-		pwm_cd: pwm at 8650 {
-			compatible = "amlogic,meson8b-pwm";
-			reg = <0xc1108650 0x10>;
-			#pwm-cells = <3>;
-			status = "disabled";
+		gpio: banks at 80b0 {
+			reg = <0x80b0 0x28>,
+				<0x80e8 0x18>,
+				<0x8120 0x18>,
+				<0x8030 0x38>;
+			reg-names = "mux", "pull", "pull-enable", "gpio";
+			gpio-controller;
+			#gpio-cells = <2>;
+			gpio-ranges = <&pinctrl_cbus 0 0 130>;
 		};
+	};
+};
 
-		pwm_ef: pwm at 86c0 {
-			compatible = "amlogic,meson8b-pwm";
-			reg = <0xc11086c0 0x10>;
-			#pwm-cells = <3>;
-			status = "disabled";
-		};
+&uart_AO {
+	clocks = <&clkc CLKID_CLK81>;
+};
 
-		pinctrl_cbus: pinctrl at c1109880 {
-			compatible = "amlogic,meson8b-cbus-pinctrl";
-			reg = <0xc1109880 0x10>;
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges;
-
-			gpio: banks at c11080b0 {
-				reg = <0xc11080b0 0x28>,
-				      <0xc11080e8 0x18>,
-				      <0xc1108120 0x18>,
-				      <0xc1108030 0x38>;
-				reg-names = "mux", "pull", "pull-enable", "gpio";
-				gpio-controller;
-				#gpio-cells = <2>;
-				gpio-ranges = <&pinctrl_cbus 0 0 130>;
-			};
-		};
+&uart_A {
+	clocks = <&clkc CLKID_CLK81>;
+};
 
-		pinctrl_aobus: pinctrl at c8100084 {
-			compatible = "amlogic,meson8b-aobus-pinctrl";
-			reg = <0xc8100084 0xc>;
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges;
-
-			gpio_ao: ao-bank at c1108030 {
-				reg = <0xc8100014 0x4>,
-				      <0xc810002c 0x4>,
-				      <0xc8100024 0x8>;
-				reg-names = "mux", "pull", "gpio";
-				gpio-controller;
-				#gpio-cells = <2>;
-				gpio-ranges = <&pinctrl_aobus 0 130 16>;
-			};
+&uart_B {
+	clocks = <&clkc CLKID_CLK81>;
+};
 
-			uart_ao_a_pins: uart_ao_a {
-				mux {
-					groups = "uart_tx_ao_a", "uart_rx_ao_a";
-					function = "uart_ao";
-				};
-			};
-		};
-	};
-}; /* end of / */
+&uart_C {
+	clocks = <&clkc CLKID_CLK81>;
+};
Signature · 1 line
2.12.2
author reviewer
#6 lore raw

cover Amlogic Meson (32-bit) .dts cleanups

In reply to Martin Blumenstingl

Hi Kevin, Hi Carlo,

Quoted 17 lines · Martin Blumenstingl

This series provides a few cleanups in the 32-bit Amlogic .dts files.

The first patch introduces the actual busses so the .dts' basic structure is similar to what we have in the 64-bit .dts files.

The second patch removes even more duplication by inheriting meson.dtsi from meson8b.dtsi (just like meson6.dtsi and meson8.dtsi are doing).

There should not be any functional changes with these patches. However, I was only test this on a Meson8 based device, so it would be great if somebody could test this on a Meson8b device.

Martin Blumenstingl (2):
ARM: dts: meson: organize devices in their corresponding busses
ARM: dts: meson8b: inherit meson.dtsi from meson8b.dtsi

Quoted 9 lines
 arch/arm/boot/dts/meson.dtsi   | 180 ++++++++++++++++++-----------------
 arch/arm/boot/dts/meson6.dtsi  |   2 -
 arch/arm/boot/dts/meson8.dtsi  | 116 +++++++++++++++--------
 arch/arm/boot/dts/meson8b.dtsi | 210 +++++++++++++++++------------------------
 4 files changed, 255 insertions(+), 253 deletions(-)

--
2.12.2

unfortunately I don't have a Meson8b device where I could test this. can we let kernelci test this on the Odroid-C1? Meson8b can currently only boot ramdisks (no MMC, no USB, etc.) - so I think kernelci would catch all regressions (if there are any)