amlogic: GXBB: Add pin controller

From: Carlo Caione <[email protected]>

Patchset to add and enable the pin controller driver on a couple of Amlogic boards with a Meson GXBB SoC.

Please note that:

* This patch depends on http://www.spinics.net/lists/devicetree/msg120964.html
([PATCH] ARM64: dts: amlogic: Add hiu and periphs buses).

* The platform driver is still missing a lot of muxing configurations. This is because Amlogic still hasn't publicly released documentation for the GXBB. Since Kevin has already this documentation under NDA, he will integrate and complete this driver with a separate submission.

Carlo Caione (2):
pinctrl: amlogic: Add support for Amlogic Meson GXBB SoC
ARM64: dts: amlogic: Enable pin controller on GXBB-based platforms

 .../devicetree/bindings/pinctrl/meson,pinctrl.txt  |   2 +
 arch/arm64/Kconfig.platforms                       |   2 +
 .../arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts |  13 +
 arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi   |   2 +
 .../boot/dts/amlogic/meson-gxbb-vega-s95.dtsi      |   3 +
 arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi        |  41 ++
 drivers/pinctrl/meson/Makefile                     |   2 +-
 drivers/pinctrl/meson/pinctrl-meson-gxbb.c         | 432 +++++++++++++++++++++
 drivers/pinctrl/meson/pinctrl-meson.c              |   8 +
 drivers/pinctrl/meson/pinctrl-meson.h              |   2 +
 include/dt-bindings/gpio/meson-gxbb-gpio.h         | 154 ++++++++
 11 files changed, 660 insertions(+), 1 deletion(-)
 create mode 100644 drivers/pinctrl/meson/pinctrl-meson-gxbb.c
 create mode 100644 include/dt-bindings/gpio/meson-gxbb-gpio.h

2.7.4

From: Carlo Caione <[email protected]>

This patch adds the basic platform file to support the pin controller found on the Amlogic Meson GXBB SoCs.

---
 .../devicetree/bindings/pinctrl/meson,pinctrl.txt  |   2 +
 arch/arm64/Kconfig.platforms                       |   2 +
 drivers/pinctrl/meson/Makefile                     |   2 +-
 drivers/pinctrl/meson/pinctrl-meson-gxbb.c         | 432 +++++++++++++++++++++
 drivers/pinctrl/meson/pinctrl-meson.c              |   8 +
 drivers/pinctrl/meson/pinctrl-meson.h              |   2 +
 include/dt-bindings/gpio/meson-gxbb-gpio.h         | 154 ++++++++
 7 files changed, 601 insertions(+), 1 deletion(-)
 create mode 100644 drivers/pinctrl/meson/pinctrl-meson-gxbb.c
 create mode 100644 include/dt-bindings/gpio/meson-gxbb-gpio.h

index 32f4a2d..fe7fe0b 100644
@@ -5,6 +5,8 @@ Required properties for the root node:
 		      "amlogic,meson8b-cbus-pinctrl"
 		      "amlogic,meson8-aobus-pinctrl"
 		      "amlogic,meson8b-aobus-pinctrl"
+		      "amlogic,meson-gxbb-periphs-pinctrl"
+		      "amlogic,meson-gxbb-aobus-pinctrl"
  - reg: address and size of registers controlling irq functionality
 
 === GPIO sub-nodes ===

index 9fbc3e6..21e26e6 100644
@@ -58,6 +58,8 @@ config ARCH_MEDIATEK
 
 config ARCH_MESON
 	bool "Amlogic Platforms"
+	select PINCTRL
+	select PINCTRL_MESON
 	help
 	  This enables support for the Amlogic S905 SoCs.
 

index c751d22..24434f1 100644
@@ -1,2 +1,2 @@
-obj-y	+= pinctrl-meson8.o pinctrl-meson8b.o
+obj-y	+= pinctrl-meson8.o pinctrl-meson8b.o pinctrl-meson-gxbb.o
 obj-y	+= pinctrl-meson.o

index 0bdb8fd..cefb8cf 100644
@@ -549,6 +549,14 @@ static const struct of_device_id meson_pinctrl_dt_match[] = {
 		.compatible = "amlogic,meson8b-aobus-pinctrl",
 		.data = &meson8b_aobus_pinctrl_data,
 	},
+	{
+		.compatible = "amlogic,meson-gxbb-periphs-pinctrl",
+		.data = &meson_gxbb_periphs_pinctrl_data,
+	},
+	{
+		.compatible = "amlogic,meson-gxbb-aobus-pinctrl",
+		.data = &meson_gxbb_aobus_pinctrl_data,
+	},
 	{ },
 };
 

index 9c93e0d..d89442e 100644
@@ -199,3 +199,5 @@ extern struct meson_pinctrl_data meson8_cbus_pinctrl_data;
 extern struct meson_pinctrl_data meson8_aobus_pinctrl_data;
 extern struct meson_pinctrl_data meson8b_cbus_pinctrl_data;
 extern struct meson_pinctrl_data meson8b_aobus_pinctrl_data;
+extern struct meson_pinctrl_data meson_gxbb_periphs_pinctrl_data;
+extern struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data;

2.7.4

This thing conflicts with upstream. Make a separate patch for updating the bindings I think.

This needs to be split off and sent separatelt to the ARM64 maintainers. Since it's just a symbol dependency (I think?) it can be merged orthogonally.

This stuff I can merge, if I get it in a separate patch.

This patch is based on linux-next where the documentation is correctly updated (see 11ca8735) but apparently this is missing from upstream. Probably slipped through the cracks with the latest PR.

Kevin, did you merge both the commits in
https://patchwork.ozlabs.org/patch/603580/ or just the DT changes?

Ok

I'll split it in v2

yeah, trying to figure this out,

Thanks,

Carlo Caione

Yes, I just pulled your branch.

That pull was merged for v4.7, which is why it's in next, but not yet mainline (where v4.6 is just now being finalized.)

Kevin

From: Carlo Caione <[email protected]>

Update DTS and DTSI files to enable the pin controller. We also now support the blinking blue LED on the Odroid-C2.

---
 .../arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts | 13 +++++++
 arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi   |  2 ++
 .../boot/dts/amlogic/meson-gxbb-vega-s95.dtsi      |  3 ++
 arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi        | 41 ++++++++++++++++++++++
 4 files changed, 59 insertions(+)

index 7f2c674..41e1e66 100644
@@ -45,6 +45,7 @@
 /dts-v1/;
 
 #include "meson-gxbb.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 
 / {
 	compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb";

@@ -62,8 +63,20 @@
 		device_type = "memory";
 		reg = <0x0 0x0 0x0 0x80000000>;
 	};
+
+	leds {
+		compatible = "gpio-leds";
+		blue {
+			label = "c2:blue:alive";
+			gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "heartbeat";
+			default-state = "off";
+		};
+	};
 };
 
 &uart_AO {
 	status = "okay";
+	pinctrl-0 = <&uart_ao_a_pins>;
+	pinctrl-names = "default";
 };

index bf7ff1d..22e6298 100644
@@ -62,4 +62,6 @@
 /* This UART is brought out to the DB9 connector */
 &uart_AO {
 	status = "okay";
+	pinctrl-0 = <&uart_ao_a_pins>;
+	pinctrl-names = "default";
 };

index 012cdcc..54bb7c7 100644
@@ -56,4 +56,7 @@
 
 &uart_AO {
 	status = "okay";
+	pinctrl-0 = <&uart_ao_a_pins>;
+	pinctrl-names = "default";
+
 };

2.7.4

Yours,
Linus Walleij