CNS3xxx: Add SMP support
Subsystems (2)
PATCH 1/1 CNS3xxx: Add SMP support
Signed-off-by Krzysztof Ha?asa <[email protected]>
arch/arm/mach-cns3xxx/Kconfig +3 -0
@@ -3,6 +3,9 @@ menuconfig ARCH_CNS3XXX bool "Cavium Networks CNS3XXX family" depends on ARCH_MULTI_V6 select ARM_GIC + select HAVE_ARM_SCU if SMP + select HAVE_ARM_TWD + select HAVE_SMP help Support for Cavium Networks CNS3XXX platform.
arch/arm/mach-cns3xxx/Makefile +1 -0
@@ -4,3 +4,4 @@ cns3xxx-y += core.o pm.o cns3xxx-$(CONFIG_ATAGS) += devices.o cns3xxx-$(CONFIG_PCI) += pcie.o cns3xxx-$(CONFIG_MACH_CNS3420VB) += cns3420vb.o +cns3xxx-$(CONFIG_SMP) += platsmp.o headsmp.o
arch/arm/mach-cns3xxx/cns3420vb.c +1 -0
@@ -251,5 +251,6 @@ MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board") .init_time = cns3xxx_timer_init, .init_machine = cns3420_init, .init_late = cns3xxx_pcie_init_late, + .smp = smp_ops(cns3xxx_smp_ops), .restart = cns3xxx_restart,MACHINE_END
arch/arm/mach-cns3xxx/core.c +13 -0
@@ -17,6 +17,7 @@#include <linux/platform_device.h> #include <linux/usb/ehci_pdriver.h> #include <linux/usb/ohci_pdriver.h> +#include <asm/smp_twd.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/time.h>
@@ -26,6 +27,8 @@#include "core.h" #include "pm.h" +#define IRQ_LOCALTIMER 29 +static struct map_desc cns3xxx_io_desc[]__initdata = { { .virtual =CNS3XXX_TC11MP_SCU_BASE_VIRT ,
@@ -198,6 +201,15 @@ static struct irqaction cns3xxx_timer_irq = { .handler = cns3xxx_timer_interrupt, }; +static void __init cns3xxx_init_twd (void ) +{ + static DEFINE_TWD_LOCAL_TIMER(cns3xx_twd_local_timer, + CNS3XXX_TC11MP_TWD_BASE, + IRQ_LOCALTIMER); + +twd_local_timer_register (&cns3xx_twd_local_timer); +} +/* * Set up the clock source and clock events devices */
@@ -251,6 +263,7 @@ static void __init __cns3xxx_timer_init(unsigned int timer_irq)setup_irq (timer_irq, &cns3xxx_timer_irq);cns3xxx_clockevents_init (timer_irq); +cns3xxx_init_twd (); }void __init cns3xxx_timer_init (void )
arch/arm/mach-cns3xxx/core.h +1 -0
@@ -13,6 +13,7 @@#include <linux/reboot.h> +extern struct smp_operations cns3xxx_smp_ops;extern void cns3xxx_timer_init (void );#ifdef CONFIG_CACHE_L2X0
arch/arm/mach-cns3xxx/headsmp.S new file +39 -0
@@ -0,0 +1,39 @@ +/* + * Cloned from linux/arch/arm/mach-exynos/headsmp.S + * + * Copyright (c) 2003 ARM Limited + * All Rights Reserved + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include <linux/linkage.h> +#include <linux/init.h> + +/* + * CNS3XXX specific entry point for secondary CPUs. This provides + * a "holding pen" into which all secondary cores are held until we're + * ready for them to initialise. + */ +ENTRY(cns3xxx_secondary_startup) + mrc p15, 0, r0, c0, c0, 5 + and r0, r0, #15 + adr r4, 1f + ldmia r4, {r5, r6} + sub r4, r4, r5 + add r6, r6, r4 +pen: ldr r7, [r6] + cmp r7, r0 + bne pen + + /* + * we've been released from the holding pen: secondary_stack + * should now contain the SVC stack for this core + */ + b secondary_startup +ENDPROC(cns3xxx_secondary_startup) + + .align 2 +1: .long . + .long pen_release
arch/arm/mach-cns3xxx/platsmp.c new file +151 -0
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Signature · 4 lines
Krzysztof Halasa Industrial Research Institute for Automation and Measurements PIAP Al. Jerozolimskie 202, 02-486 Warsaw, Poland