kernel updated (relative to 2.3.99pre6)
PATCH 1/1 kernel updated (relative to 2.3.99pre6)
Attached below is the long overdue kernel update. The diff below is relative to the previous IA-64 kernel. A full diff relative to Linus's 2.3.99pre6 is at:
ftp://ftp.kernel.org/pub/linux/kernel/ports/ia64/
in file "linux-2.3.99-pre6-ia64-000525.diff.gz". Note: this kernel hasn't been tested in a lot of configurations so I'd not recommend to use it in a distribution (not without further testing at least). In particular, I haven't had time to test SMP. UP works fine on Big Sur and the HP simulator. The reason I'm making the patch available now is that we need to sync up with Linus's tree so if this patch happens not to work on some systems, not much is lost as I plan to put out a patch soon that brings us to 2.4-test1.
An updated kdb patch is available at:
ftp://ftp.hpl.hp.com/pub/linux-ia64/kdb-2.3.99-pre6-000525.diff.gz
The kdb patch is known not to work with SMP (it crashes in the boot with a "CPU already initialized" error; looks like it's a stupid problem, but I haven't had time to fix it; if someone could make this work again, it would be great).
Summary of changes:
o The big change this time is lots of new code to support full stack unwinding. This is fairly intricate stuff and the code is not 100% complete yet. For example, more debugging needs to be done, the memory/cache management is stupid, and SMP locking is missing. Having said that, I'm quite happy with how things are shaping up so far. It looks like we should be able to unwind both reliably and efficiently. the "backtrace" command in kdb works better than it ever did and there is complete support for all unwind directives (modulo bugs that is... ;-). The new unwind support is enabled only if CONFIG_IA64_NEW_UNWIND is turned on. Do NOT turn this on right now unless you have a toolchain that has all the unwind fixes applied (goes for gcc and gas). Without those fixes, the unwind info will be incorrect and things won't work properly.
As a consequence of this, I added unwind directives for all assembly files (I think I missed mca_asm.S though). Please be sure to keep this info in sync with the assembly code. For a description of the unwind directives, see the Assembly Reference Guide (available at http://developer.intel.com/design/ia64)
o Workaround for the global tlb flush hw erratum (Asit).
o Kernel module support (Stephen Zeisset).
o SIGFPE now passes ISR in the si_isr field of siginfo to permit user-level fp emulation/testing etc. (Goutham).
o Fixes to the emu10k1 sound driver (Bill, I think).
o New kernel option: if you have a CPU that has an A2 or later stepping, you can turn off CONFIG_ITANIUM_A1_SPECIFIC and enjoy reduced interrupt latency etc.
o Increased number of PCI busses to scan to 255 (the fix necessary to make this work come from Asit).
o Changes required for the AzusA platform (kouchi). Please note that I did not include the azusa_vectors table nor did I change the isa_irq_to_vector_map. For the former, please hack (or better
still: fix) the bootloader. For the latter, I think we need a better solution. Either we can find an ISA vector map that will work on all platforms or, if that's not possible, we'll need to assign the ISA vectors dynamically. Anyone want to take a stab at a clean solution for this?
o Timer-management related updated by Walt. I chose to use a different approach to handling "race conditions" with the itm. Basically, the new code turns off interrupts while checking if the itc is past the itm and additionally allows for a slack of 1000 cycles. Haven't done much experimenting with it, but I do think this should be the good way to reduce the number of spurious lost tick messages.
o IA-32 updates by Don and myself. Don, note that the IA-32 state-switching is now in ia32_support.c. I rearranged that code a little. I think it should be much faster now, but I haven't measured it.
o New header file <asm/asmmacro.h> defines a couple of convenience macros to assist in assembly programming.
o Remove support for old compilers that didn't know how to return things in r9, r10, and r11.
o ptrace updates in preparation for the new unwind code. Kevin, note that PT_PRI_UNAT now exists but it does NOT yet return the correct NaT bits. This will be one of the next things I'll work on.
o Fix execve() code so that running gdb on vmlinux and typing "run" no longer freezes the system. ;-)
That should be it. Please give it a spin and let me know how it works.
If someone is looking for a small but potentially interesting project:
in the SMP case, we currently do not implement a fine-grained gettimeofday(). This is easy to do if you're willing to do an IPI to the bootstrap processor on every gettimeofday(), but it seems to me we should be able to do better than that (a lot better, actually). Would be great if someone could come up with a great way of solving this issue (to get started, take a look at arch/ia64/kernel/time.c:gettimeoffset()).
Enjoy,
--david
arch/ia64/Makefile +4 -9
@@ -12,16 +12,11 @@ AWK := awk LINKFLAGS = -static -T arch/$(ARCH)/vmlinux.lds -# next line is for HP compiler backend: -#AFLAGS += -DGCC_RETVAL_POINTER_IN_R8 -# The next line is needed when compiling with the July snapshot of the Cygnus compiler: -#EXTRA = -D__GCC_DOESNT_KNOW_IN_REGS__ -# next two lines are for the September snapshot of the Cygnus compiler: -AFLAGS += -D__GCC_MULTIREG_RETVALS__ -Wa,-x -EXTRA = -D__GCC_MULTIREG_RETVALS__ +AFLAGS += -Wa,-x +EXTRA -#CFLAGS := $(CFLAGS) -pipe -mconstant-gp $(EXTRA) -Wa,-x -ffixed-r13 -mfixed-rangeñ0-f15,f32-f127 -CFLAGS := $(CFLAGS) -pipe $(EXTRA) -Wa,-x -ffixed-r13 -mfixed-rangeñ0-f15,f32-f127 +CFLAGS := $(CFLAGS) -pipe $(EXTRA) -Wa,-x -ffixed-r13 -mfixed-rangeñ0-f15,f32-f127 \ + -mconstant-gp -funwind-tables ifdef CONFIG_IA64_GENERIC CORE_FILES := arch/$(ARCH)/hp/hp.a \
arch/ia64/boot/Makefile +2 -1
@@ -25,7 +25,8 @@ all: $(TARGETS) bootloader: $(OBJECTS) - $(LD) $(LINKFLAGS) $(OBJECTS) $(LIBS) -o bootloader + $(LD) $(LINKFLAGS) $(OBJECTS) $(TOPDIR)/lib/lib.a $(TOPDIR)/arch/$(ARCH)/lib/lib.a \ + -o bootloader clean: rm -f $(TARGETS)
arch/ia64/config.in +3 -2
@@ -24,9 +24,9 @@ if [ "$CONFIG_IA64_DIG" = "y" ]; then bool ' Enable Itanium A-step specific code' CONFIG_ITANIUM_ASTEP_SPECIFIC bool ' Enable Itanium A1-step specific code' CONFIG_ITANIUM_A1_SPECIFIC + bool ' Enable use of global TLB purge instruction (ptc.g)' CONFIG_ITANIUM_PTCG bool ' Enable SoftSDV hacks' CONFIG_IA64_SOFTSDV_HACKS - bool ' Enable BigSur hacks' CONFIG_IA64_BIGSUR_HACKS - bool ' Enable Lion hacks' CONFIG_IA64_LION_HACKS + bool ' Enable AzusA hacks' CONFIG_IA64_AZUSA_HACKS bool ' Emulate PAL/SAL/EFI firmware' CONFIG_IA64_FW_EMU bool ' Enable IA64 Machine Check Abort' CONFIG_IA64_MCA fi
@@ -188,5 +188,6 @@ bool 'Turn on compare-and-exchange bug checking (slow!)' CONFIG_IA64_DEBUG_CMPXCHG bool 'Turn on irq debug checks (slow!)' CONFIG_IA64_DEBUG_IRQ bool 'Print possible IA64 hazards to console' CONFIG_IA64_PRINT_HAZARDS +bool 'Enable new unwind support' CONFIG_IA64_NEW_UNWIND endmenu
arch/ia64/dig/iosapic.c +29 -16
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arch/ia64/ia32/ia32_entry.S +32 -33
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arch/ia64/ia32/ia32_signal.c +4 -4
@@ -226,7 +226,7 @@/* Set up to return from userspace. If provided, use a stub already in userspace. */ - err |=__put_user (frame->retcode, &frame->pretcode); + err |=__put_user ((long )frame->retcode, &frame->pretcode);/* This is popl %eax ; movl $,%eax ; int $0x80 */ err |=__put_user (0xb858 , (short *)(frame->retcode+0 ));#define __IA32_NR_sigreturn 119
@@ -281,8 +281,8 @@ ? current->exec_domain->signal_invmap[sig] : sig), &frame->sig); - err |=__put_user (&frame->info, &frame->pinfo); - err |=__put_user (&frame->uc, &frame->puc); + err |=__put_user ((long )&frame->info, &frame->pinfo); + err |=__put_user ((long )&frame->uc, &frame->puc); err |=__copy_to_user (&frame->info, info,sizeof (*info));/* Create the ucontext. */
@@ -296,7 +296,7 @@ regs, set->sig[0]); err |=__copy_to_user (&frame->uc.uc_sigmask, set,sizeof (*set)); - err |=__put_user (frame->retcode, &frame->pretcode); + err |=__put_user ((long )frame->retcode, &frame->pretcode);/* This is movl $,%eax ; int $0x80 */ err |=__put_user (0xb8 , (char *)(frame->retcode+0 ));#define __IA32_NR_rt_sigreturn 173
arch/ia64/ia32/ia32_support.c +37 -0
@@ -16,6 +16,43 @@extern void die_if_kernel (char *str,struct pt_regs *regs,long err); +void +ia32_save_state (struct thread_struct *thread) +{ +unsigned long eflag, fsr, fcr, fir, fdr; + + asm ("mov %0=ar.eflag;" +"mov %1=ar.fsr;" +"mov %2=ar.fcr;" +"mov %3=ar.fir;" +"mov %4=ar.fdr" + :"=r" (eflag),"=r" (fsr),"=r" (fcr),"=r" (fir),"=r" (fdr)); + thread->eflag = eflag; + thread->fsr = fsr; + thread->fcr = fcr; + thread->fir = fir; + thread->fdr = fdr; +} + +void +ia32_load_state (struct thread_struct *thread) +{ +unsigned long eflag, fsr, fcr, fir, fdr; + + eflag = thread->eflag; + fsr = thread->fsr; + fcr = thread->fcr; + fir = thread->fir; + fdr = thread->fdr; + + asmvolatile ("mov ar.eflag=%0;" +"mov ar.fsr=%1;" +"mov ar.fcr=%2;" +"mov ar.fir=%3;" +"mov ar.fdr=%4" + ::"r" (eflag),"r" (fsr),"r" (fcr),"r" (fir),"r" (fdr)); +} +/* * Setup IA32 GDT and TSS */
arch/ia64/ia32/sys_ia32.c +368 -280
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arch/ia64/kernel/Makefile +3 -4
@@ -15,11 +15,10 @@ all: kernel.o head.o init_task.o O_TARGET := kernel.o -O_OBJS := acpi.o entry.o gate.o efi.o efi_stub.o irq.o irq_ia64.o irq_sapic.o ivt.o \ - pal.o pci-dma.o process.o perfmon.o ptrace.o sal.o sal_stub.o semaphore.o setup.o \ +O_OBJS := acpi.o entry.o gate.o efi.o efi_stub.o irq.o irq_ia64.o irq_sapic.o ivt.o \ + pal.o pci-dma.o process.o perfmon.o ptrace.o sal.o semaphore.o setup.o \ signal.o sys_ia64.o traps.o time.o unaligned.o unwind.o -#O_OBJS := fpreg.o -#OX_OBJS := ia64_ksyms.o +OX_OBJS := ia64_ksyms.o ifdef CONFIG_IA64_GENERIC O_OBJS += machvec.o
arch/ia64/kernel/acpi.c +5 -5
@@ -89,16 +89,16 @@#ifdef CONFIG_IA64_DIG acpi_entry_iosapic_t *iosapic = (acpi_entry_iosapic_t *) p;unsigned int ver, v; -int l, pins; +int l, max_pin; ver =iosapic_version (iosapic->address); - pins = (ver >>16 ) &0xff ; + max_pin = (ver >>16 ) &0xff ;printk ("IOSAPIC Version %x.%x: address 0x%lx IRQs 0x%x - 0x%x\n" , (ver &0xf0 ) >>4 , (ver &0x0f ), iosapic->address, - iosapic->irq_base, iosapic->irq_base + pins); + iosapic->irq_base, iosapic->irq_base + max_pin); -for (l =0 ; l < pins; l++) { +for (l =0 ; l <= max_pin; l++) { v = iosapic->irq_base + l;if (v <16 ) v =isa_irq_to_vector (v);
@@ -110,7 +110,7 @@iosapic_addr (v) = (unsigned long )ioremap (iosapic->address,0 ); iosapic_baseirq(v) = iosapic->irq_base; } -iosapic_init (iosapic->address); +iosapic_init (iosapic->address, iosapic->irq_base);#endif }
arch/ia64/kernel/efi_stub.S +13 -14
@@ -1,7 +1,8 @@ /* * EFI call stub. * - * Copyright (C) 1999 David Mosberger <[email protected]> + * Copyright (C) 1999-2000 Hewlett-Packard Co + * Copyright (C) 1999-2000 David Mosberger <[email protected]> * * This stub allows us to make EFI calls in physical mode with interrupts * turned off. We need this because we can't call SetVirtualMap() until
@@ -30,6 +31,7 @@ (IA64_PSR_BN) #include <asm/processor.h> +#include <asm/asmmacro.h> .text .psr abi64
@@ -44,8 +46,7 @@ * Inputs: * r16 = new psr to establish */ - .proc switch_mode -switch_mode: +ENTRY(switch_mode) { alloc r2=ar.pfs,0,0,0,0 rsm psr.i | psr.ic // disable interrupts and interrupt collection
@@ -83,7 +84,7 @@ ;; 1: mov rp=r14 br.ret.sptk.few rp - .endp switch_mode +END(switch_mode) /* * Inputs:
@@ -94,13 +95,12 @@ * r8 = EFI_STATUS returned by called function */ - .global efi_call_phys - .proc efi_call_phys -efi_call_phys: - - alloc loc0=ar.pfs,8,5,7,0 +GLOBAL_ENTRY(efi_call_phys) + UNW(.prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)) + alloc loc1=ar.pfs,8,5,7,0 ld8 r2=[in0],8 // load EFI function's entry point - mov loc1=rp + mov loc0=rp + UNW(.body) ;; mov loc2=gp // save global pointer mov loc4=ar.rsc // save RSE configuration
@@ -133,9 +133,8 @@ br.call.sptk.few rp=switch_mode // return to virtual mode .ret2: mov ar.rsc=loc4 // restore RSE configuration - mov ar.pfs=loc0 - mov rp=loc1 + mov ar.pfs=loc1 + mov rp=loc0 mov gp=loc2 br.ret.sptk.few rp - - .endp efi_call_phys +END(efi_call_phys)
arch/ia64/kernel/entry.S +77 -92
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