iosapic_vector struct in Linux IA64?

I am looking at an issue with Linux IA64, and the problem appears to be that the ioapic_vector struct (iosapic.h) has only room for one PCI/Bus/Dev/Func/Pin per PID entry...

Being PCI devices can share interrupts, How do you handle that with only one Entry? Being even the PIN is part of the entry, you could not even Tie INTA & INTC together.

Is anyone looking into this issue?

We have started looking at this problem. Please let me know if you have done anything on this.

Thanks,
Asit

From: "Mallick, Asit K" <[email protected]>
Subject: RE: [Linux-ia64] iosapic_vector struct in Linux IA64?

We are now implementing IRQ sharing code, but it's not complete.

---
Takayoshi Kouchi, NEC solutions

I am looking at an issue with Linux IA64, and the problem appears to be that the ioapic_vector struct (iosapic.h) has only room for one PCI/Bus/Dev/Func/Pin per PID entry...
Being PCI devices can share interrupts, How do you handle that with only one Entry? Being even the PIN is part of the entry, you could not even tie INTA & INTC together.
Is anyone looking into this issue? Has anyone been working on a fix?

I have been working on this issue and plan to get the changes incorporated in the next release.

Thanks,
Asit

Great! When is the "next release"?

From: "Mallick, Asit K" <[email protected]
<mailto:[email protected]> >
To: "'[email protected]'" <[email protected]
<mailto:[email protected]> >
Subject: RE: [Linux-ia64] iosapic_vector struct in Linux IA64?
Date: Tue, 24 Oct 2000 10:48:42 -0700

I have been working on this issue and plan to get the changes incorporated in the next release.

				Thanks,
				Asit


	> -----Original Message-----
	> From:	White, Charles [mailto:[email protected]]

<mailto:[mailto:[email protected]]>
> Sent: Monday, October 23, 2000 9:11 AM
> To: '[email protected]'
> Subject: [Linux-ia64] iosapic_vector struct in Linux IA64?
>
>
> I am looking at an issue with Linux IA64, and the problem > appears to be that
> the ioapic_vector struct (iosapic.h) has only room for one > PCI/Bus/Dev/Func/Pin per PID entry...
> Being PCI devices can share interrupts, How do you handle > that with only one
> Entry? Being even the PIN is part of the entry, you could > not even tie INTA
> & INTC together.
> Is anyone looking into this issue? Has anyone been working on a
fix?

	> 
	> 
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	> 

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