SMP TLB flushes
Is it correct that the SMP part of the SMP flushing code is still missing? I'm just noisy and I don't understand yet how the ia64 cpu is supposed to perform tlb flushes.
* ptc.g only gets the address and the size as parameters, but not a region id. What if cpu 1 (running kswapd, arbitrary thread context) wants to flush a page from another thread, and that thread is running on cpu 2?
* could you add a big warning to start_lazy_tlb [kernel/exit.c] that the function is unsafe?
Both ppc and ia64 scan the task list and assume that they can find each mm_struct. If someone actually uses start_lazy_tlb, then that would be incorrect.
Btw, the i386 tlb flush contained a single instruction race (read x, write y instead of write y, read x) and this was enough for corruptions
- I overlooked one problem with concurrent tlb flushes and thread switches.
Please cc me, I'm not subscribed to the list.
--
Manfred
As for the ptc.g, the region id comes from the region register that is selected through bits [63:61] of the address.
-----Original Message-----
From: Manfred Spraul [mailto:[email protected]]
Sent: Thursday, August 31, 2000 10:57 AM
To: [email protected]
Subject: [Linux-ia64] SMP TLB flushes
Is it correct that the SMP part of the SMP flushing code is still missing? I'm just noisy and I don't understand yet how the ia64 cpu is supposed to perform tlb flushes.
* ptc.g only gets the address and the size as parameters, but not a region id. What if cpu 1 (running kswapd, arbitrary thread context) wants to flush a page from another thread, and that thread is running on cpu 2?
* could you add a big warning to start_lazy_tlb [kernel/exit.c] that the function is unsafe?
Both ppc and ia64 scan the task list and assume that they can find each mm_struct. If someone actually uses start_lazy_tlb, then that would be incorrect.
Btw, the i386 tlb flush contained a single instruction race (read x, write y instead of write y, read x) and this was enough for corruptions
- I overlooked one problem with concurrent tlb flushes and thread switches.
Please cc me, I'm not subscribed to the list.
--
Manfred
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Quoted 1 line
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Quoted 1 line · Manfred Spraul
Manfred> * could you add a big warning to start_lazy_tlb Manfred> [kernel/exit.c] that the function is unsafe? Both ppc and Manfred> ia64 scan the task list and assume that they can find each Manfred> mm_struct. If someone actually uses start_lazy_tlb, then Manfred> that would be incorrect.
Why are you asking on the IA-64 list for this change? It's in a platform-independent file so it's up to Linus to decide what to do with that function. It's presently unused and if it's not safe, why not get rid of it?
--david
Hi,
ptc.g gets RID from bits 63:61 of the address used in the purge instruction.
Thanks
Goutham
-----Original Message-----
From: Manfred Spraul [mailto:[email protected]]
Sent: Thursday, August 31, 2000 10:57 AM
To: [email protected]
Subject: [Linux-ia64] SMP TLB flushes
Is it correct that the SMP part of the SMP flushing code is still missing? I'm just noisy and I don't understand yet how the ia64 cpu is supposed to perform tlb flushes.
* ptc.g only gets the address and the size as parameters, but not a region id. What if cpu 1 (running kswapd, arbitrary thread context) wants to flush a page from another thread, and that thread is running on cpu 2?
* could you add a big warning to start_lazy_tlb [kernel/exit.c] that the function is unsafe?
Both ppc and ia64 scan the task list and assume that they can find each mm_struct. If someone actually uses start_lazy_tlb, then that would be incorrect.
Btw, the i386 tlb flush contained a single instruction race (read x, write y instead of write y, read x) and this was enough for corruptions
- I overlooked one problem with concurrent tlb flushes and thread switches.
Please cc me, I'm not subscribed to the list.
--
Manfred
_______________________________________________
Linux-IA64 mailing list
[email protected]
http://lists.linuxia64.org/lists/listinfo/linux-ia64
Quoted 4 lines · [email protected] wrote:
As for the ptc.g, the region id comes from the region register that is selected through bits [63:61] of the address.
That means flush_tlb_range on SMP should
* acquire ptcg_lock
* change the region register to mm->...
* ptc.g
* restore the region register from current->active_mm->...
* release the spinlock.
Thanks for your answer,
Manfred