quick combo patch relative to 2.4.10+010924 ia64 patch
Subsystems (2)
PATCH 1/1 quick combo patch relative to 2.4.10+010924 ia64 patch
Below is a quick patch which collects the various small fixes that have been posted since the last kernel patch. It also contains a fairly major update to the ia32 subsystem. In particular, I redid the ia32 subsystem's mmap emulation. With this patch, you can run WINE with any page size, not just 4KB. In fact, the page size does not seem to make any noticable difference for WINE anymore, even though it does some tricky things which are (virtually) impossible to emulate accurately with a large page size (such as using both MAP_FIXED and MAP_SHARED on non-page aligned memory regions). The new mmap emulation prints a warning messages of the form:
COMMAND(PID): emulate_mmap() can't share contents of incongruent mmap COMMAND(PID): emulate_mmap() can't share head COMMAND(PID): emulate_mmap() can't share tail
when these problematic cases occur. Mind you, this doesn't necessarily mean that the program won't work, it's just a warning that there might be problems.
Also, I should say that I used WINE mostly as a nasty test case for the ia32 subsystem. The RPMS available from CodeWeavers worked best for me and with those, I was able to get stuff like wordpad, mspaint, cd player, and even Acrobat 4 to work. Stuff like Outlook Express, NetMeeting, Acrobat 5, TurboTax and Real Player would start up, but crash shortly afterwards. I have never used WINE on an x86 box, so it's possible that at least some of these problems are due to genuine WINE bugs and not due to ia32 emulation bugs. I don't really care about any of these apps, except for TurboTax. If someone got that one to work, now *that* would be more interesting...
On the Linux/x86 front, Civilization: Call to Power and Myth II Soulblighter now work, too. (No, I don't play these games, I just had the CDs which I bought in support of Loki and Linux desktop/gaming laying around and though I'd give them a try.)
Enjoy,
--david
arch/ia64/Makefile +2 -2
@@ -18,14 +18,14 @@ EXTRA CFLAGS := $(CFLAGS) -pipe $(EXTRA) -ffixed-r13 -mfixed-rangeñ0-f15,f32-f127 \ - -falign-functions2 --param max-inline-insns@0 + -falign-functions2 # -ffunction-sections CFLAGS_KERNEL := -mconstant-gp GCC_VERSION=$(shell $(CROSS_COMPILE)$(HOSTCC) -v 2>&1 | fgrep 'gcc version' | cut -f3 -d' ' | cut -f1 -d'.') ifneq ($(GCC_VERSION),2) - CFLAGS += -frename-registers + CFLAGS += -frename-registers --param max-inline-insns@0 endif ifeq ($(CONFIG_ITANIUM_BSTEP_SPECIFIC),y)
arch/ia64/ia32/binfmt_elf32.c +12 -25
@@ -72,7 +72,6 @@ ia64_elf32_init (struct pt_regs *regs) {struct vm_area_struct *vma; -int nr;/* * Map GDT and TSS below 4GB, where the processor can find them. We need to map
@@ -119,27 +118,6 @@up_write (¤t->mm->mmap_sem); } - nr =smp_processor_id (); - -/* Setup the segment selectors */ - regs->r16 = (__USER_DS <<16 ) | __USER_DS;/* ES = DS, GS, FS are zero */ - regs->r17 = (__USER_DS <<16 ) | __USER_CS;/* SS, CS; ia32_load_state() sets TSS and LDT */ - -/* Setup the segment descriptors */ - regs->r24 =IA32_SEG_UNSCRAMBLE (ia32_gdt[__USER_DS >>3 ]);/* ESD */ - regs->r27 =IA32_SEG_UNSCRAMBLE (ia32_gdt[__USER_DS >>3 ]);/* DSD */ - regs->r28 =0 ;/* FSD (null) */ - regs->r29 =0 ;/* GSD (null) */ - regs->r30 =IA32_SEG_UNSCRAMBLE (ia32_gdt[_LDT (nr)]);/* LDTD */ - -/* -* Setup GDTD. Note: GDTD is the descrambled version of the pseudo-descriptor -* format defined by Figure 3-11 "Pseudo-Descriptor Format" in the IA-32 -* architecture manual. -*/ - regs->r31 =IA32_SEG_UNSCRAMBLE (IA32_SEG_DESCRIPTOR (IA32_GDT_OFFSET ,IA32_PAGE_SIZE -1 ,0 , -0 ,0 ,0 ,0 ,0 ,0 )); -ia64_psr (regs)->ac =0 ;/* turn off alignment checking */ regs->loadrs =0 ;/*
@@ -160,10 +138,19 @@ current->thread.fcr =IA32_FCR_DEFAULT ; current->thread.fir =0 ; current->thread.fdr =0 ; - current->thread.csd =IA32_SEG_UNSCRAMBLE (ia32_gdt[__USER_CS >>3 ]); - current->thread.ssd =IA32_SEG_UNSCRAMBLE (ia32_gdt[__USER_DS >>3 ]); - current->thread.tssd =IA32_SEG_UNSCRAMBLE (ia32_gdt[_TSS (nr)]); +/* +* Setup GDTD. Note: GDTD is the descrambled version of the pseudo-descriptor +* format defined by Figure 3-11 "Pseudo-Descriptor Format" in the IA-32 +* architecture manual. +*/ + regs->r31 =IA32_SEG_UNSCRAMBLE (IA32_SEG_DESCRIPTOR (IA32_GDT_OFFSET ,IA32_PAGE_SIZE -1 ,0 , +0 ,0 ,0 ,0 ,0 ,0 )); +/* Setup the segment selectors */ + regs->r16 = (__USER_DS <<16 ) | __USER_DS;/* ES = DS, GS, FS are zero */ + regs->r17 = (__USER_DS <<16 ) | __USER_CS;/* SS, CS; ia32_load_state() sets TSS and LDT */ + +ia32_load_segment_descriptors (current);ia32_load_state (current); }
arch/ia64/ia32/ia32_entry.S +36 -25
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arch/ia64/ia32/ia32_ioctl.c +186 -156
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arch/ia64/ia32/ia32_ldt.c +4 -1
@@ -64,6 +64,7 @@ {struct ia32_modify_ldt_ldt_s ldt_info;__u64 entry; +int ret;if (bytecount !=sizeof (ldt_info))return -EINVAL ;
@@ -99,7 +100,9 @@* memory, but we still need to guard against out-of-memory, hence we must use * put_user(). */ -return __put_user (entry, (__u64 *)IA32_LDT_OFFSET + ldt_info.entry_number); + ret =__put_user (entry, (__u64 *)IA32_LDT_OFFSET + ldt_info.entry_number); +ia32_load_segment_descriptors (current); +return ret; }asmlinkage int
arch/ia64/ia32/ia32_signal.c +223 -0
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arch/ia64/ia32/ia32_support.c +39 -1
@@ -9,6 +9,7 @@* 06/16/00 A. Mallick added csd/ssd/tssd for ia32 thread context * 02/19/01 D. Mosberger dropped tssd; it's not needed * 09/14/01 D. Mosberger fixed memory management for gdt/tss page +* 09/29/01 D. Mosberger added ia32_load_segment_descriptors() */ #include <linux/kernel.h>
@@ -29,6 +30,40 @@struct page *ia32_shared_page[(2 *IA32_PAGE_SIZE +PAGE_SIZE -1 )/PAGE_SIZE ];unsigned long *ia32_gdt; +static unsigned long +load_desc (u16 selector) +{ +unsigned long *table, limit, index; + +if (!selector) +return 0 ; +if (selector &IA32_SEGSEL_TI ) { + table = (unsigned long *)IA32_LDT_OFFSET ; + limit =IA32_LDT_ENTRIES ; + }else { + table = ia32_gdt; + limit =IA32_PAGE_SIZE /sizeof (ia32_gdt[0 ]); + } + index = selector >>IA32_SEGSEL_INDEX_SHIFT ; +if (index > limit) +return 0 ; +return IA32_SEG_UNSCRAMBLE (table[index]); +} + +void +ia32_load_segment_descriptors (struct task_struct *task) +{ +struct pt_regs *regs =ia64_task_regs (task); + +/* Setup the segment descriptors */ + regs->r24 =load_desc (regs->r16 >>16 );/* ESD */ + regs->r27 =load_desc (regs->r16 >>0 );/* DSD */ + regs->r28 =load_desc (regs->r16 >>32 );/* FSD */ + regs->r29 =load_desc (regs->r16 >>48 );/* GSD */ + task->thread.csd =load_desc (regs->r17 >>0 );/* CSD */ + task->thread.ssd =load_desc (regs->r17 >>16 );/* SSD */ +} +void ia32_save_state (struct task_struct *t) {
@@ -78,9 +113,12 @@ current->thread.old_iob =ia64_get_kr (IA64_KR_IO_BASE );ia64_set_kr (IA64_KR_IO_BASE ,IA32_IOBASE ); -/* load TSS and LDT while preserving SS and CS: */ +/* LDT and TSS depend on CPU number, so they need to be reloaded on each context switch */ nr =smp_processor_id (); regs->r17 = (_TSS (nr) <<48 ) | (_LDT (nr) <<32 ) | (__u32 ) regs->r17; + + regs->r30 =IA32_SEG_UNSCRAMBLE (ia32_gdt[_LDT (nr)]);/* LDTD */ + current->thread.tssd =IA32_SEG_UNSCRAMBLE (ia32_gdt[_TSS (nr)]);/* TSSD */ }/*
arch/ia64/ia32/ia32_traps.c +26 -1
@@ -1,7 +1,12 @@/* -* IA32 exceptions handler +* IA-32 exception handlers * +* Copyright (C) 2000 Asit K. Mallick <[email protected]> +* Copyright (C) 2001 Hewlett-Packard Co +* David Mosberger-Tang <[email protected]> +/* * 06/16/00 A. Mallick added siginfo for most cases (close to IA32) +* 09/29/00 D. Mosberger added ia32_intercept() */ #include <linux/kernel.h>
@@ -9,6 +14,26 @@#include <asm/ia32.h> #include <asm/ptrace.h> + +int +ia32_intercept (struct pt_regs *regs,unsigned long isr) +{ +switch ((isr >>16 ) &0xff ) { +case 0 :/* Instruction intercept fault */ +case 3 :/* Locked Data reference fault */ +case 1 :/* Gate intercept trap */ +return -1 ; + +case 2 :/* System flag trap */ +if (((isr >>14 ) &0x3 ) >=2 ) { +/* MOV SS, POP SS instructions */ +ia64_psr (regs)->id =1 ; +return 0 ; + }else +return -1 ; + } +return -1 ; +}int ia32_exception (struct pt_regs *regs,unsigned long isr)
arch/ia64/ia32/sys_ia32.c +1204 -1401
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include/asm-ia64/ia32.h +45 -19
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Here is another patch for the ia32 subsystem: the case SHMAT falls through in sys32_ipc, but there is nothing that returns err to the caller.
arch/ia64/ia32/sys_ia32.c renamed from arch/ia64/ia32/sys_ia32.c.~1~ +1 -2
@@ -2575,8 +2575,7 @@return msgctl32 (first, second, (void *)AA (ptr));case SHMAT : - err =shmat32 (first, second, third, version, (void *)AA (ptr)); -break ; +return shmat32 (first, second, third, version, (void *)AA (ptr));case SHMDT :return sys_shmdt ((char *)AA (ptr));case SHMGET :
Andreas.
Signature · 4 lines
Andreas Schwab "And now for something [email protected] completely different." SuSE Labs, SuSE GmbH, Schanzäckerstr. 10, D-90443 Nürnberg Key fingerprint = 58CA 54C7 6D53 942B 1756 01D3 44D5 214B 8276 4ED5
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"David" = David Mosberger <[email protected]> writes:
David> Below is a quick patch which collects the various small fixes David> that have been posted since the last kernel patch.
While in the patchy mood; for those who are interested in playing with my QLA1280 patch, the latest version can be found at
http://www.wildopensource.com/~jes/linux - as of today, the latest release is 3.23.10.
3.23.10 fixes a bug that may make the driver work on big endian boxes again, but I don't have any PCI based big endian boxes here so I cannot test it.
Check the changelog at the beginning of the file for details on all the changes.
Cheers,
Jes