remove stale mmiob function
PATCH 1/1 remove stale mmiob function
The consensus on lkml was that devices should do reads from safe registers to ensure PIO write ordering, which means we no longer need mmiob. This patch removes the mmiob entries from the machine vector headers and io.h and updates the documentation about PIO ordering.
Thanks,
Jesse
include/asm-ia64/io.h +0 -18
@@ -69,22 +69,6 @@*/ #define __ia64_mf_a () __asm__ __volatile__ ("mf.a" ::: "memory") -/** -* __ia64_mmiob - I/O space memory barrier -* -* Acts as a memory mapped I/O barrier for platforms that queue writes to -* I/O space. This ensures that subsequent writes to I/O space arrive after -* all previous writes. For most ia64 platforms, this is a simple -* 'mf.a' instruction, so the address is ignored. For other platforms, -* the address may be required to ensure proper ordering of writes to I/O space -* since a 'dummy' read might be necessary to barrier the write operation. -*/ -static inline void -__ia64_mmiob (void ) -{ -__ia64_mf_a (); -} -static inline const unsigned long __ia64_get_io_port_base (void ) {
@@ -287,7 +271,6 @@#define __outb platform_outb#define __outw platform_outw#define __outl platform_outl -#define __mmiob platform_mmiob#define inb (p) __inb(p)#define inw (p) __inw(p)
@@ -301,7 +284,6 @@#define outsb (p,s,c) __outsb(p,s,c)#define outsw (p,s,c) __outsw(p,s,c)#define outsl (p,s,c) __outsl(p,s,c) -#define mmiob () __mmiob()/* * The address passed to these functions are ioremap()ped already.
include/asm-ia64/machvec.h +0 -7
@@ -61,7 +61,6 @@typedef void ia64_mv_outb_t (unsigned char ,unsigned long );typedef void ia64_mv_outw_t (unsigned short ,unsigned long );typedef void ia64_mv_outl_t (unsigned int ,unsigned long ); -typedef void ia64_mv_mmiob_t (void );extern void machvec_noop (void );
@@ -110,7 +109,6 @@# define platform_outb ia64_mv.outb# define platform_outw ia64_mv.outw# define platform_outl ia64_mv.outl -# define platofrm_mmiob ia64_mv.mmiob# endif /* __attribute__((__aligned__(16))) is required to make size of the
@@ -149,7 +147,6 @@ia64_mv_outb_t *outb;ia64_mv_outw_t *outw;ia64_mv_outl_t *outl; -ia64_mv_mmiob_t *mmiob; } __attribute__((__aligned__(16)));#define MACHVEC_INIT (name) \
@@ -184,7 +181,6 @@ platform_outb, \ platform_outw, \ platform_outl, \ - platform_mmiob \ } extern struct ia64_machine_vector ia64_mv;
@@ -299,9 +295,6 @@#endif #ifndef platform_outl# define platform_outl __ia64_outl -#endif -#ifndef platform_mmiob -# define platform_mmiob __ia64_mmiob#endif #endif /* _ASM_IA64_MACHVEC_H */
include/asm-ia64/machvec_init.h +0 -1
@@ -16,7 +16,6 @@extern ia64_mv_outb_t __ia64_outb;extern ia64_mv_outw_t __ia64_outw;extern ia64_mv_outl_t __ia64_outl; -extern ia64_mv_mmiob_t __ia64_mmiob;#define MACHVEC_HELPER (name) \ struct ia64_machine_vector machvec_##name __attribute__ ((unused, __section__ (".machvec"))) \
include/asm-ia64/machvec_sn1.h +0 -2
@@ -44,7 +44,6 @@extern ia64_mv_outb_t sn1_outb;extern ia64_mv_outw_t sn1_outw;extern ia64_mv_outl_t sn1_outl; -extern ia64_mv_mmiob_t sn_mmiob;extern ia64_mv_pci_alloc_consistent sn1_pci_alloc_consistent;extern ia64_mv_pci_free_consistent sn1_pci_free_consistent;extern ia64_mv_pci_map_single sn1_pci_map_single;
@@ -74,7 +73,6 @@#define platform_outb sn1_outb#define platform_outw sn1_outw#define platform_outl sn1_outl -#define platform_mmiob sn_mmiob#define platform_pci_dma_init machvec_noop#define platform_pci_alloc_consistent sn1_pci_alloc_consistent#define platform_pci_free_consistent sn1_pci_free_consistent
include/asm-ia64/machvec_sn2.h +0 -2
@@ -47,7 +47,6 @@extern ia64_mv_outb_t sn_outb;extern ia64_mv_outw_t sn_outw;extern ia64_mv_outl_t sn_outl; -extern ia64_mv_mmiob_t sn2_mmiob;extern ia64_mv_pci_alloc_consistent sn_pci_alloc_consistent;extern ia64_mv_pci_free_consistent sn_pci_free_consistent;extern ia64_mv_pci_map_single sn_pci_map_single;
@@ -78,7 +77,6 @@#define platform_outb sn_outb#define platform_outw sn_outw#define platform_outl sn_outl -#define platform_mmiob sn2_mmiob#define platform_irq_desc sn_irq_desc#define platform_irq_to_vector sn_irq_to_vector#define platform_local_vector_to_irq sn_local_vector_to_irq
Documentation/mmio_barrier.txt deleted +0 -15
@@ -1,15 +0,0 @@ -On some platforms, so-called memory-mapped I/O is weakly ordered. For -example, the following might occur: - -CPU A writes 0x1 to Device #1 -CPU B writes 0x2 to Device #1 -Device #1 sees 0x2 -Device #1 sees 0x1 - -On such platforms, driver writers are responsible for ensuring that I/O -writes to memory-mapped addresses on their device arrive in the order -intended. The mmiob() macro is provided for this purpose. A typical use -of this macro might be immediately prior to the exit of a critical -section of code proteced by spinlocks. This would ensure that subsequent -writes to I/O space arrived only after all prior writes (much like a -typical memory barrier op, mb(), only with respect to I/O).
Documentation/io_ordering.txt new file +47 -0
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