avoid a layer of indirection in SN2 pci config space access
PATCH 1/1 avoid a layer of indirection in SN2 pci config space access
only one instead of two filesystems lookup for config space access now.. The code still is a total mess, but I don't want to touch the lower levels right now as the SGI I/O group wants to keep it in sync with IRIX.
arch/ia64/sn/io/machvec/pci.c +34 -29
@@ -1,6 +1,5 @@ -/* -* -* SNI64 specific PCI support for SNI IO. +/* +* PCI config space access glue for SN2. * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive
@@ -8,47 +7,43 @@* * Copyright (c) 1997, 1998, 2000-2003 Silicon Graphics, Inc. All rights reserved. */ -#include <linux/init.h> -#include <linux/types.h> -#include <linux/config.h> +#include <linux/pci.h> #include <asm/sn/types.h> -#include <asm/sn/sgi.h> -#include <asm/sn/io.h> -#include <asm/sn/driver.h> -#include <asm/sn/iograph.h> -#include <asm/param.h> -#include <asm/sn/pio.h> -#include <asm/sn/xtalk/xwidget.h> -#include <asm/sn/sn_private.h> -#include <asm/sn/addrs.h> -#include <asm/sn/invent.h> -#include <asm/sn/hcl.h> -#include <asm/sn/hcl_util.h> -#include <asm/sn/pci/pciio.h> -#include <asm/sn/pci/pcibr.h> #include <asm/sn/pci/pcibr_private.h> -#include <asm/sn/pci/bridge.h> + + +extern vertex_hdl_t devfn_to_vertex (unsigned char bus,unsigned char devfn);/* * These routines are only used during sn_pci_init for probing each bus, and * can probably be removed with a little more cleanup now that the SAL routines * work on sn2. */ -extern vertex_hdl_t devfn_to_vertex (unsigned char bus,unsigned char devfn); -int sn_read_config (struct pci_bus *bus,unsigned int devfn,int where,int size,u32 *val) { -unsigned long res =0 ;vertex_hdl_t device_vertex; +uint64_t value =0 ; +unsigned shift =0 ; device_vertex =devfn_to_vertex (bus->number, devfn); -if (!device_vertex)return PCIBIOS_DEVICE_NOT_FOUND ; - res =pciio_config_get (device_vertex, (unsigned )where, size); - *val = (u32 )res; +while (size >0 ) { +unsigned biw =4 - (where&3 ); + +if (biw > size) + biw = size; + + value |=pcibr_config_get (device_vertex, where, biw) << shift; + + shift +=8 *biw; + where += biw; + size -= biw; + } + + *val = (u32 )value;return PCIBIOS_SUCCESSFUL ; }
@@ -57,11 +52,21 @@vertex_hdl_t device_vertex; device_vertex =devfn_to_vertex (bus->number, devfn); -if (!device_vertex)return PCIBIOS_DEVICE_NOT_FOUND ; -pciio_config_set (device_vertex, (unsigned )where, size, (uint64_t )val); +while (size >0 ) { +unsigned biw =4 - (where&3 ); + +if (biw > size) + biw = size; + +pcibr_config_set (device_vertex, where, biw, (u_int64_t )val); + where += biw; + size -= biw; + val >>= biw *8 ; + } +return PCIBIOS_SUCCESSFUL ; }
arch/ia64/sn/io/sn2/pciio.c +0 -59
65 lines not on this page · raw message