kill pciio_provider*

diff -Nru a/arch/ia64/sn/io/sn2/pcibr/pcibr_dvr.c b/arch/ia64/sn/io/sn2/pcibr/pcibr_dvr.c
@@ -214,8 +214,6 @@
 extern int              pcibr_dmawr_error(pcibr_soft_t, int, ioerror_mode_t, ioerror_t *);
 extern int              pcibr_error_handler(error_handler_arg_t, int, ioerror_mode_t, ioerror_t *);
 extern int              pcibr_error_handler_wrapper(error_handler_arg_t, int, ioerror_mode_t, ioerror_t *);
-void                    pcibr_provider_startup(vertex_hdl_t);
-void                    pcibr_provider_shutdown(vertex_hdl_t);
 
 int                     pcibr_reset(vertex_hdl_t);
 pciio_endian_t          pcibr_endian_set(vertex_hdl_t, pciio_endian_t, pciio_endian_t);

@@ -957,9 +955,6 @@
     rc = hwgraph_path_add(xconn_vhdl, EDGE_LBL_PCI, &pcibr_vhdl);
     ASSERT(rc = GRAPH_SUCCESS);
 
-    pciio_provider_register(pcibr_vhdl, &pcibr_provider);
-    pciio_provider_startup(pcibr_vhdl);
-
     return pcibr_attach2(xconn_vhdl, bridge, pcibr_vhdl, 0, NULL);
 }
 

@@ -3631,17 +3626,6 @@
 /* ==================================  *    CONFIGURATION MANAGEMENT
  */
-/*ARGSUSED */
-void
-pcibr_provider_startup(vertex_hdl_t pcibr)
-{
-}
-
-/*ARGSUSED */
-void
-pcibr_provider_shutdown(vertex_hdl_t pcibr)
-{
-}
 
 int
 pcibr_reset(vertex_hdl_t conn)

@@ -3933,47 +3917,6 @@
 
     return(percent_allowed);
 }
-
-pciio_provider_t        pcibr_provider -{
-    (pciio_piomap_alloc_f *) pcibr_piomap_alloc,
-    (pciio_piomap_free_f *) pcibr_piomap_free,
-    (pciio_piomap_addr_f *) pcibr_piomap_addr,
-    (pciio_piomap_done_f *) pcibr_piomap_done,
-    (pciio_piotrans_addr_f *) pcibr_piotrans_addr,
-    (pciio_piospace_alloc_f *) pcibr_piospace_alloc,
-    (pciio_piospace_free_f *) pcibr_piospace_free,
-
-    (pciio_dmamap_alloc_f *) pcibr_dmamap_alloc,
-    (pciio_dmamap_free_f *) pcibr_dmamap_free,
-    (pciio_dmamap_addr_f *) pcibr_dmamap_addr,
-    (pciio_dmamap_done_f *) pcibr_dmamap_done,
-    (pciio_dmatrans_addr_f *) pcibr_dmatrans_addr,
-    (pciio_dmamap_drain_f *) pcibr_dmamap_drain,
-    (pciio_dmaaddr_drain_f *) pcibr_dmaaddr_drain,
-    (pciio_dmalist_drain_f *) pcibr_dmalist_drain,
-
-    (pciio_intr_alloc_f *) pcibr_intr_alloc,
-    (pciio_intr_free_f *) pcibr_intr_free,
-    (pciio_intr_connect_f *) pcibr_intr_connect,
-    (pciio_intr_disconnect_f *) pcibr_intr_disconnect,
-    (pciio_intr_cpu_get_f *) pcibr_intr_cpu_get,
-
-    (pciio_provider_startup_f *) pcibr_provider_startup,
-    (pciio_provider_shutdown_f *) pcibr_provider_shutdown,
-    (pciio_reset_f *) pcibr_reset,
-    (pciio_write_gather_flush_f *) pcibr_write_gather_flush,
-    (pciio_endian_set_f *) pcibr_endian_set,
-    (pciio_priority_set_f *) pcibr_priority_set,
-    (pciio_config_get_f *) pcibr_config_get,
-    (pciio_config_set_f *) pcibr_config_set,
-    (pciio_error_devenable_f *) 0,
-    (pciio_error_extract_f *) 0,
-    (pciio_driver_reg_callback_f *) 0,
-    (pciio_driver_unreg_callback_f *) 0,
-    (pciio_device_unregister_f 	*) pcibr_device_unregister,
-    (pciio_dma_enabled_f		*) pcibr_dma_enabled,
-};
 
 int
 pcibr_dma_enabled(vertex_hdl_t pconn_vhdl)

diff -Nru a/arch/ia64/sn/io/sn2/pcibr/pcibr_slot.c b/arch/ia64/sn/io/sn2/pcibr/pcibr_slot.c
@@ -280,7 +280,6 @@
 #if defined(SUPPORT_PRINTING_V_FORMAT)
     sprintf(funcp->resp_f_master_name, "%v", pcibr_info->f_master);
 #endif
-    funcp->resp_f_pops = pcibr_info->f_pops;
     funcp->resp_f_efunc = pcibr_info->f_efunc;
     funcp->resp_f_einfo = pcibr_info->f_einfo;
 

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diff -Nru a/include/asm-ia64/sn/pci/pcibr.h b/include/asm-ia64/sn/pci/pcibr.h
@@ -62,21 +62,6 @@
 extern int		pcibr_attach(vertex_hdl_t);
 
 /* ==================================- *    bus provider function table
- *
- *	Normally, this table is only handed off explicitly
- *	during provider initialization, and the PCI generic
- *	layer will stash a pointer to it in the vertex; however,
- *	exporting it explicitly enables a performance hack in
- *	the generic PCI provider where if we know at compile
- *	time that the only possible PCI provider is a
- *	pcibr, we can go directly to this ops table.
- */
-
-extern pciio_provider_t pcibr_provider;
-extern pciio_provider_t pci_pic_provider;
-
-/* ==================================  *    secondary entry points: pcibr PCI bus provider
  *
  *	These functions are normally exported explicitly by

@@ -451,7 +436,6 @@
         char                    resp_f_slot;
         char                    resp_f_func;
         char                    resp_f_master_name[MAXDEVNAME];
-        void                   *resp_f_pops;
         error_handler_f        *resp_f_efunc;
         error_handler_arg_t     resp_f_einfo;
         int                     resp_f_vendor;

diff -Nru a/include/asm-ia64/sn/pci/pcibr_private.h b/include/asm-ia64/sn/pci/pcibr_private.h
@@ -222,7 +222,6 @@
 #define	f_device	f_c.c_device	/* PCI card "device" code */
 #define	f_master	f_c.c_master	/* PCI bus provider */
 #define	f_mfast		f_c.c_mfast	/* cached fastinfo from c_master */
-#define	f_pops		f_c.c_pops	/* cached provider from c_master */
 #define	f_efunc		f_c.c_efunc	/* error handling function */
 #define	f_einfo		f_c.c_einfo	/* first parameter for efunc */
 #define f_window        f_c.c_window    /* state of BASE regs */

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diff -Nru a/include/asm-ia64/sn/pci/pciio_private.h b/include/asm-ia64/sn/pci/pciio_private.h
@@ -108,7 +108,6 @@
     pciio_device_id_t       c_device;	/* PCI card "device" code */
     vertex_hdl_t            c_master;	/* PCI bus provider */
     arbitrary_info_t        c_mfast;	/* cached fastinfo from c_master */
-    pciio_provider_t       *c_pops;	/* cached provider from c_master */
     error_handler_f        *c_efunc;	/* error handling function */
     error_handler_arg_t     c_einfo;	/* first parameter for efunc */
 

diff -Nru a/include/asm-ia64/sn/pci/pic.h b/include/asm-ia64/sn/pci/pic.h
@@ -77,21 +77,6 @@
 
 
 /*********************************************************************
- *    bus provider function table
- *
- *	Normally, this table is only handed off explicitly
- *	during provider initialization, and the PCI generic
- *	layer will stash a pointer to it in the vertex; however,
- *	exporting it explicitly enables a performance hack in
- *	the generic PCI provider where if we know at compile
- *	time that the only possible PCI provider is a
- *	pcibr, we can go directly to this ops table.
- */
-
-extern pciio_provider_t pci_pic_provider;
-
-
-/*********************************************************************
  * misc defines
  *
  */