b43: N-PHY: update TODOs in init part

index 015da44..6479d6e 100644
@@ -425,8 +425,10 @@ int b43_phy_initn(struct b43_wldev *dev)
 	struct ssb_bus *bus = dev->dev->bus;
 	struct b43_phy *phy = &dev->phy;
 	struct b43_phy_n *nphy = phy->n;
+	u8 tx_pwr_state;
 	u16 tmp;
 	enum ieee80211_band tmp2;
+	bool do_rssi_cal;
 
 	u16 clip[2];
 	bool do_cal = false;

@@ -503,35 +505,54 @@ int b43_phy_initn(struct b43_wldev *dev)
 	}
 
 	b43_nphy_workarounds(dev);
-	b43_nphy_reset_cca(dev);
 
-	ssb_write32(dev->dev, SSB_TMSLOW,
-		    ssb_read32(dev->dev, SSB_TMSLOW) | B43_TMSLOW_MACPHYCLKEN);
+	//TODO N PHY BMAC Clock FGC with argument 1
+	b43_nphy_reset_cca(dev);
+	//TODO N PHY BMAC Clock FGC with argument 0
+	//TODO N PHY MAC PHY Clock Set with argument 1
+	//TODO Disable PA Override
 	b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RX2TX);
 	b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
+	//TODO Turn on PA override
+	//TODO N PHY Classifier with arguments 0 and 0
+	//TODO N PHY Det Clip with 0 and the clip array as arguments
+	tx_pwr_state = nphy->txpwrctrl;
+	//TODO N PHY TX power control with argument 0 (turning off power control)
+	//TODO Fix the TX Power Settings
+	//TODO N PHY TX Power Control Idle TSSI
+	//TODO N PHY TX Power Control Setup
+
+	if (phy->rev >= 3) {
+		//TODO
+	} else {
+		//TODO Write an N PHY table with ID 26, length 128, offset 192, width 32, and the data from Rev 2 TX Power Control Table
+		//TODO Write an N PHY table with ID 27, length 128, offset 192, width 32, and the data from Rev 2 TX Power Control Table
+	}
+
+	if (nphy->phyrxchain != 3)
+		//TODO N PHY RX Core Set State with phyrxchain as argument
+	if (nphy->mphase_cal_phase_id > 0)
+		//TODO PHY Periodic Calibration Multi-Phase Restart
+
+	do_rssi_cal = false;
+	if (phy->rev >= 3) {
+		//TODO
+	} else {
+		//TODO
+	}
+
+	if (!((nphy->measure_hold & 0x6) != 0)) {
+		//TODO
+	}
 
-	b43_phy_read(dev, B43_NPHY_CLASSCTL); /* dummy read */
-	//TODO read core1/2 clip1 thres regs
-
-	if (1 /* FIXME Band is 2.4GHz */)
-		b43_nphy_bphy_init(dev);
-	//TODO disable TX power control
-	//TODO Fix the TX power settings
-	//TODO Init periodic calibration with reason 3
-	b43_nphy_rssi_cal(dev, 2);
-	b43_nphy_rssi_cal(dev, 0);
-	b43_nphy_rssi_cal(dev, 1);
-	//TODO get TX gain
-	//TODO init superswitch
-	//TODO calibrate LO
-	//TODO idle TSSI TX pctl
-	//TODO TX power control power setup
-	//TODO table writes
-	//TODO TX power control coefficients
-	//TODO enable TX power control
-	//TODO control antenna selection
-	//TODO init radar detection
-	//TODO reset channel if changed
+	//TODO N PHY TX Power Control Coef Setup
+	//TODO N PHY TX Power Control Enable with argument tx_pwr_state
+	b43_phy_write(dev, B43_NPHY_TXMACIF_HOLDOFF, 0x0015);
+	b43_phy_write(dev, B43_NPHY_TXMACDELAY, 0x0320);
+	if (phy->rev >= 3 && phy->rev <= 6)
+		b43_phy_write(dev, B43_NPHY_PLOAD_CSENSE_EXTLEN, 0x0014);
+	//TODO N PHY TX LP FBW
+	//TODO N PHY Spur Workaround
 
 	b43err(dev->wl, "IEEE 802.11n devices are not supported, yet.\n");
 	return 0;

index 8f174b7..e5e402a 100644
@@ -925,7 +925,19 @@
 struct b43_wldev;
 
 struct b43_phy_n {
+	u8 txpwrctrl;
+	u8 measure_hold;
+	u8 phyrxchain;
+	u8 mphase_cal_phase_id;
 	u32 deaf_count;
+	bool mute;
+
+	u8 iqcal_chanspec_2G;
+	u8 rssical_chanspec_2G;
+
+	u8 iqcal_chanspec_5G;
+	u8 rssical_chanspec_5G;
+
 	bool crsminpwr_adjusted;
 	bool noisevars_adjusted;
 

89 lines not on this page · raw message

index 8f174b7..e5e402a 100644
@@ -925,7 +925,19 @@
 struct b43_wldev;
 
 struct b43_phy_n {
+	u8 txpwrctrl;
+	u8 measure_hold;
+	u8 phyrxchain;
+	u8 mphase_cal_phase_id;
 	u32 deaf_count;
+	bool mute;
+
+	u8 iqcal_chanspec_2G;
+	u8 rssical_chanspec_2G;
+
+	u8 iqcal_chanspec_5G;
+	u8 rssical_chanspec_5G;
+
 	bool crsminpwr_adjusted;
 	bool noisevars_adjusted;