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added Mercury EP2500 board support It uses the mcf5282 processor with real time clock and EEPROM.

PATCH New David Wu 2 participants 2 messages Apr 9, 2010 – Apr 10, 2010

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David Wu

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#0 lore raw

PATCH 2/6 added Mercury EP2500 board support It uses the mcf5282 processor with real time clock and EEPROM.

---
    board/Mercury/ep2500/Makefile   |   44 ++++++
    board/Mercury/ep2500/config.mk  |   23 +++
    board/Mercury/ep2500/ep2500.c   |  191 +++++++++++++++++++++++++
    board/Mercury/ep2500/u-boot.lds |  140 ++++++++++++++++++
    include/configs/EP2500.h        |  297
+++++++++++++++++++++++++++++++++++++++
    5 files changed, 695 insertions(+), 0 deletions(-)
    create mode 100644 board/Mercury/ep2500/Makefile
    create mode 100644 board/Mercury/ep2500/config.mk
    create mode 100644 board/Mercury/ep2500/ep2500.c
    create mode 100644 board/Mercury/ep2500/u-boot.lds
    create mode 100644 include/configs/EP2500.h
board/Mercury/ep2500/Makefile new file +44 -0
new file mode 100644
index 0000000..424ab1c
@@ -0,0 +1,44 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS	= $(BOARD).o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
(quoted diff) +0 -0

b/board/Mercury/ep2500/config.mk
new file mode 100644
index 0000000..5639dbb

board/Mercury/ep2500/config.mk new file +23 -0
@@ -0,0 +1,23 @@
+#
+# (c) Copyright 2009 Arcturus Networks Inc.
+#     by David Wu <www.ArcturusNetworks.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+TEXT_BASE = 0xFF000000
board/Mercury/ep2500/ep2500.c new file +191 -0

191 lines not on this page · raw message

(quoted diff) +0 -0

b/board/Mercury/ep2500/u-boot.lds
new file mode 100644
index 0000000..f46e025

board/Mercury/ep2500/u-boot.lds new file +140 -0

140 lines not on this page · raw message

include/configs/EP2500.h new file +122 -0

122 lines not on this page · raw message

*/
+#define CONFIG_SYS_I2C_OFFSET 0x00000300
+#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
+/*#define CONFIG_CMD_EEPROM */
+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
+#define MAC_ADDRESS_OFFSET_IN_EEPROM 118
+
+#define CONFIG_HOSTNAME EP2500
+#define PRODUCT_REVISION "EP2500"
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "REVISION="PRODUCT_REVISION"\0" \
+ "netdev=eth0\0" \
+ "loadaddr=10010000\0" \
+ "u-boot=u-boot.bin\0" \
+ "load=tftp ${loadaddr) ${u-boot}\0" \
+ "upd=run load; run prog\0" \
+ "prog=prot off ff000000 ff03ffff;" \
+ "era ff000000 ff03ffff;" \
+ "cp.b ${loadaddr} ff000000 ${filesize};"\
+ "setenv filesize;save\0" \
+ ""
+
+#define CONFIG_SYS_PROMPT "-> "
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
+
+#if defined(CONFIG_CMD_KGDB)
+#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
+ /* Print Buffer Size */
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /*Boot Argument Buffer Size
*/
+
+#define CONFIG_SYS_LOAD_ADDR 0x20000
+
+#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START+CONFIG_SYS_SDRAM0_SIZE)
+ /* first SDRAM */
+
+#define CONFIG_SYS_HZ 1000
+#define CONFIG_SYS_CLK 58982400 /* 58.98 MHz; 7.3728 MHz * 8 */
+
+/* PLL Configuration: Ext Clock * 6 (see table 9-4 of MCF user manual) */ +
+#define CONFIG_SYS_MFD 0x02 /* PLL Multiplication Factor Devider */
+#define CONFIG_SYS_RFD 0x00 /* PLL Reduce Frecuency Devider */
+
+/*
+ * Low Level Configuration Settings
+ * (address mappings, register initial values, etc.)
+ * You should know what you are doing if you make changes here.
+ */
+#define CONFIG_SYS_MBAR 0x40000000
+ +/*-----------------------------------------------------------------------
+ * Definitions for initial stack pointer and data area (in DPRAM)
+ */
+#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
+#define CONFIG_SYS_INIT_RAM_END 0x10000 /* End of used area in internal
SRAM */
+#define CONFIG_SYS_GBL_DATA_SIZE 64 /*size in bytes reserved for initial data */
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - \
+ CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
+ +/*-----------------------------------------------------------------------
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
+ */
+#define CONFIG_SYS_SDRAM_BASE 0x10000000
+#define CONFIG_SYS_SDRAM_SIZE 32
+#define CONFIG_SYS_SDRAM0_BASE 0x10000000
+#define CONFIG_SYS_SDRAM0_SIZE 16
+#define CONFIG_SYS_SDRAM1_BASE 0x11000000
+#define CONFIG_SYS_SDRAM1_SIZE 16
+
+#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
+#define CONFIG_SYS_INT_FLASH_BASE 0xF0000000
+#define CONFIG_SYS_INT_FLASH_SIZE 0x80000
+#define CONFIG_SYS_INT_FLASH_ENABLE 0x21
+
+/* If M5282 port is fully implemented the monitor base will be behind
+ * the vector table. */
+#if (TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE)
+#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
+#else
+#define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x418) /* 24 Byte for
CFM-Config */
+#endif
+
+#define CONFIG_SYS_MONITOR_LEN 0x20000
+#define CONFIG_SYS_MALLOC_LEN (256 << 10)
+#define CONFIG_SYS_BOOTPARAMS_LEN (64*1024)
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization ??
+ */
+#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE+(CONFIG_SYS_SDRAM_SIZE<<20))
+ +/*-----------------------------------------------------------------------
+ * FLASH organization
+ */
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER 1
+#define CONFIG_SYS_FLASH_SIZE 0x1000000
+ /* Max size that the board might have */
+#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
+#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
+#define CONFIG_SYS_FLASH_PROTECTION /* "Real"(hardware) sectors
protection */
+#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
+ +/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_END
- 8)
+#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_END
- 4)
+#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
+#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
+ CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+ CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ACR1 0
+#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_DISD) /*
0x80400000 */
+#define CONFIG_SYS_CACHELINE_SIZE 16
+ +/*-----------------------------------------------------------------------
+ * Memory bank definitions
+ */
+#define CONFIG_SYS_CS0_BASE 0xFF000000
+#define CONFIG_SYS_CS0_CTRL 0x00001da0
+#define CONFIG_SYS_CS0_MASK 0x00FF0001
+#define CONFIG_SYS_CS2_BASE 0x30000000
+#define CONFIG_SYS_CS2_CTRL 0x000015a0
+#define CONFIG_SYS_CS2_MASK 0x000f0041
+ +/*-----------------------------------------------------------------------
+ * Port configuration
+ */

+#define CONFIG_SYS_PACNT                0x0000000	/* Port A D[31:24] */
+#define CONFIG_SYS_PADDR                0x0000000
+#define CONFIG_SYS_PADAT                0x0000000
+
+#define CONFIG_SYS_PBCNT                0x0000000	/* Port B D[23:16] */
+#define CONFIG_SYS_PBDDR                0x0000000
+#define CONFIG_SYS_PBDAT                0x0000000
+
+#define CONFIG_SYS_PCCNT                0x0000000	/* Port C D[15:08] */
+#define CONFIG_SYS_PCDDR                0x0000000
+#define CONFIG_SYS_PCDAT                0x0000000
+
+#define CONFIG_SYS_PDCNT                0x0000000	/* Port D D[07:00] */
+#define CONFIG_SYS_PCDDR                0x0000000
+#define CONFIG_SYS_PCDAT                0x0000000
+
+#define CONFIG_SYS_PASPAR		0x000F
+#define CONFIG_SYS_PEHLPAR              0xC0
+#define CONFIG_SYS_PUAPAR               0x0F	/* UA0..UA3 = Uart 0 +1 */
+#define CONFIG_SYS_DDRUA                0x05
+#define CONFIG_SYS_PJPAR                0xF5

+
+#define CONFIG_SYS_PEHLPAR 0xC0
+#define CONFIG_SYS_DDRD 0xFF /* Port D : all output */
+#define CONFIG_SYS_PFPAR 0xE0
+
+#define CONFIG_SYS_PTCPAR 0x0 /* Port TC used for UART0 */
+#define CONFIG_SYS_PORTTC 0x0 /* driver 0 */
+#define CONFIG_SYS_DDRTC 0xf /* output */
+
+#define MCFSDRAMC_DACR_F(i) (*(vu_long
*)(CONFIG_SYS_MBAR+0x00000048+(i*0x8)))
+#define MCFSDRAMC_DMR_F(i) (*(vu_long
*)(CONFIG_SYS_MBAR+0x0000004c+(i*0x8)))
+
+#endif /* _CONFIG_EP2500_H */

Signature · 1 line
1.5.6
#1 lore raw

PATCH 2/6 added Mercury EP2500 board support It uses the mcf5282 processor with real time clock and EEPROM.

Dear "David Wu",

Quoted 14 lines · In message <[email protected]> you wrote:
---
    board/Mercury/ep2500/Makefile   |   44 ++++++
    board/Mercury/ep2500/config.mk  |   23 +++
    board/Mercury/ep2500/ep2500.c   |  191 +++++++++++++++++++++++++
    board/Mercury/ep2500/u-boot.lds |  140 ++++++++++++++++++
    include/configs/EP2500.h        |  297
+++++++++++++++++++++++++++++++++++++++
    5 files changed, 695 insertions(+), 0 deletions(-)
    create mode 100644 board/Mercury/ep2500/Makefile
    create mode 100644 board/Mercury/ep2500/config.mk
    create mode 100644 board/Mercury/ep2500/ep2500.c
    create mode 100644 board/Mercury/ep2500/u-boot.lds
    create mode 100644 include/configs/EP2500.h

PLEASE! Please add version information to such submissions, i. e. use something like "[PATCH 2/6 v2]" in the subject, and add a descreiption of what you have changed compared to the previous version of the patches!!

Entries to MAINTAINERS and MAKEALL missing.

...

board/Mercury/ep2500/ep2500.c line 93

Quoted 5 lines
board/Mercury/ep2500/ep2500.c new file +5 -0
+			/* Write to this block to initiate precharge */
+			if (j == 0)
+				*(vu_short *) (base) = 0x0000;
+			else
+				*(vu_short *) (base) = 0xbabe;

I guess you have proper I/O accessor functions on this architecture? [Please fix globally.]

....

Quoted 4 lines
board/Mercury/ep2500/ep2500.c new file +4 -0
+	/*
+	 * When buff returns all 0xFF the EEPROM has not
+	 * been programed with a valid MAC. In this case
+	 * we set enet to all 0x00 as 0xFF is not valid

board/Mercury/ep2500/ep2500.c line 151

Quoted 10 lines
board/Mercury/ep2500/ep2500.c new file +10 -0
+	 * for this usage model.
+	 */
+	if (buff[0] == 0xff && buff[1] == 0xff && buff[2] == 0xff &&
+	    buff[3] == 0xff && buff[4] == 0xff && buff[5] == 0xff) {
+		for (i = 0; i < 6; i++)
+			enet[i] = 0;
+	} else {
+		for (i = 0; i < 6; i++)
+			enet[i] = buff[i];
+	}

Please see review comments to previous patch.

Quoted 4 lines
board/Mercury/ep2500/ep2500.c new file +4 -0
+void i2c_init_board(void)
+{
+	struct fsl_i2c *dev;
+

board/Mercury/ep2500/ep2500.c line 190

Quoted 10 lines
board/Mercury/ep2500/ep2500.c new file +10 -0
+	dev = (struct fsl_i2c *)(CONFIG_SYS_IMMR + CONFIG_SYS_I2C_OFFSET);
+
+	if (readb(&dev->sr) & I2C_SR_MBB) {
+		writeb(0, &dev->cr);
+		writeb(0xa0, &dev->cr);
+		readb(&dev->dr);
+		writeb(0x0, &dev->sr);
+		writeb(0, &dev->cr);
+		writeb(I2C_CR_MEN, &dev->cr);
+	}

Ditto.

...

include/configs/EP2500.h line 114

Quoted 10 lines
include/configs/EP2500.h new file +10 -0
+#define CONFIG_BOOTDELAY	5
+#ifdef CONFIG_MCFFEC
+#	define CONFIG_ETHADDR	00:00:00:00:00:00
+#	define CONFIG_IPADDR	192.168.1.2
+#	define CONFIG_NETMASK	255.255.255.0
+#	define CONFIG_SERVERIP	192.168.1.1
+#	define CONFIG_GATEWAYIP	192.168.1.1
+#	define CONFIG_OVERWRITE_ETHADDR_ONCE
+/*#define CONFIG_ENV_OVERWRITE */
+#endif /* CONFIG_MCFFEC */

Ditto, and so on.