dma-buf: dma-fence: Remove dma_fence_init64()
Subsystems (36)
Philipp Stanner
maintainercover dma-buf: dma-fence: Remove dma_fence_init64()
We recently had a discussion about reworking dma_fence init to close a race-window [1].
The community agreement seems to have been that we can get rid of dma_fence_init64(), so let's do that already. In the meantime we can continue our discussions regarding the race in [1].
This also touches the Rust dma_fence, which actually should use 64-bit seqnos (was forgotten so far). Rust fence has no users currently, so needs no backporting, so I would like to address that in a distinct patch.
Tested on Nouveau with and without the SEQNO64 flag. Nouveau also uses the USER flag, so I hope we're fine.
P.
[1] https://lore.kernel.org/dri-devel/[email protected]/
Philipp Stanner (3):
dma-buf: dma-fence: Add flags parameter to dma_fence_init()
dma-buf: Port users of dma_fence_init64()
dma-buf: dma-fence: Remove dma_fence_init64()
drivers/accel/amdxdna/amdxdna_ctx.c | 2 +- drivers/accel/ethosu/ethosu_job.c | 2 +- drivers/accel/ivpu/ivpu_job.c | 2 +- drivers/accel/rocket/rocket_job.c | 2 +- drivers/dma-buf/dma-fence-array.c | 2 +- drivers/dma-buf/dma-fence-chain.c | 4 +- drivers/dma-buf/dma-fence.c | 58 +++++++++---------- drivers/dma-buf/st-dma-fence-chain.c | 2 +- drivers/dma-buf/st-dma-fence-unwrap.c | 2 +- drivers/dma-buf/st-dma-fence.c | 2 +- drivers/dma-buf/st-dma-resv.c | 2 +- drivers/dma-buf/sw_sync.c | 2 +- .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c | 2 +- .../drm/amd/amdgpu/amdgpu_eviction_fence.c | 7 ++- drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 2 +- .../gpu/drm/amd/amdgpu/amdgpu_userq_fence.c | 5 +- .../gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c | 5 +- drivers/gpu/drm/drm_crtc.c | 2 +- drivers/gpu/drm/drm_writeback.c | 2 +- drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 2 +- drivers/gpu/drm/i915/i915_request.c | 2 +- drivers/gpu/drm/i915/i915_sw_fence_work.c | 2 +- drivers/gpu/drm/i915/i915_vma_resource.c | 2 +- .../gpu/drm/i915/selftests/i915_sw_fence.c | 2 +- drivers/gpu/drm/imagination/pvr_ccb.c | 2 +- drivers/gpu/drm/imagination/pvr_queue.c | 2 +- drivers/gpu/drm/lima/lima_sched.c | 2 +- drivers/gpu/drm/msm/msm_fence.c | 2 +- drivers/gpu/drm/nouveau/nouveau_fence.c | 4 +- drivers/gpu/drm/panfrost/panfrost_job.c | 2 +- drivers/gpu/drm/panthor/panthor_sched.c | 2 +- drivers/gpu/drm/qxl/qxl_release.c | 2 +- drivers/gpu/drm/radeon/radeon_fence.c | 2 +- drivers/gpu/drm/scheduler/sched_fence.c | 4 +- .../gpu/drm/scheduler/tests/mock_scheduler.c | 2 +- drivers/gpu/drm/ttm/tests/ttm_bo_test.c | 2 +- .../gpu/drm/ttm/tests/ttm_bo_validate_test.c | 2 +- drivers/gpu/drm/v3d/v3d_fence.c | 2 +- drivers/gpu/drm/vc4/vc4_gem.c | 2 +- drivers/gpu/drm/vgem/vgem_fence.c | 2 +- drivers/gpu/drm/virtio/virtgpu_fence.c | 2 +- drivers/gpu/drm/vmwgfx/vmwgfx_fence.c | 2 +- drivers/gpu/drm/xe/xe_hw_fence.c | 2 +- drivers/gpu/drm/xe/xe_oa.c | 2 +- drivers/gpu/drm/xe/xe_preempt_fence.c | 2 +- drivers/gpu/drm/xe/xe_tlb_inval.c | 2 +- drivers/gpu/host1x/fence.c | 2 +- drivers/iio/industrialio-buffer.c | 2 +- drivers/usb/gadget/function/f_fs.c | 2 +- include/linux/dma-fence.h | 14 +++-- rust/kernel/dma_buf/dma_fence.rs | 2 +- 52 files changed, 95 insertions(+), 94 deletions(-)
base-commit: 8258a37702b9b9cf27f5c0ea07625e3e6bd74f5a
Signature · 1 line
2.56.0
Philipp Stanner
maintainerPATCH 1/3 dma-buf: dma-fence: Add flags parameter to dma_fence_init()
Currently, there are two init functions for dma_fence, dma_fence_init() and dma_fence_init64().
Since more future user options for dma_fence initialization would require distinct init functions, too, it is better to do this in a unified way.
Add a flags field to dma_fence_init(). Adjust all affected drivers, preserving the old behavior.
Support the SEQNO64 flag, and add a check-function so that the user only sets valid bits.
--- drivers/accel/amdxdna/amdxdna_ctx.c | 2 +- drivers/accel/ethosu/ethosu_job.c | 2 +- drivers/accel/ivpu/ivpu_job.c | 2 +- drivers/accel/rocket/rocket_job.c | 2 +- drivers/dma-buf/dma-fence-array.c | 2 +- drivers/dma-buf/dma-fence.c | 31 ++++++++++++++++--- drivers/dma-buf/st-dma-fence-chain.c | 2 +- drivers/dma-buf/st-dma-fence-unwrap.c | 2 +- drivers/dma-buf/st-dma-fence.c | 2 +- drivers/dma-buf/st-dma-resv.c | 2 +- drivers/dma-buf/sw_sync.c | 2 +- .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 2 +- drivers/gpu/drm/drm_crtc.c | 2 +- drivers/gpu/drm/drm_writeback.c | 2 +- drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 2 +- drivers/gpu/drm/i915/i915_request.c | 2 +- drivers/gpu/drm/i915/i915_sw_fence_work.c | 2 +- drivers/gpu/drm/i915/i915_vma_resource.c | 2 +- .../gpu/drm/i915/selftests/i915_sw_fence.c | 2 +- drivers/gpu/drm/imagination/pvr_ccb.c | 2 +- drivers/gpu/drm/imagination/pvr_queue.c | 2 +- drivers/gpu/drm/lima/lima_sched.c | 2 +- drivers/gpu/drm/msm/msm_fence.c | 2 +- drivers/gpu/drm/nouveau/nouveau_fence.c | 4 +-- drivers/gpu/drm/panfrost/panfrost_job.c | 2 +- drivers/gpu/drm/panthor/panthor_sched.c | 2 +- drivers/gpu/drm/qxl/qxl_release.c | 2 +- drivers/gpu/drm/radeon/radeon_fence.c | 2 +- drivers/gpu/drm/scheduler/sched_fence.c | 4 +-- .../gpu/drm/scheduler/tests/mock_scheduler.c | 2 +- drivers/gpu/drm/ttm/tests/ttm_bo_test.c | 2 +- .../gpu/drm/ttm/tests/ttm_bo_validate_test.c | 2 +- drivers/gpu/drm/v3d/v3d_fence.c | 2 +- drivers/gpu/drm/vc4/vc4_gem.c | 2 +- drivers/gpu/drm/vgem/vgem_fence.c | 2 +- drivers/gpu/drm/virtio/virtgpu_fence.c | 2 +- drivers/gpu/drm/vmwgfx/vmwgfx_fence.c | 2 +- drivers/gpu/drm/xe/xe_hw_fence.c | 2 +- drivers/gpu/drm/xe/xe_oa.c | 2 +- drivers/gpu/drm/xe/xe_preempt_fence.c | 2 +- drivers/gpu/drm/xe/xe_tlb_inval.c | 2 +- drivers/gpu/host1x/fence.c | 2 +- drivers/iio/industrialio-buffer.c | 2 +- drivers/usb/gadget/function/f_fs.c | 2 +- include/linux/dma-fence.h | 12 +++++-- rust/kernel/dma_buf/dma_fence.rs | 2 +- 48 files changed, 83 insertions(+), 56 deletions(-)
drivers/accel/amdxdna/amdxdna_ctx.c +1 -1
@@ -53,7 +53,7 @@ static struct dma_fence *amdxdna_fence_create(struct amdxdna_hwctx *hwctx)spin_lock_init (&fence->lock);/* Unique timeline context prevents eviction from shared BO reservation. */ -dma_fence_init (&fence->base, &fence_ops, &fence->lock,dma_fence_context_alloc (1 ),0 ); +dma_fence_init (&fence->base, &fence_ops, &fence->lock,dma_fence_context_alloc (1 ),0 ,0 );return &fence->base; }
drivers/accel/ethosu/ethosu_job.c +1 -1
@@ -219,7 +219,7 @@ static struct dma_fence *ethosu_job_run(struct drm_sched_job *sched_job)return NULL ;dma_fence_init (fence, ðosu_fence_ops, &dev->fence_lock, - dev->fence_context, ++dev->emit_seqno); + dev->fence_context, ++dev->emit_seqno,0 );dma_fence_get (fence);ethosu_switch_perfmon (dev, job);
drivers/accel/ivpu/ivpu_job.c +1 -1
@@ -519,7 +519,7 @@ static struct dma_fence *ivpu_fence_create(struct ivpu_device *vdev) fence->vdev = vdev;spin_lock_init (&fence->lock); -dma_fence_init (&fence->base, &ivpu_fence_ops, &fence->lock,dma_fence_context_alloc (1 ),1 ); +dma_fence_init (&fence->base, &ivpu_fence_ops, &fence->lock,dma_fence_context_alloc (1 ),1 ,0 );return &fence->base; }
drivers/accel/rocket/rocket_job.c +1 -1
@@ -61,7 +61,7 @@ static struct dma_fence *rocket_fence_create(struct rocket_core *core)return ERR_PTR (-ENOMEM );dma_fence_init (fence, &rocket_fence_ops, &core->fence_lock, - core->fence_context, ++core->emit_seqno); + core->fence_context, ++core->emit_seqno,0 );return fence; }
drivers/dma-buf/dma-fence-array.c +1 -1
@@ -205,7 +205,7 @@ void dma_fence_array_init(struct dma_fence_array *array, array->num_fences = num_fences;dma_fence_init (&array->base, &dma_fence_array_ops,NULL , context, - seqno); + seqno,0 );init_irq_work (&array->work, irq_dma_fence_array_work);/*
drivers/dma-buf/dma-fence.c +26 -5
@@ -122,7 +122,7 @@ static const struct dma_fence_ops dma_fence_stub_ops = {static int __init dma_fence_init_stub (void ) { -dma_fence_init (&dma_fence_stub, &dma_fence_stub_ops,NULL ,0 ,0 ); +dma_fence_init (&dma_fence_stub, &dma_fence_stub_ops,NULL ,0 ,0 ,0 );set_bit (DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT , &dma_fence_stub.flags);dma_fence_signal (&dma_fence_stub);
@@ -156,7 +156,7 @@ struct dma_fence *dma_fence_allocate_private_stub(ktime_t timestamp)if (fence ==NULL )return NULL ; -dma_fence_init (fence, &dma_fence_stub_ops,NULL ,0 ,0 ); +dma_fence_init (fence, &dma_fence_stub_ops,NULL ,0 ,0 ,0 );set_bit (DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT , &fence->flags);
@@ -1063,7 +1063,6 @@ __dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops, spinlock_t *lock, u64 context, u64 seqno, unsigned long flags) { BUG_ON(!ops || !ops->get_driver_name || !ops->get_timeline_name); -kref_init (&fence->refcount);/* * While it is counter intuitive to protect a constant function pointer
@@ -1087,6 +1086,21 @@ __dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops,trace_dma_fence_init (fence); } +static bool dma_fence_flags_invalid (unsigned long flags) +{ +const unsigned long valid_fence_bits = +BIT (DMA_FENCE_FLAG_SEQNO64_BIT ); +const unsigned long valid_user_bits = +GENMASK ( + BITS_PER_TYPE(unsigned long) - 1, +DMA_FENCE_FLAG_USER_BITS + ); +const unsigned long invalid_bits = + ~(valid_fence_bits | valid_user_bits); + +return flags & invalid_bits; +} +/** * dma_fence_init - Initialize a custom fence. * @fence: the fence to initialize
@@ -1094,6 +1108,7 @@ __dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops,* @lock: optional irqsafe spinlock to use for locking this fence * @context: the execution context this fence is run on * @seqno: a linear increasing sequence number for this context +* @flags: flags modifying a fence's behavior * * Initializes an allocated fence, the caller doesn't have to keep its * refcount after committing with this fence, but it will need to hold a
@@ -1108,12 +1123,18 @@ __dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops,* introduction of the callback, but the external lock is still around. New * users MUST NOT use external locks, as they force the issuer to outlive all * fences that reference the lock. +* +* The @flags you can specify here are either DMA_FENCE_FLAG_SEQNO64_BIT or +* user-specified bits >= DMA_FENCE_FLAG_USER_BITS. */ void dma_fence_init (struct dma_fence *fence,const struct dma_fence_ops *ops, -spinlock_t *lock,u64 context,u64 seqno) +spinlock_t *lock,u64 context,u64 seqno, +unsigned long flags) { -__dma_fence_init (fence, ops, lock, context, seqno,0UL ); +WARN_ON (dma_fence_flags_invalid (flags)); + +__dma_fence_init (fence, ops, lock, context, seqno, flags); }EXPORT_SYMBOL (dma_fence_init);
drivers/dma-buf/st-dma-fence-chain.c +1 -1
@@ -52,7 +52,7 @@ static struct dma_fence *mock_fence(void)return NULL ;spin_lock_init (&f->lock); -dma_fence_init (&f->base, &mock_ops, &f->lock,0 ,0 ); +dma_fence_init (&f->base, &mock_ops, &f->lock,0 ,0 ,0 );return &f->base; }
drivers/dma-buf/st-dma-fence-unwrap.c +1 -1
@@ -36,7 +36,7 @@ static struct dma_fence *__mock_fence(u64 context, u64 seqno)return NULL ;spin_lock_init (&f->lock); -dma_fence_init (&f->base, &mock_ops, &f->lock, context, seqno); +dma_fence_init (&f->base, &mock_ops, &f->lock, context, seqno,0 );return &f->base; }
drivers/dma-buf/st-dma-fence.c +1 -1
@@ -31,7 +31,7 @@ static struct dma_fence *mock_fence(void)if (!f)return NULL ; -dma_fence_init (f, &mock_ops,NULL ,0 ,0 ); +dma_fence_init (f, &mock_ops,NULL ,0 ,0 ,0 );return f; }
drivers/dma-buf/st-dma-resv.c +1 -1
@@ -35,7 +35,7 @@ static struct dma_fence *alloc_fence(void)if (!f)return NULL ; -dma_fence_init (f, &fence_ops, &fence_lock,0 ,0 ); +dma_fence_init (f, &fence_ops, &fence_lock,0 ,0 ,0 );return f; }
drivers/dma-buf/sw_sync.c +1 -1
@@ -258,7 +258,7 @@ static struct sync_pt *sync_pt_create(struct sync_timeline *obj,sync_timeline_get (obj);dma_fence_init (&pt->base, &timeline_fence_ops, &obj->lock, - obj->context, value); + obj->context, value,0 );INIT_LIST_HEAD (&pt->link);spin_lock_irq (&obj->lock);
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c +1 -1
@@ -77,7 +77,7 @@ struct amdgpu_amdkfd_fence *amdgpu_amdkfd_fence_create(u64 context,spin_lock_init (&fence->lock); fence->context_id = context_id;dma_fence_init (&fence->base, &amdkfd_fence_ops, &fence->lock, - context,atomic_inc_return (&fence_seq)); + context,atomic_inc_return (&fence_seq),0 );return fence; }
drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c +1 -1
@@ -112,7 +112,7 @@ void amdgpu_fence_emit(struct amdgpu_ring *ring, struct amdgpu_fence *af, seq = ++ring->fence_drv.sync_seq;dma_fence_init (fence, &amdgpu_fence_ops, &ring->fence_drv.lock, - adev->fence_context + ring->idx, seq); + adev->fence_context + ring->idx, seq,0 );amdgpu_ring_emit_fence (ring, ring->fence_drv.gpu_addr, seq, flags |AMDGPU_FENCE_FLAG_INT );
drivers/gpu/drm/drm_crtc.c +1 -1
@@ -190,7 +190,7 @@ struct dma_fence *drm_crtc_create_fence(struct drm_crtc *crtc)return NULL ;dma_fence_init (fence, &drm_crtc_fence_ops, &crtc->fence_lock, - crtc->fence_context, ++crtc->fence_seqno); + crtc->fence_context, ++crtc->fence_seqno,0 );return fence; }
drivers/gpu/drm/drm_writeback.c +1 -1
@@ -592,7 +592,7 @@ drm_writeback_get_out_fence(struct drm_writeback_connector *wb_connector)dma_fence_init (fence, &drm_writeback_fence_ops, &wb_connector->fence_lock, wb_connector->fence_context, - ++wb_connector->fence_seqno); + ++wb_connector->fence_seqno,0 );return fence; }
drivers/gpu/drm/etnaviv/etnaviv_gpu.c +1 -1
@@ -1199,7 +1199,7 @@ static struct dma_fence *etnaviv_gpu_fence_alloc(struct etnaviv_gpu *gpu) f->gpu = gpu;dma_fence_init (&f->base, &etnaviv_fence_ops, &gpu->fence_spinlock, - gpu->fence_context, ++gpu->next_fence); + gpu->fence_context, ++gpu->next_fence,0 );return &f->base; }
drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c +1 -1
@@ -437,7 +437,7 @@ i915_ttm_memcpy_work_arm(struct i915_ttm_memcpy_work *work,int ret;spin_lock_init (&work->lock); -dma_fence_init (&work->fence, &dma_fence_memcpy_ops, &work->lock,0 ,0 ); +dma_fence_init (&work->fence, &dma_fence_memcpy_ops, &work->lock,0 ,0 ,0 );dma_fence_get (&work->fence); ret =dma_fence_add_callback (dep, &work->cb, __memcpy_cb);if (ret) {
drivers/gpu/drm/i915/i915_request.c +1 -1
@@ -953,7 +953,7 @@ __i915_request_create(struct intel_context *ce, gfp_t gfp) goto err_free;dma_fence_init (&rq->fence, &i915_fence_ops, &rq->lock, - tl->fence_context, seqno); + tl->fence_context, seqno,0 );RCU_INIT_POINTER (rq->timeline, tl); rq->hwsp_seqno = tl->hwsp_seqno;
drivers/gpu/drm/i915/i915_sw_fence_work.c +1 -1
@@ -85,7 +85,7 @@ void dma_fence_work_init(struct dma_fence_work *f, { f->ops = ops;spin_lock_init (&f->lock); -dma_fence_init (&f->dma, &fence_ops, &f->lock,0 ,0 ); +dma_fence_init (&f->dma, &fence_ops, &f->lock,0 ,0 ,0 );i915_sw_fence_init (&f->chain, fence_notify);INIT_WORK (&f->work, fence_work); }
drivers/gpu/drm/i915/i915_vma_resource.c +1 -1
@@ -263,7 +263,7 @@ void __i915_vma_resource_init(struct i915_vma_resource *vma_res) {spin_lock_init (&vma_res->lock);dma_fence_init (&vma_res->unbind_fence, &unbind_fence_ops, - &vma_res->lock,0 ,0 ); + &vma_res->lock,0 ,0 ,0 );refcount_set (&vma_res->hold_count,1 );i915_sw_fence_init (&vma_res->chain, i915_vma_resource_fence_notify); }
drivers/gpu/drm/i915/selftests/i915_sw_fence.c +1 -1
@@ -641,7 +641,7 @@ static struct dma_fence *alloc_dma_fence(void) dma =kmalloc_obj (*dma);if (dma) -dma_fence_init (dma, &mock_fence_ops, &mock_fence_lock,0 ,0 ); +dma_fence_init (dma, &mock_fence_ops, &mock_fence_lock,0 ,0 ,0 );return dma; }
drivers/gpu/drm/imagination/pvr_ccb.c +1 -1
@@ -645,7 +645,7 @@ pvr_kccb_reserve_slot(struct pvr_device *pvr_dev, struct dma_fence *f)dma_fence_init (&fence->base, &pvr_kccb_fence_ops, &pvr_dev->kccb.fence_ctx.lock, pvr_dev->kccb.fence_ctx.id, -atomic_inc_return (&pvr_dev->kccb.fence_ctx.seqno)); +atomic_inc_return (&pvr_dev->kccb.fence_ctx.seqno),0 ); out_fence =dma_fence_get (&fence->base);list_add_tail (&fence->node, &pvr_dev->kccb.waiters); }else {
drivers/gpu/drm/imagination/pvr_queue.c +1 -1
@@ -305,7 +305,7 @@ pvr_queue_fence_init(struct dma_fence *f,INIT_WORK (&fence->release_work, pvr_queue_fence_release_work);dma_fence_init (&fence->base, fence_ops, &fence_ctx->lock, fence_ctx->id, -atomic_inc_return (&fence_ctx->seqno)); +atomic_inc_return (&fence_ctx->seqno),0 ); }/**
drivers/gpu/drm/lima/lima_sched.c +1 -1
@@ -97,7 +97,7 @@ static struct lima_fence *lima_fence_create(struct lima_sched_pipe *pipe) fence->pipe = pipe;dma_fence_init (&fence->base, &lima_fence_ops, &pipe->fence_lock, - pipe->fence_context, ++pipe->fence_seqno); + pipe->fence_context, ++pipe->fence_seqno,0 );return fence; }
drivers/gpu/drm/msm/msm_fence.c +1 -1
@@ -197,5 +197,5 @@ msm_fence_init(struct dma_fence *fence, struct msm_fence_context *fctx)WARN_ON (kref_read (&fence->refcount));dma_fence_init (&f->base, &msm_fence_ops, &fctx->spinlock, - fctx->context, ++fctx->last_fence); + fctx->context, ++fctx->last_fence,0 ); }
drivers/gpu/drm/nouveau/nouveau_fence.c +2 -2
@@ -216,10 +216,10 @@ nouveau_fence_emit(struct nouveau_fence *fence)if (priv->uevent)dma_fence_init (&fence->base, &nouveau_fence_ops_uevent, - &fctx->lock, fctx->context, ++fctx->sequence); + &fctx->lock, fctx->context, ++fctx->sequence,0 );else dma_fence_init (&fence->base, &nouveau_fence_ops_legacy, - &fctx->lock, fctx->context, ++fctx->sequence); + &fctx->lock, fctx->context, ++fctx->sequence,0 );kref_get (&fctx->fence_ref); ret = fctx->emit (fence);
drivers/gpu/drm/panfrost/panfrost_job.c +1 -1
@@ -105,7 +105,7 @@ static struct dma_fence *panfrost_fence_create(struct panfrost_device *pfdev, in fence->queue = js_num; fence->seqno = ++js->queue[js_num].emit_seqno;dma_fence_init (&fence->base, &panfrost_fence_ops, &js->job_lock, - js->queue[js_num].fence_context, fence->seqno); + js->queue[js_num].fence_context, fence->seqno,0 );return &fence->base; }
drivers/gpu/drm/panthor/panthor_sched.c +1 -1
@@ -3322,7 +3322,7 @@ queue_run_job(struct drm_sched_job *sched_job) &panthor_queue_fence_ops, &queue->fence_ctx.lock, queue->fence_ctx.id, - atomic64_inc_return(&queue->fence_ctx.seqno)); + atomic64_inc_return(&queue->fence_ctx.seqno), 0); job->profiling.slot = queue->profiling.seqno++;if (queue->profiling.seqno == queue->profiling.slot_count)
drivers/gpu/drm/qxl/qxl_release.c +1 -1
@@ -430,7 +430,7 @@ void qxl_release_fence_buffer_objects(struct qxl_release *release)* set the highest bits. This will break if we really allow exporting of dma-bufs. */ dma_fence_init (&release->base, &qxl_fence_ops, &qdev->release_lock, - release->id |0xf0000000 , release->base.seqno); + release->id |0xf0000000 , release->base.seqno,0 );trace_dma_fence_emit (&release->base);list_for_each_entry (entry, &release->bos, list) {
drivers/gpu/drm/radeon/radeon_fence.c +1 -1
@@ -148,7 +148,7 @@ int radeon_fence_emit(struct radeon_device *rdev,dma_fence_init (&(*fence)->base, &radeon_fence_ops, &rdev->fence_queue.lock, rdev->fence_context + ring, - seq); + seq,0 );radeon_fence_ring_emit (rdev, ring, *fence);trace_radeon_fence_emit (rdev_to_drm (rdev), ring, (*fence)->seq);radeon_fence_schedule_check (rdev, ring);
drivers/gpu/drm/scheduler/sched_fence.c +2 -2
@@ -229,9 +229,9 @@ void drm_sched_fence_init(struct drm_sched_fence *fence, fence->sched = entity->rq->sched; seq =atomic_inc_return (&entity->fence_seq);dma_fence_init (&fence->scheduled, &drm_sched_fence_ops_scheduled, - &fence->lock, entity->fence_context, seq); + &fence->lock, entity->fence_context, seq,0 );dma_fence_init (&fence->finished, &drm_sched_fence_ops_finished, - &fence->lock, entity->fence_context +1 , seq); + &fence->lock, entity->fence_context +1 , seq,0 ); }module_init (drm_sched_fence_slab_init);
drivers/gpu/drm/scheduler/tests/mock_scheduler.c +1 -1
@@ -173,7 +173,7 @@ static struct dma_fence *mock_sched_run_job(struct drm_sched_job *sched_job) &drm_mock_sched_hw_fence_ops, &sched->lock, sched->hw_timeline.context, - atomic_inc_return(&sched->hw_timeline.next_seqno)); + atomic_inc_return(&sched->hw_timeline.next_seqno), 0);dma_fence_get (&job->hw_fence);/* Reference for the job_list */
drivers/gpu/drm/ttm/tests/ttm_bo_test.c +1 -1
@@ -450,7 +450,7 @@ static void ttm_bo_fini_shared_resv(struct kunit *test)KUNIT_ASSERT_NOT_NULL (test, fence);spin_lock_init (&fence_lock); -dma_fence_init (fence, &mock_fence_ops, &fence_lock,0 ,0 ); +dma_fence_init (fence, &mock_fence_ops, &fence_lock,0 ,0 ,0 );dma_resv_lock (external_resv,NULL );dma_resv_reserve_fences (external_resv,1 );
drivers/gpu/drm/ttm/tests/ttm_bo_validate_test.c +1 -1
@@ -57,7 +57,7 @@ static struct dma_fence *alloc_mock_fence(struct kunit *test) fence =kunit_kzalloc (test,sizeof (*fence),GFP_KERNEL );KUNIT_ASSERT_NOT_NULL (test, fence); -dma_fence_init (fence, &fence_ops, &fence_lock,0 ,0 ); +dma_fence_init (fence, &fence_ops, &fence_lock,0 ,0 ,0 );return fence; }
drivers/gpu/drm/v3d/v3d_fence.c +1 -1
@@ -16,7 +16,7 @@ struct dma_fence *v3d_fence_create(struct v3d_dev *v3d, enum v3d_queue q) fence->queue = q; fence->seqno = ++queue->emit_seqno;dma_fence_init (&fence->base, &v3d_fence_ops, &queue->queue_lock, - queue->fence_context, fence->seqno); + queue->fence_context, fence->seqno,0 );return &fence->base; }
drivers/gpu/drm/vc4/vc4_gem.c +1 -1
@@ -648,7 +648,7 @@ vc4_queue_submit(struct drm_device *dev, struct vc4_exec_info *exec, exec->seqno = seqno;dma_fence_init (&fence->base, &vc4_fence_ops, &vc4->job_lock, - vc4->dma_fence_context, exec->seqno); + vc4->dma_fence_context, exec->seqno,0 ); fence->seqno = exec->seqno; exec->fence = &fence->base;
drivers/gpu/drm/vgem/vgem_fence.c +1 -1
@@ -77,7 +77,7 @@ static struct dma_fence *vgem_fence_create(struct vgem_file *vfile,spin_lock_init (&fence->lock);dma_fence_init (&fence->base, &vgem_fence_ops, &fence->lock, -dma_fence_context_alloc (1 ),1 ); +dma_fence_context_alloc (1 ),1 ,0 );timer_setup (&fence->timer, vgem_fence_timeout,TIMER_IRQSAFE );
drivers/gpu/drm/virtio/virtgpu_fence.c +1 -1
@@ -76,7 +76,7 @@ struct virtio_gpu_fence *virtio_gpu_fence_alloc(struct virtio_gpu_device *vgdev,*/ dma_fence_init (&fence->f, &virtio_gpu_fence_ops, &drv->lock, - fence_context,0 ); + fence_context,0 ,0 );return fence; }
drivers/gpu/drm/vmwgfx/vmwgfx_fence.c +1 -1
@@ -163,7 +163,7 @@ static int vmw_fence_obj_init(struct vmw_fence_manager *fman,int ret =0 ;dma_fence_init (&fence->base, &vmw_fence_ops, &fman->lock, - fman->ctx, seqno); + fman->ctx, seqno,0 ); fence->destroy = destroy;spin_lock (&fman->lock);
drivers/gpu/drm/xe/xe_hw_fence.c +1 -1
@@ -243,7 +243,7 @@ void xe_hw_fence_init(struct dma_fence *fence, struct xe_hw_fence_ctx *ctx,INIT_LIST_HEAD (&hw_fence->irq_link);dma_fence_init (fence, &xe_hw_fence_ops, &ctx->irq->lock, - ctx->dma_fence_ctx, ctx->next_seqno++); + ctx->dma_fence_ctx, ctx->next_seqno++,0 );trace_xe_hw_fence_create (hw_fence); }
drivers/gpu/drm/xe/xe_oa.c +1 -1
@@ -1053,7 +1053,7 @@ static int xe_oa_emit_oa_config(struct xe_oa_stream *stream, struct xe_oa_config/* Point of no return: initialize and set fence to signal */ spin_lock_init (&ofence->lock); -dma_fence_init (&ofence->base, &xe_oa_fence_ops, &ofence->lock,0 ,0 ); +dma_fence_init (&ofence->base, &xe_oa_fence_ops, &ofence->lock,0 ,0 ,0 );for (i =0 ; i < stream->num_syncs; i++) {if (stream->syncs[i].flags &DRM_XE_SYNC_FLAG_SIGNAL )
drivers/gpu/drm/xe/xe_preempt_fence.c +1 -1
@@ -154,7 +154,7 @@ xe_preempt_fence_arm(struct xe_preempt_fence *pfence, struct xe_exec_queue *q, pfence->q =xe_exec_queue_get (q);spin_lock_init (&pfence->lock);dma_fence_init (&pfence->base, &preempt_fence_ops, - &pfence->lock, context, seqno); + &pfence->lock, context, seqno,0 );return &pfence->base; }
drivers/gpu/drm/xe/xe_tlb_inval.c +1 -1
@@ -544,7 +544,7 @@ void xe_tlb_inval_fence_init(struct xe_tlb_inval *tlb_inval,spin_lock_irq (&tlb_inval->lock);dma_fence_init (&fence->base, &inval_fence_ops, &tlb_inval->lock, -dma_fence_context_alloc (1 ),1 ); +dma_fence_context_alloc (1 ),1 ,0 );spin_unlock_irq (&tlb_inval->lock);INIT_LIST_HEAD (&fence->link);if (stack)
drivers/gpu/host1x/fence.c +1 -1
@@ -136,7 +136,7 @@ struct dma_fence *host1x_fence_create(struct host1x_syncpt *sp, u32 threshold, fence->timeout = timeout;dma_fence_init (&fence->base, &host1x_syncpt_fence_ops, &sp->fences.lock, -dma_fence_context_alloc (1 ),0 ); +dma_fence_context_alloc (1 ),0 ,0 );INIT_DELAYED_WORK (&fence->timeout_work, do_fence_timeout);
drivers/iio/industrialio-buffer.c +1 -1
@@ -1904,7 +1904,7 @@ static int iio_buffer_enqueue_dmabuf(struct iio_dev_buffer_pair *ib,* the dma_fence. */ dma_fence_init (&fence->base, &iio_buffer_dma_fence_ops, - &fence->lock, priv->context, seqno); + &fence->lock, priv->context, seqno,0 ); ret =iio_dma_resv_lock (dmabuf, nonblock);if (ret)
drivers/usb/gadget/function/f_fs.c +1 -1
@@ -1733,7 +1733,7 @@ static int ffs_dmabuf_transfer(struct file *file, seqno =atomic_add_return (1 , &epfile->seqno);dma_fence_init (&fence->base, &ffs_dmabuf_fence_ops, - &priv->lock, priv->context, seqno); + &priv->lock, priv->context, seqno,0 ); resv_dir = epfile->in ?DMA_RESV_USAGE_READ :DMA_RESV_USAGE_WRITE ;
include/linux/dma-fence.h +9 -3
@@ -103,6 +103,12 @@ struct dma_fence {int error; }; +/** enum dma_fence_flag_bits - internal dma_fence flags +* +* These flags are all only for internal usage, except for +* @DMA_FENCE_FLAG_SEQNO64_BIT and the user bits beginning at +* @DMA_FENCE_FLAG_USER_BITS. +*/ enum dma_fence_flag_bits {DMA_FENCE_FLAG_INITIALIZED_BIT ,DMA_FENCE_FLAG_INLINE_LOCK_BIT ,
@@ -110,6 +116,7 @@ enum dma_fence_flag_bits {DMA_FENCE_FLAG_SIGNALED_BIT ,DMA_FENCE_FLAG_TIMESTAMP_BIT ,DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT , + DMA_FENCE_FLAG_USER_BITS, /* must always be last member */ };
@@ -279,11 +286,10 @@ struct dma_fence_ops { };void dma_fence_init (struct dma_fence *fence,const struct dma_fence_ops *ops, -spinlock_t *lock,u64 context,u64 seqno); - +spinlock_t *lock,u64 context,u64 seqno, +unsigned long flags);void dma_fence_init64 (struct dma_fence *fence,const struct dma_fence_ops *ops,spinlock_t *lock,u64 context,u64 seqno); -void dma_fence_release (struct kref *kref);void dma_fence_free (struct dma_fence *fence);void dma_fence_describe (struct dma_fence *fence,struct seq_file *seq);
rust/kernel/dma_buf/dma_fence.rs +1 -1
@@ -736,7 +736,7 @@ pub fn new_fence(self) -> DriverFence<'a, T> {// SAFETY: `fence_ptr` has been created directly above. It will live // at least as long as `Self`. The same applies to `&Self::OPS`. unsafe { - bindings::dma_fence_init (fence_ptr, self.ops, null_ptr, self.data.fctx.nr, seqno) + bindings::dma_fence_init (fence_ptr, self.ops, null_ptr, self.data.fctx.nr, seqno,0 ) }; self.data.fctx.nr_of_unsignaled_fences.fetch_add (1 ,Relaxed );
Signature · 1 line
2.56.0
[email protected]
AI reviewRe: [PATCH 1/3] dma-buf: dma-fence: Add flags parameter to dma_fence_init()
Sashiko has reviewed this patch and found no issues.
Quoted 7 lines
Currently, there are two init functions for
dma_fence,dma_fence_init()anddma_fence_init64().Since more future user options for
dma_fenceinitialization would require distinct init functions, too, it is better to do this in a unified way.
Quoted 7 lines
Add a flags field to
dma_fence_init(). Adjust all affected drivers, preserving the old behavior.Support the SEQNO64 flag, and add a check-function so that the user only sets valid bits.
Signed-off-by Philipp Stanner <[email protected]>
Sashiko has reviewed this patch and found no issues.
Signature · 1 line
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=1
Tvrtko Ursulin
maintainerRe: [PATCH 1/3] dma-buf: dma-fence: Add flags parameter to dma_fence_init()
In reply to Philipp Stanner[I aggresively rewrote the To: list because my SMTP won't let me send this as it was.]
Quoted 6 lines · Philipp Stanner
Currently, there are two init functions for
dma_fence,dma_fence_init()anddma_fence_init64().Since more future user options for
dma_fenceinitialization would require distinct init functions, too, it is better to do this in a unified way.
Why not add something like dma_fence_init_flags() and leave the 99% of the callers out of the (huge) diff? Ie. just port dma_fence_init64() to dma_fence_init_flags().
Also best to move the addition of dma_fence_flags_invalid() to the patch which adds dma_fence_init_flags() and not have it in this one which is supposed to be functionality neutral.
Regards,
Tvrtko
Quoted 781 lines
Add a flags field to
dma_fence_init(). Adjust all affected drivers, preserving the old behavior.Support the SEQNO64 flag, and add a check-function so that the user only sets valid bits.
Signed-off-by Philipp Stanner <[email protected]>--- drivers/accel/amdxdna/amdxdna_ctx.c | 2 +- drivers/accel/ethosu/ethosu_job.c | 2 +- drivers/accel/ivpu/ivpu_job.c | 2 +- drivers/accel/rocket/rocket_job.c | 2 +- drivers/dma-buf/dma-fence-array.c | 2 +- drivers/dma-buf/dma-fence.c | 31 ++++++++++++++++--- drivers/dma-buf/st-dma-fence-chain.c | 2 +- drivers/dma-buf/st-dma-fence-unwrap.c | 2 +- drivers/dma-buf/st-dma-fence.c | 2 +- drivers/dma-buf/st-dma-resv.c | 2 +- drivers/dma-buf/sw_sync.c | 2 +- .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 2 +- drivers/gpu/drm/drm_crtc.c | 2 +- drivers/gpu/drm/drm_writeback.c | 2 +- drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 2 +- drivers/gpu/drm/i915/i915_request.c | 2 +- drivers/gpu/drm/i915/i915_sw_fence_work.c | 2 +- drivers/gpu/drm/i915/i915_vma_resource.c | 2 +- .../gpu/drm/i915/selftests/i915_sw_fence.c | 2 +- drivers/gpu/drm/imagination/pvr_ccb.c | 2 +- drivers/gpu/drm/imagination/pvr_queue.c | 2 +- drivers/gpu/drm/lima/lima_sched.c | 2 +- drivers/gpu/drm/msm/msm_fence.c | 2 +- drivers/gpu/drm/nouveau/nouveau_fence.c | 4 +-- drivers/gpu/drm/panfrost/panfrost_job.c | 2 +- drivers/gpu/drm/panthor/panthor_sched.c | 2 +- drivers/gpu/drm/qxl/qxl_release.c | 2 +- drivers/gpu/drm/radeon/radeon_fence.c | 2 +- drivers/gpu/drm/scheduler/sched_fence.c | 4 +-- .../gpu/drm/scheduler/tests/mock_scheduler.c | 2 +- drivers/gpu/drm/ttm/tests/ttm_bo_test.c | 2 +- .../gpu/drm/ttm/tests/ttm_bo_validate_test.c | 2 +- drivers/gpu/drm/v3d/v3d_fence.c | 2 +- drivers/gpu/drm/vc4/vc4_gem.c | 2 +- drivers/gpu/drm/vgem/vgem_fence.c | 2 +- drivers/gpu/drm/virtio/virtgpu_fence.c | 2 +- drivers/gpu/drm/vmwgfx/vmwgfx_fence.c | 2 +- drivers/gpu/drm/xe/xe_hw_fence.c | 2 +- drivers/gpu/drm/xe/xe_oa.c | 2 +- drivers/gpu/drm/xe/xe_preempt_fence.c | 2 +- drivers/gpu/drm/xe/xe_tlb_inval.c | 2 +- drivers/gpu/host1x/fence.c | 2 +- drivers/iio/industrialio-buffer.c | 2 +- drivers/usb/gadget/function/f_fs.c | 2 +- include/linux/dma-fence.h | 12 +++++-- rust/kernel/dma_buf/dma_fence.rs | 2 +- 48 files changed, 83 insertions(+), 56 deletions(-)drivers/accel/amdxdna/amdxdna_ctx.c +1
-1@@ -53,7 +53,7 @@ static struct dma_fence *amdxdna_fence_create(struct amdxdna_hwctx *hwctx)spin_lock_init (&fence->lock);/* Unique timeline context prevents eviction from shared BO reservation. */ -dma_fence_init (&fence->base, &fence_ops, &fence->lock,dma_fence_context_alloc (1 ),0 ); +dma_fence_init (&fence->base, &fence_ops, &fence->lock,dma_fence_context_alloc (1 ),0 ,0 );return &fence->base; }drivers/accel/ethosu/ethosu_job.c +1
-1@@ -219,7 +219,7 @@ static struct dma_fence *ethosu_job_run(struct drm_sched_job *sched_job)return NULL ;dma_fence_init (fence, ðosu_fence_ops, &dev->fence_lock, - dev->fence_context, ++dev->emit_seqno); + dev->fence_context, ++dev->emit_seqno,0 );dma_fence_get (fence);ethosu_switch_perfmon (dev, job);drivers/accel/ivpu/ivpu_job.c +1
-1@@ -519,7 +519,7 @@ static struct dma_fence *ivpu_fence_create(struct ivpu_device *vdev) fence->vdev = vdev;spin_lock_init (&fence->lock); -dma_fence_init (&fence->base, &ivpu_fence_ops, &fence->lock,dma_fence_context_alloc (1 ),1 ); +dma_fence_init (&fence->base, &ivpu_fence_ops, &fence->lock,dma_fence_context_alloc (1 ),1 ,0 );return &fence->base; }drivers/accel/rocket/rocket_job.c +1
-1@@ -61,7 +61,7 @@ static struct dma_fence *rocket_fence_create(struct rocket_core *core)return ERR_PTR (-ENOMEM );dma_fence_init (fence, &rocket_fence_ops, &core->fence_lock, - core->fence_context, ++core->emit_seqno); + core->fence_context, ++core->emit_seqno,0 );return fence; }drivers/dma-buf/dma-fence-array.c +1
-1@@ -205,7 +205,7 @@ void dma_fence_array_init(struct dma_fence_array *array, array->num_fences = num_fences;dma_fence_init (&array->base, &dma_fence_array_ops,NULL , context, - seqno); + seqno,0 );init_irq_work (&array->work, irq_dma_fence_array_work);/* drivers/dma-buf/dma-fence.c +26
-5@@ -122,7 +122,7 @@ static const struct dma_fence_ops dma_fence_stub_ops = {static int __init dma_fence_init_stub (void ) { -dma_fence_init (&dma_fence_stub, &dma_fence_stub_ops,NULL ,0 ,0 ); +dma_fence_init (&dma_fence_stub, &dma_fence_stub_ops,NULL ,0 ,0 ,0 );set_bit (DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT , &dma_fence_stub.flags);dma_fence_signal (&dma_fence_stub);@@ -156,7 +156,7 @@ struct dma_fence *dma_fence_allocate_private_stub(ktime_t timestamp)if (fence ==NULL )return NULL ; -dma_fence_init (fence, &dma_fence_stub_ops,NULL ,0 ,0 ); +dma_fence_init (fence, &dma_fence_stub_ops,NULL ,0 ,0 ,0 );set_bit (DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT , &fence->flags);@@ -1063,7 +1063,6 @@ __dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops, spinlock_t *lock, u64 context, u64 seqno, unsigned long flags) { BUG_ON(!ops || !ops->get_driver_name || !ops->get_timeline_name); -kref_init (&fence->refcount);/* * While it is counter intuitive to protect a constant function pointer @@ -1087,6 +1086,21 @@ __dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops,trace_dma_fence_init (fence); } +static bool dma_fence_flags_invalid (unsigned long flags) +{ +const unsigned long valid_fence_bits = +BIT (DMA_FENCE_FLAG_SEQNO64_BIT ); +const unsigned long valid_user_bits = +GENMASK ( + BITS_PER_TYPE(unsigned long) - 1, +DMA_FENCE_FLAG_USER_BITS + ); +const unsigned long invalid_bits = + ~(valid_fence_bits | valid_user_bits); + +return flags & invalid_bits; +} +/** * dma_fence_init - Initialize a custom fence. * @fence: the fence to initialize @@ -1094,6 +1108,7 @@ __dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops,* @lock: optional irqsafe spinlock to use for locking this fence * @context: the execution context this fence is run on * @seqno: a linear increasing sequence number for this context +* @flags: flags modifying a fence's behavior * * Initializes an allocated fence, the caller doesn't have to keep its * refcount after committing with this fence, but it will need to hold a @@ -1108,12 +1123,18 @@ __dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops,* introduction of the callback, but the external lock is still around. New * users MUST NOT use external locks, as they force the issuer to outlive all * fences that reference the lock. +* +* The @flags you can specify here are either DMA_FENCE_FLAG_SEQNO64_BIT or +* user-specified bits >= DMA_FENCE_FLAG_USER_BITS. */ void dma_fence_init (struct dma_fence *fence,const struct dma_fence_ops *ops, -spinlock_t *lock,u64 context,u64 seqno) +spinlock_t *lock,u64 context,u64 seqno, +unsigned long flags) { -__dma_fence_init (fence, ops, lock, context, seqno,0UL ); +WARN_ON (dma_fence_flags_invalid (flags)); + +__dma_fence_init (fence, ops, lock, context, seqno, flags); }EXPORT_SYMBOL (dma_fence_init);drivers/dma-buf/st-dma-fence-chain.c +1
-1@@ -52,7 +52,7 @@ static struct dma_fence *mock_fence(void)return NULL ;spin_lock_init (&f->lock); -dma_fence_init (&f->base, &mock_ops, &f->lock,0 ,0 ); +dma_fence_init (&f->base, &mock_ops, &f->lock,0 ,0 ,0 );return &f->base; }drivers/dma-buf/st-dma-fence-unwrap.c +1
-1@@ -36,7 +36,7 @@ static struct dma_fence *__mock_fence(u64 context, u64 seqno)return NULL ;spin_lock_init (&f->lock); -dma_fence_init (&f->base, &mock_ops, &f->lock, context, seqno); +dma_fence_init (&f->base, &mock_ops, &f->lock, context, seqno,0 );return &f->base; }drivers/dma-buf/st-dma-fence.c +1
-1@@ -31,7 +31,7 @@ static struct dma_fence *mock_fence(void)if (!f)return NULL ; -dma_fence_init (f, &mock_ops,NULL ,0 ,0 ); +dma_fence_init (f, &mock_ops,NULL ,0 ,0 ,0 );return f; }drivers/dma-buf/st-dma-resv.c +1
-1@@ -35,7 +35,7 @@ static struct dma_fence *alloc_fence(void)if (!f)return NULL ; -dma_fence_init (f, &fence_ops, &fence_lock,0 ,0 ); +dma_fence_init (f, &fence_ops, &fence_lock,0 ,0 ,0 );return f; }drivers/dma-buf/sw_sync.c +1
-1@@ -258,7 +258,7 @@ static struct sync_pt *sync_pt_create(struct sync_timeline *obj,sync_timeline_get (obj);dma_fence_init (&pt->base, &timeline_fence_ops, &obj->lock, - obj->context, value); + obj->context, value,0 );INIT_LIST_HEAD (&pt->link);spin_lock_irq (&obj->lock);drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c +1
-1@@ -77,7 +77,7 @@ struct amdgpu_amdkfd_fence *amdgpu_amdkfd_fence_create(u64 context,spin_lock_init (&fence->lock); fence->context_id = context_id;dma_fence_init (&fence->base, &amdkfd_fence_ops, &fence->lock, - context,atomic_inc_return (&fence_seq)); + context,atomic_inc_return (&fence_seq),0 );return fence; }drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c +1
-1@@ -112,7 +112,7 @@ void amdgpu_fence_emit(struct amdgpu_ring *ring, struct amdgpu_fence *af, seq = ++ring->fence_drv.sync_seq;dma_fence_init (fence, &amdgpu_fence_ops, &ring->fence_drv.lock, - adev->fence_context + ring->idx, seq); + adev->fence_context + ring->idx, seq,0 );amdgpu_ring_emit_fence (ring, ring->fence_drv.gpu_addr, seq, flags |AMDGPU_FENCE_FLAG_INT );drivers/gpu/drm/drm_crtc.c +1
-1@@ -190,7 +190,7 @@ struct dma_fence *drm_crtc_create_fence(struct drm_crtc *crtc)return NULL ;dma_fence_init (fence, &drm_crtc_fence_ops, &crtc->fence_lock, - crtc->fence_context, ++crtc->fence_seqno); + crtc->fence_context, ++crtc->fence_seqno,0 );return fence; }drivers/gpu/drm/drm_writeback.c +1
-1@@ -592,7 +592,7 @@ drm_writeback_get_out_fence(struct drm_writeback_connector *wb_connector)dma_fence_init (fence, &drm_writeback_fence_ops, &wb_connector->fence_lock, wb_connector->fence_context, - ++wb_connector->fence_seqno); + ++wb_connector->fence_seqno,0 );return fence; }drivers/gpu/drm/etnaviv/etnaviv_gpu.c +1
-1@@ -1199,7 +1199,7 @@ static struct dma_fence *etnaviv_gpu_fence_alloc(struct etnaviv_gpu *gpu) f->gpu = gpu;dma_fence_init (&f->base, &etnaviv_fence_ops, &gpu->fence_spinlock, - gpu->fence_context, ++gpu->next_fence); + gpu->fence_context, ++gpu->next_fence,0 );return &f->base; }drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c +1
-1@@ -437,7 +437,7 @@ i915_ttm_memcpy_work_arm(struct i915_ttm_memcpy_work *work,int ret;spin_lock_init (&work->lock); -dma_fence_init (&work->fence, &dma_fence_memcpy_ops, &work->lock,0 ,0 ); +dma_fence_init (&work->fence, &dma_fence_memcpy_ops, &work->lock,0 ,0 ,0 );dma_fence_get (&work->fence); ret =dma_fence_add_callback (dep, &work->cb, __memcpy_cb);if (ret) {drivers/gpu/drm/i915/i915_request.c +1
-1@@ -953,7 +953,7 @@ __i915_request_create(struct intel_context *ce, gfp_t gfp) goto err_free;dma_fence_init (&rq->fence, &i915_fence_ops, &rq->lock, - tl->fence_context, seqno); + tl->fence_context, seqno,0 );RCU_INIT_POINTER (rq->timeline, tl); rq->hwsp_seqno = tl->hwsp_seqno;drivers/gpu/drm/i915/i915_sw_fence_work.c +1
-1@@ -85,7 +85,7 @@ void dma_fence_work_init(struct dma_fence_work *f, { f->ops = ops;spin_lock_init (&f->lock); -dma_fence_init (&f->dma, &fence_ops, &f->lock,0 ,0 ); +dma_fence_init (&f->dma, &fence_ops, &f->lock,0 ,0 ,0 );i915_sw_fence_init (&f->chain, fence_notify);INIT_WORK (&f->work, fence_work); }drivers/gpu/drm/i915/i915_vma_resource.c +1
-1@@ -263,7 +263,7 @@ void __i915_vma_resource_init(struct i915_vma_resource *vma_res) {spin_lock_init (&vma_res->lock);dma_fence_init (&vma_res->unbind_fence, &unbind_fence_ops, - &vma_res->lock,0 ,0 ); + &vma_res->lock,0 ,0 ,0 );refcount_set (&vma_res->hold_count,1 );i915_sw_fence_init (&vma_res->chain, i915_vma_resource_fence_notify); }drivers/gpu/drm/i915/selftests/i915_sw_fence.c +1
-1@@ -641,7 +641,7 @@ static struct dma_fence *alloc_dma_fence(void) dma =kmalloc_obj (*dma);if (dma) -dma_fence_init (dma, &mock_fence_ops, &mock_fence_lock,0 ,0 ); +dma_fence_init (dma, &mock_fence_ops, &mock_fence_lock,0 ,0 ,0 );return dma; }drivers/gpu/drm/imagination/pvr_ccb.c +1
-1@@ -645,7 +645,7 @@ pvr_kccb_reserve_slot(struct pvr_device *pvr_dev, struct dma_fence *f)dma_fence_init (&fence->base, &pvr_kccb_fence_ops, &pvr_dev->kccb.fence_ctx.lock, pvr_dev->kccb.fence_ctx.id, -atomic_inc_return (&pvr_dev->kccb.fence_ctx.seqno)); +atomic_inc_return (&pvr_dev->kccb.fence_ctx.seqno),0 ); out_fence =dma_fence_get (&fence->base);list_add_tail (&fence->node, &pvr_dev->kccb.waiters); }else {drivers/gpu/drm/imagination/pvr_queue.c +1
-1@@ -305,7 +305,7 @@ pvr_queue_fence_init(struct dma_fence *f,INIT_WORK (&fence->release_work, pvr_queue_fence_release_work);dma_fence_init (&fence->base, fence_ops, &fence_ctx->lock, fence_ctx->id, -atomic_inc_return (&fence_ctx->seqno)); +atomic_inc_return (&fence_ctx->seqno),0 ); }/** drivers/gpu/drm/lima/lima_sched.c +1
-1@@ -97,7 +97,7 @@ static struct lima_fence *lima_fence_create(struct lima_sched_pipe *pipe) fence->pipe = pipe;dma_fence_init (&fence->base, &lima_fence_ops, &pipe->fence_lock, - pipe->fence_context, ++pipe->fence_seqno); + pipe->fence_context, ++pipe->fence_seqno,0 );return fence; }drivers/gpu/drm/msm/msm_fence.c +1
-1@@ -197,5 +197,5 @@ msm_fence_init(struct dma_fence *fence, struct msm_fence_context *fctx)WARN_ON (kref_read (&fence->refcount));dma_fence_init (&f->base, &msm_fence_ops, &fctx->spinlock, - fctx->context, ++fctx->last_fence); + fctx->context, ++fctx->last_fence,0 ); }drivers/gpu/drm/nouveau/nouveau_fence.c +2
-2@@ -216,10 +216,10 @@ nouveau_fence_emit(struct nouveau_fence *fence)if (priv->uevent)dma_fence_init (&fence->base, &nouveau_fence_ops_uevent, - &fctx->lock, fctx->context, ++fctx->sequence); + &fctx->lock, fctx->context, ++fctx->sequence,0 );else dma_fence_init (&fence->base, &nouveau_fence_ops_legacy, - &fctx->lock, fctx->context, ++fctx->sequence); + &fctx->lock, fctx->context, ++fctx->sequence,0 );kref_get (&fctx->fence_ref); ret = fctx->emit (fence);drivers/gpu/drm/panfrost/panfrost_job.c +1
-1@@ -105,7 +105,7 @@ static struct dma_fence *panfrost_fence_create(struct panfrost_device *pfdev, in fence->queue = js_num; fence->seqno = ++js->queue[js_num].emit_seqno;dma_fence_init (&fence->base, &panfrost_fence_ops, &js->job_lock, - js->queue[js_num].fence_context, fence->seqno); + js->queue[js_num].fence_context, fence->seqno,0 );return &fence->base; }drivers/gpu/drm/panthor/panthor_sched.c +1
-1@@ -3322,7 +3322,7 @@ queue_run_job(struct drm_sched_job *sched_job) &panthor_queue_fence_ops, &queue->fence_ctx.lock, queue->fence_ctx.id, - atomic64_inc_return(&queue->fence_ctx.seqno)); + atomic64_inc_return(&queue->fence_ctx.seqno), 0); job->profiling.slot = queue->profiling.seqno++;if (queue->profiling.seqno == queue->profiling.slot_count)drivers/gpu/drm/qxl/qxl_release.c +1
-1@@ -430,7 +430,7 @@ void qxl_release_fence_buffer_objects(struct qxl_release *release)* set the highest bits. This will break if we really allow exporting of dma-bufs. */ dma_fence_init (&release->base, &qxl_fence_ops, &qdev->release_lock, - release->id |0xf0000000 , release->base.seqno); + release->id |0xf0000000 , release->base.seqno,0 );trace_dma_fence_emit (&release->base);list_for_each_entry (entry, &release->bos, list) {drivers/gpu/drm/radeon/radeon_fence.c +1
-1@@ -148,7 +148,7 @@ int radeon_fence_emit(struct radeon_device *rdev,dma_fence_init (&(*fence)->base, &radeon_fence_ops, &rdev->fence_queue.lock, rdev->fence_context + ring, - seq); + seq,0 );radeon_fence_ring_emit (rdev, ring, *fence);trace_radeon_fence_emit (rdev_to_drm (rdev), ring, (*fence)->seq);radeon_fence_schedule_check (rdev, ring);drivers/gpu/drm/scheduler/sched_fence.c +2
-2@@ -229,9 +229,9 @@ void drm_sched_fence_init(struct drm_sched_fence *fence, fence->sched = entity->rq->sched; seq =atomic_inc_return (&entity->fence_seq);dma_fence_init (&fence->scheduled, &drm_sched_fence_ops_scheduled, - &fence->lock, entity->fence_context, seq); + &fence->lock, entity->fence_context, seq,0 );dma_fence_init (&fence->finished, &drm_sched_fence_ops_finished, - &fence->lock, entity->fence_context +1 , seq); + &fence->lock, entity->fence_context +1 , seq,0 ); }module_init (drm_sched_fence_slab_init);drivers/gpu/drm/scheduler/tests/mock_scheduler.c +1
-1@@ -173,7 +173,7 @@ static struct dma_fence *mock_sched_run_job(struct drm_sched_job *sched_job) &drm_mock_sched_hw_fence_ops, &sched->lock, sched->hw_timeline.context, - atomic_inc_return(&sched->hw_timeline.next_seqno)); + atomic_inc_return(&sched->hw_timeline.next_seqno), 0);dma_fence_get (&job->hw_fence);/* Reference for the job_list */ drivers/gpu/drm/ttm/tests/ttm_bo_test.c +1
-1@@ -450,7 +450,7 @@ static void ttm_bo_fini_shared_resv(struct kunit *test)KUNIT_ASSERT_NOT_NULL (test, fence);spin_lock_init (&fence_lock); -dma_fence_init (fence, &mock_fence_ops, &fence_lock,0 ,0 ); +dma_fence_init (fence, &mock_fence_ops, &fence_lock,0 ,0 ,0 );dma_resv_lock (external_resv,NULL );dma_resv_reserve_fences (external_resv,1 );drivers/gpu/drm/ttm/tests/ttm_bo_validate_test.c +1
-1@@ -57,7 +57,7 @@ static struct dma_fence *alloc_mock_fence(struct kunit *test) fence =kunit_kzalloc (test,sizeof (*fence),GFP_KERNEL );KUNIT_ASSERT_NOT_NULL (test, fence); -dma_fence_init (fence, &fence_ops, &fence_lock,0 ,0 ); +dma_fence_init (fence, &fence_ops, &fence_lock,0 ,0 ,0 );return fence; }drivers/gpu/drm/v3d/v3d_fence.c +1
-1@@ -16,7 +16,7 @@ struct dma_fence *v3d_fence_create(struct v3d_dev *v3d, enum v3d_queue q) fence->queue = q; fence->seqno = ++queue->emit_seqno;dma_fence_init (&fence->base, &v3d_fence_ops, &queue->queue_lock, - queue->fence_context, fence->seqno); + queue->fence_context, fence->seqno,0 );return &fence->base; }drivers/gpu/drm/vc4/vc4_gem.c +1
-1@@ -648,7 +648,7 @@ vc4_queue_submit(struct drm_device *dev, struct vc4_exec_info *exec, exec->seqno = seqno;dma_fence_init (&fence->base, &vc4_fence_ops, &vc4->job_lock, - vc4->dma_fence_context, exec->seqno); + vc4->dma_fence_context, exec->seqno,0 ); fence->seqno = exec->seqno; exec->fence = &fence->base;drivers/gpu/drm/vgem/vgem_fence.c +1
-1@@ -77,7 +77,7 @@ static struct dma_fence *vgem_fence_create(struct vgem_file *vfile,spin_lock_init (&fence->lock);dma_fence_init (&fence->base, &vgem_fence_ops, &fence->lock, -dma_fence_context_alloc (1 ),1 ); +dma_fence_context_alloc (1 ),1 ,0 );timer_setup (&fence->timer, vgem_fence_timeout,TIMER_IRQSAFE );drivers/gpu/drm/virtio/virtgpu_fence.c +1
-1@@ -76,7 +76,7 @@ struct virtio_gpu_fence *virtio_gpu_fence_alloc(struct virtio_gpu_device *vgdev,*/ dma_fence_init (&fence->f, &virtio_gpu_fence_ops, &drv->lock, - fence_context,0 ); + fence_context,0 ,0 );return fence; }drivers/gpu/drm/vmwgfx/vmwgfx_fence.c +1
-1@@ -163,7 +163,7 @@ static int vmw_fence_obj_init(struct vmw_fence_manager *fman,int ret =0 ;dma_fence_init (&fence->base, &vmw_fence_ops, &fman->lock, - fman->ctx, seqno); + fman->ctx, seqno,0 ); fence->destroy = destroy;spin_lock (&fman->lock);drivers/gpu/drm/xe/xe_hw_fence.c +1
-1@@ -243,7 +243,7 @@ void xe_hw_fence_init(struct dma_fence *fence, struct xe_hw_fence_ctx *ctx,INIT_LIST_HEAD (&hw_fence->irq_link);dma_fence_init (fence, &xe_hw_fence_ops, &ctx->irq->lock, - ctx->dma_fence_ctx, ctx->next_seqno++); + ctx->dma_fence_ctx, ctx->next_seqno++,0 );trace_xe_hw_fence_create (hw_fence); }drivers/gpu/drm/xe/xe_oa.c +1
-1@@ -1053,7 +1053,7 @@ static int xe_oa_emit_oa_config(struct xe_oa_stream *stream, struct xe_oa_config/* Point of no return: initialize and set fence to signal */ spin_lock_init (&ofence->lock); -dma_fence_init (&ofence->base, &xe_oa_fence_ops, &ofence->lock,0 ,0 ); +dma_fence_init (&ofence->base, &xe_oa_fence_ops, &ofence->lock,0 ,0 ,0 );for (i =0 ; i < stream->num_syncs; i++) {if (stream->syncs[i].flags &DRM_XE_SYNC_FLAG_SIGNAL )drivers/gpu/drm/xe/xe_preempt_fence.c +1
-1@@ -154,7 +154,7 @@ xe_preempt_fence_arm(struct xe_preempt_fence *pfence, struct xe_exec_queue *q, pfence->q =xe_exec_queue_get (q);spin_lock_init (&pfence->lock);dma_fence_init (&pfence->base, &preempt_fence_ops, - &pfence->lock, context, seqno); + &pfence->lock, context, seqno,0 );return &pfence->base; }drivers/gpu/drm/xe/xe_tlb_inval.c +1
-1@@ -544,7 +544,7 @@ void xe_tlb_inval_fence_init(struct xe_tlb_inval *tlb_inval,spin_lock_irq (&tlb_inval->lock);dma_fence_init (&fence->base, &inval_fence_ops, &tlb_inval->lock, -dma_fence_context_alloc (1 ),1 ); +dma_fence_context_alloc (1 ),1 ,0 );spin_unlock_irq (&tlb_inval->lock);INIT_LIST_HEAD (&fence->link);if (stack)drivers/gpu/host1x/fence.c +1
-1@@ -136,7 +136,7 @@ struct dma_fence *host1x_fence_create(struct host1x_syncpt *sp, u32 threshold, fence->timeout = timeout;dma_fence_init (&fence->base, &host1x_syncpt_fence_ops, &sp->fences.lock, -dma_fence_context_alloc (1 ),0 ); +dma_fence_context_alloc (1 ),0 ,0 );INIT_DELAYED_WORK (&fence->timeout_work, do_fence_timeout);drivers/iio/industrialio-buffer.c +1
-1@@ -1904,7 +1904,7 @@ static int iio_buffer_enqueue_dmabuf(struct iio_dev_buffer_pair *ib,* the dma_fence. */ dma_fence_init (&fence->base, &iio_buffer_dma_fence_ops, - &fence->lock, priv->context, seqno); + &fence->lock, priv->context, seqno,0 ); ret =iio_dma_resv_lock (dmabuf, nonblock);if (ret)drivers/usb/gadget/function/f_fs.c +1
-1@@ -1733,7 +1733,7 @@ static int ffs_dmabuf_transfer(struct file *file, seqno =atomic_add_return (1 , &epfile->seqno);dma_fence_init (&fence->base, &ffs_dmabuf_fence_ops, - &priv->lock, priv->context, seqno); + &priv->lock, priv->context, seqno,0 ); resv_dir = epfile->in ?DMA_RESV_USAGE_READ :DMA_RESV_USAGE_WRITE ;include/linux/dma-fence.h +9
-3@@ -103,6 +103,12 @@ struct dma_fence {int error; }; +/** enum dma_fence_flag_bits - internal dma_fence flags +* +* These flags are all only for internal usage, except for +* @DMA_FENCE_FLAG_SEQNO64_BIT and the user bits beginning at +* @DMA_FENCE_FLAG_USER_BITS. +*/ enum dma_fence_flag_bits {DMA_FENCE_FLAG_INITIALIZED_BIT ,DMA_FENCE_FLAG_INLINE_LOCK_BIT ,@@ -110,6 +116,7 @@ enum dma_fence_flag_bits {DMA_FENCE_FLAG_SIGNALED_BIT ,DMA_FENCE_FLAG_TIMESTAMP_BIT ,DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT , + DMA_FENCE_FLAG_USER_BITS, /* must always be last member */ };@@ -279,11 +286,10 @@ struct dma_fence_ops { };void dma_fence_init (struct dma_fence *fence,const struct dma_fence_ops *ops, -spinlock_t *lock,u64 context,u64 seqno); - +spinlock_t *lock,u64 context,u64 seqno, +unsigned long flags);void dma_fence_init64 (struct dma_fence *fence,const struct dma_fence_ops *ops,spinlock_t *lock,u64 context,u64 seqno); -void dma_fence_release (struct kref *kref);void dma_fence_free (struct dma_fence *fence);void dma_fence_describe (struct dma_fence *fence,struct seq_file *seq);rust/kernel/dma_buf/dma_fence.rs +1
-1@@ -736,7 +736,7 @@ pub fn new_fence(self) -> DriverFence<'a, T> {// SAFETY: `fence_ptr` has been created directly above. It will live // at least as long as `Self`. The same applies to `&Self::OPS`. unsafe { - bindings::dma_fence_init (fence_ptr, self.ops, null_ptr, self.data.fctx.nr, seqno) + bindings::dma_fence_init (fence_ptr, self.ops, null_ptr, self.data.fctx.nr, seqno,0 ) }; self.data.fctx.nr_of_unsignaled_fences.fetch_add (1 ,Relaxed );
Christian König
maintainerRe: [PATCH 1/3] dma-buf: dma-fence: Add flags parameter to dma_fence_init()
Quoted 4 lines · Tvrtko Ursulin
[I aggresively rewrote the To: list because my SMTP won't let me send this as it was.]
On 05/11/2026 11:35, Philipp Stanner wrote:
Quoted 8 lines
Quoted 6 lines
Currently, there are two init functions for
dma_fence,dma_fence_init()anddma_fence_init64().Since more future user options for
dma_fenceinitialization would require distinct init functions, too, it is better to do this in a unified way.Why not add something like
dma_fence_init_flags()and leave the 99% of the callers out of the (huge) diff? Ie. just portdma_fence_init64()todma_fence_init_flags().
Well one advantage of the Linux kernel is to avoid such wrappers. I think having more than one function for the same thing basically just adds more confusion.
That's also why I would really like to just have one dma_fence_signal() and not like five (or was it four?) variants.
Quoted 1 line
Also best to move the addition of
dma_fence_flags_invalid()to the patch which addsdma_fence_init_flags()and not have it in this one which is supposed to be functionality neutral.
Well this is the first time you can actually specify flags so that kind of makes sense to now add the check as well.
Regards,
Christian.
Quoted 706 lines
Regards,
Tvrtko
Quoted 700 lines
Add a flags field to
dma_fence_init(). Adjust all affected drivers, preserving the old behavior.Support the SEQNO64 flag, and add a check-function so that the user only sets valid bits.
Signed-off-by Philipp Stanner <[email protected]>---
drivers/accel/amdxdna/amdxdna_ctx.c | 2 +- drivers/accel/ethosu/ethosu_job.c | 2 +- drivers/accel/ivpu/ivpu_job.c | 2 +- drivers/accel/rocket/rocket_job.c | 2 +- drivers/dma-buf/dma-fence-array.c | 2 +- drivers/dma-buf/dma-fence.c | 31 ++++++++++++++++--- drivers/dma-buf/st-dma-fence-chain.c | 2 +- drivers/dma-buf/st-dma-fence-unwrap.c | 2 +- drivers/dma-buf/st-dma-fence.c | 2 +- drivers/dma-buf/st-dma-resv.c | 2 +- drivers/dma-buf/sw_sync.c | 2 +- .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 2 +- drivers/gpu/drm/drm_crtc.c | 2 +- drivers/gpu/drm/drm_writeback.c | 2 +- drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 2 +- drivers/gpu/drm/i915/i915_request.c | 2 +- drivers/gpu/drm/i915/i915_sw_fence_work.c | 2 +- drivers/gpu/drm/i915/i915_vma_resource.c | 2 +- .../gpu/drm/i915/selftests/i915_sw_fence.c | 2 +- drivers/gpu/drm/imagination/pvr_ccb.c | 2 +- drivers/gpu/drm/imagination/pvr_queue.c | 2 +- drivers/gpu/drm/lima/lima_sched.c | 2 +- drivers/gpu/drm/msm/msm_fence.c | 2 +-drivers/gpu/drm/nouveau/nouveau_fence.c | 4 +-- drivers/gpu/drm/panfrost/panfrost_job.c | 2 +- drivers/gpu/drm/panthor/panthor_sched.c | 2 +-drivers/gpu/drm/qxl/qxl_release.c | 2 +- drivers/gpu/drm/radeon/radeon_fence.c | 2 +- drivers/gpu/drm/scheduler/sched_fence.c | 4 +-- .../gpu/drm/scheduler/tests/mock_scheduler.c | 2 +- drivers/gpu/drm/ttm/tests/ttm_bo_test.c | 2 +- .../gpu/drm/ttm/tests/ttm_bo_validate_test.c | 2 +- drivers/gpu/drm/v3d/v3d_fence.c | 2 +- drivers/gpu/drm/vc4/vc4_gem.c | 2 +- drivers/gpu/drm/vgem/vgem_fence.c | 2 +- drivers/gpu/drm/virtio/virtgpu_fence.c | 2 +- drivers/gpu/drm/vmwgfx/vmwgfx_fence.c | 2 +- drivers/gpu/drm/xe/xe_hw_fence.c | 2 +- drivers/gpu/drm/xe/xe_oa.c | 2 +- drivers/gpu/drm/xe/xe_preempt_fence.c | 2 +- drivers/gpu/drm/xe/xe_tlb_inval.c | 2 +- drivers/gpu/host1x/fence.c | 2 +- drivers/iio/industrialio-buffer.c | 2 +- drivers/usb/gadget/function/f_fs.c | 2 +- include/linux/dma-fence.h | 12 +++++-- rust/kernel/dma_buf/dma_fence.rs | 2 +-
48 files changed, 83 insertions(+), 56 deletions(-)drivers/accel/amdxdna/amdxdna_ctx.c +1
-1@@ -53,7 +53,7 @@ static struct dma_fence *amdxdna_fence_create(struct amdxdna_hwctx *hwctx) spin_lock_init(&fence->lock); /* Unique timeline context prevents eviction from shared BO reservation. */ - dma_fence_init(&fence->base, &fence_ops, &fence->lock, dma_fence_context_alloc(1), 0); + dma_fence_init(&fence->base, &fence_ops, &fence->lock, dma_fence_context_alloc(1), 0, 0); return &fence->base; }diff --git
a/drivers/accel/ethosu/ethosu_job.cb/drivers/accel/ethosu/ethosu_job.cindexd656b3ec670e..d4fc71436cae100644drivers/accel/ethosu/ethosu_job.c +1
-1@@ -219,7 +219,7 @@ static struct dma_fence *ethosu_job_run(struct drm_sched_job *sched_job) return NULL; dma_fence_init(fence, ðosu_fence_ops, &dev->fence_lock, - dev->fence_context, ++dev->emit_seqno); + dev->fence_context, ++dev->emit_seqno, 0); dma_fence_get(fence); ethosu_switch_perfmon(dev, job);drivers/accel/ivpu/ivpu_job.c +1
-1@@ -519,7 +519,7 @@ static struct dma_fence *ivpu_fence_create(struct ivpu_device *vdev) fence->vdev = vdev; spin_lock_init(&fence->lock); - dma_fence_init(&fence->base, &ivpu_fence_ops, &fence->lock, dma_fence_context_alloc(1), 1); + dma_fence_init(&fence->base, &ivpu_fence_ops, &fence->lock, dma_fence_context_alloc(1), 1, 0); return &fence->base; }drivers/accel/rocket/rocket_job.c +1
-1@@ -61,7 +61,7 @@ static struct dma_fence *rocket_fence_create(struct rocket_core *core) return ERR_PTR(-ENOMEM); dma_fence_init(fence, &rocket_fence_ops, &core->fence_lock, - core->fence_context, ++core->emit_seqno); + core->fence_context, ++core->emit_seqno, 0); return fence; }drivers/dma-buf/dma-fence-array.c +1
-1@@ -205,7 +205,7 @@ void dma_fence_array_init(struct dma_fence_array *array, array->num_fences = num_fences; dma_fence_init(&array->base, &dma_fence_array_ops, NULL, context, - seqno); + seqno, 0); init_irq_work(&array->work, irq_dma_fence_array_work); /*drivers/dma-buf/dma-fence.c +2
-1@@ -122,7 +122,7 @@ static const struct dma_fence_ops dma_fence_stub_ops = { static int __init dma_fence_init_stub(void) { - dma_fence_init(&dma_fence_stub, &dma_fence_stub_ops, NULL, 0, 0); + dma_fence_init(&dma_fence_stub, &dma_fence_stub_ops, NULL, 0, 0, 0); set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, &dma_fence_stub.flags); dma_fence_signal(&dma_fence_stub);@@ -156,7 +156,7 @@ struct dma_fence *dma_fence_allocate_private_stub(ktime_t timestamp) if (fence == NULL) return NULL; - dma_fence_init(fence, &dma_fence_stub_ops, NULL, 0, 0); + dma_fence_init(fence, &dma_fence_stub_ops, NULL, 0, 0, 0); set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, &fence->flags); @@ -1063,7 +1063,6 @@ __dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops,
spinlock_t*lock, u64 context, u64 seqno, unsigned long flags) {
BUG_ON(!ops || !ops->get_driver_name || !ops->get_timeline_name); -
kref_init(&fence->refcount);
/*
* While it is counter intuitive to protect a constant function pointerdrivers/dma-buf/dma-fence.c +18
-0@@ -1087,6 +1086,21 @@ __dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops, trace_dma_fence_init(fence); } +static bool dma_fence_flags_invalid(unsigned long flags) +{ + const unsigned long valid_fence_bits = + BIT(DMA_FENCE_FLAG_SEQNO64_BIT); + const unsigned long valid_user_bits = + GENMASK( + BITS_PER_TYPE(unsigned long) - 1, + DMA_FENCE_FLAG_USER_BITS + ); + const unsigned long invalid_bits = + ~(valid_fence_bits | valid_user_bits); + + return flags & invalid_bits; +} + /*** dma_fence_init - Initialize a custom fence. * @fence: the fence to initialize @@ -1094,6 +1108,7 @@ __dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops, * @lock: optional irqsafe spinlock to use for locking this fence * @context: the execution context this fence is run on * @seqno: a linear increasing sequence number for this context + * @flags: flags modifying a fence's behavior * * Initializes an allocated fence, the caller doesn't have to keep its * refcount after committing with this fence, but it will need to hold a@@ -1108,12 +1123,18 @@ __dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops,* introduction of the callback, but the external lock is still around. New * users MUST NOT use external locks, as they force the issuer to outlive all * fences that reference the lock. +* +* The @flags you can specify here are either DMA_FENCE_FLAG_SEQNO64_BIT or +* user-specified bits >= DMA_FENCE_FLAG_USER_BITS. */ void
dma_fence_init(structdma_fence*fence, const structdma_fence_ops*ops, -spinlock_t*lock, u64 context, u64 seqno)
+spinlock_t*lock, u64 context, u64 seqno,
+ unsigned long flags)
{
-__dma_fence_init(fence, ops, lock, context, seqno, 0UL);
+ WARN_ON(dma_fence_flags_invalid(flags));
+
+__dma_fence_init(fence, ops, lock, context, seqno, flags);
}
EXPORT_SYMBOL(dma_fence_init);
diff --gita/drivers/dma-buf/st-dma-fence-chain.cb/drivers/dma-buf/st-dma-fence-chain.cindexe0d9b69bfa76..b9610df3ff19100644drivers/dma-buf/st-dma-fence-chain.c +1
-1@@ -52,7 +52,7 @@ static struct dma_fence *mock_fence(void) return NULL; spin_lock_init(&f->lock); - dma_fence_init(&f->base, &mock_ops, &f->lock, 0, 0); + dma_fence_init(&f->base, &mock_ops, &f->lock, 0, 0, 0); return &f->base; }drivers/dma-buf/st-dma-fence-unwrap.c +1
-1@@ -36,7 +36,7 @@ static struct dma_fence *__mock_fence(u64 context, u64 seqno) return NULL; spin_lock_init(&f->lock); - dma_fence_init(&f->base, &mock_ops, &f->lock, context, seqno); + dma_fence_init(&f->base, &mock_ops, &f->lock, context, seqno, 0); return &f->base; }drivers/dma-buf/st-dma-fence.c +1
-0@@ -31,7 +31,7 @@ static struct dma_fence *mock_fence(void) if (!f) return NULL; - dma_fence_init(f, &mock_ops, NULL, 0, 0); + dma_fence_init(f, &mock_ops, NULL, 0, 0, 0); return f; }diff --git
a/drivers/dma-buf/st-dma-resv.cb/drivers/dma-buf/st-dma-resv.cindex0b96136bbd54..c3a920ab3fcf100644drivers/dma-buf/st-dma-resv.c +1
-0@@ -35,7 +35,7 @@ static struct dma_fence *alloc_fence(void) if (!f) return NULL; - dma_fence_init(f, &fence_ops, &fence_lock, 0, 0); + dma_fence_init(f, &fence_ops, &fence_lock, 0, 0, 0); return f; }diff --git
a/drivers/dma-buf/sw_sync.cb/drivers/dma-buf/sw_sync.cindex8df20b0218a9..ce43af7e735e100644drivers/dma-buf/sw_sync.c +1
-1@@ -258,7 +258,7 @@ static struct sync_pt *sync_pt_create(struct sync_timeline *obj, sync_timeline_get(obj); dma_fence_init(&pt->base, &timeline_fence_ops, &obj->lock, - obj->context, value); + obj->context, value, 0); INIT_LIST_HEAD(&pt->link); spin_lock_irq(&obj->lock);drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c +1
-1@@ -77,7 +77,7 @@ struct amdgpu_amdkfd_fence *amdgpu_amdkfd_fence_create(u64 context, spin_lock_init(&fence->lock); fence->context_id = context_id; dma_fence_init(&fence->base, &amdkfd_fence_ops, &fence->lock, - context, atomic_inc_return(&fence_seq)); + context, atomic_inc_return(&fence_seq), 0); return fence; }drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c +1
-1@@ -112,7 +112,7 @@ void amdgpu_fence_emit(struct amdgpu_ring *ring, struct amdgpu_fence *af, seq = ++ring->fence_drv.sync_seq; dma_fence_init(fence, &amdgpu_fence_ops, &ring->fence_drv.lock, - adev->fence_context + ring->idx, seq); + adev->fence_context + ring->idx, seq, 0); amdgpu_ring_emit_fence(ring, ring->fence_drv.gpu_addr, seq, flags | AMDGPU_FENCE_FLAG_INT);drivers/gpu/drm/drm_crtc.c +1
-1@@ -190,7 +190,7 @@ struct dma_fence *drm_crtc_create_fence(struct drm_crtc *crtc) return NULL; dma_fence_init(fence, &drm_crtc_fence_ops, &crtc->fence_lock, - crtc->fence_context, ++crtc->fence_seqno); + crtc->fence_context, ++crtc->fence_seqno, 0); return fence; }drivers/gpu/drm/drm_writeback.c +1
-1@@ -592,7 +592,7 @@ drm_writeback_get_out_fence(struct drm_writeback_connector *wb_connector) dma_fence_init(fence, &drm_writeback_fence_ops, &wb_connector->fence_lock, wb_connector->fence_context, - ++wb_connector->fence_seqno); + ++wb_connector->fence_seqno, 0); return fence; }drivers/gpu/drm/etnaviv/etnaviv_gpu.c +1
-1@@ -1199,7 +1199,7 @@ static struct dma_fence *etnaviv_gpu_fence_alloc(struct etnaviv_gpu *gpu) f->gpu = gpu; dma_fence_init(&f->base, &etnaviv_fence_ops, &gpu->fence_spinlock, - gpu->fence_context, ++gpu->next_fence); + gpu->fence_context, ++gpu->next_fence, 0); return &f->base; }drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c +1
-1@@ -437,7 +437,7 @@ i915_ttm_memcpy_work_arm(struct i915_ttm_memcpy_work *work, int ret; spin_lock_init(&work->lock); - dma_fence_init(&work->fence, &dma_fence_memcpy_ops, &work->lock, 0, 0); + dma_fence_init(&work->fence, &dma_fence_memcpy_ops, &work->lock, 0, 0, 0); dma_fence_get(&work->fence); ret = dma_fence_add_callback(dep, &work->cb, __memcpy_cb); if (ret) {drivers/gpu/drm/i915/i915_request.c +1
-1@@ -953,7 +953,7 @@ __i915_request_create(struct intel_context *ce, gfp_t gfp) goto err_free; dma_fence_init(&rq->fence, &i915_fence_ops, &rq->lock, - tl->fence_context, seqno); + tl->fence_context, seqno, 0); RCU_INIT_POINTER(rq->timeline, tl); rq->hwsp_seqno = tl->hwsp_seqno;drivers/gpu/drm/i915/i915_sw_fence_work.c +1
-1@@ -85,7 +85,7 @@ void dma_fence_work_init(struct dma_fence_work *f, { f->ops = ops; spin_lock_init(&f->lock); - dma_fence_init(&f->dma, &fence_ops, &f->lock, 0, 0); + dma_fence_init(&f->dma, &fence_ops, &f->lock, 0, 0, 0); i915_sw_fence_init(&f->chain, fence_notify); INIT_WORK(&f->work, fence_work); }drivers/gpu/drm/i915/i915_vma_resource.c +1
-1@@ -263,7 +263,7 @@ void __i915_vma_resource_init(struct i915_vma_resource *vma_res) { spin_lock_init(&vma_res->lock); dma_fence_init(&vma_res->unbind_fence, &unbind_fence_ops, - &vma_res->lock, 0, 0); + &vma_res->lock, 0, 0, 0); refcount_set(&vma_res->hold_count, 1); i915_sw_fence_init(&vma_res->chain, i915_vma_resource_fence_notify); }drivers/gpu/drm/i915/selftests/i915_sw_fence.c +1
-1@@ -641,7 +641,7 @@ static struct dma_fence *alloc_dma_fence(void) dma = kmalloc_obj(*dma); if (dma) - dma_fence_init(dma, &mock_fence_ops, &mock_fence_lock, 0, 0); + dma_fence_init(dma, &mock_fence_ops, &mock_fence_lock, 0, 0, 0); return dma; }drivers/gpu/drm/imagination/pvr_ccb.c +1
-1@@ -645,7 +645,7 @@ pvr_kccb_reserve_slot(struct pvr_device *pvr_dev, struct dma_fence *f) dma_fence_init(&fence->base, &pvr_kccb_fence_ops, &pvr_dev->kccb.fence_ctx.lock, pvr_dev->kccb.fence_ctx.id, - atomic_inc_return(&pvr_dev->kccb.fence_ctx.seqno)); + atomic_inc_return(&pvr_dev->kccb.fence_ctx.seqno), 0); out_fence = dma_fence_get(&fence->base); list_add_tail(&fence->node, &pvr_dev->kccb.waiters); } else {drivers/gpu/drm/imagination/pvr_queue.c +1
-1@@ -305,7 +305,7 @@ pvr_queue_fence_init(struct dma_fence *f, INIT_WORK(&fence->release_work, pvr_queue_fence_release_work); dma_fence_init(&fence->base, fence_ops, &fence_ctx->lock, fence_ctx->id, - atomic_inc_return(&fence_ctx->seqno)); + atomic_inc_return(&fence_ctx->seqno), 0); } /**drivers/gpu/drm/lima/lima_sched.c +1
-1@@ -97,7 +97,7 @@ static struct lima_fence *lima_fence_create(struct lima_sched_pipe *pipe) fence->pipe = pipe; dma_fence_init(&fence->base, &lima_fence_ops, &pipe->fence_lock, - pipe->fence_context, ++pipe->fence_seqno); + pipe->fence_context, ++pipe->fence_seqno, 0); return fence; }drivers/gpu/drm/msm/msm_fence.c +1
-1@@ -197,5 +197,5 @@ msm_fence_init(struct dma_fence *fence, struct msm_fence_context *fctx) WARN_ON(kref_read(&fence->refcount)); dma_fence_init(&f->base, &msm_fence_ops, &fctx->spinlock, - fctx->context, ++fctx->last_fence); + fctx->context, ++fctx->last_fence, 0); }drivers/gpu/drm/nouveau/nouveau_fence.c +1
-1@@ -216,10 +216,10 @@ nouveau_fence_emit(struct nouveau_fence *fence) if (priv->uevent) dma_fence_init(&fence->base, &nouveau_fence_ops_uevent, - &fctx->lock, fctx->context, ++fctx->sequence); + &fctx->lock, fctx->context, ++fctx->sequence, 0);else
dma_fence_init(&fence->base,&nouveau_fence_ops_legacy, -&fctx->lock,fctx->context, ++fctx->sequence); +&fctx->lock,fctx->context, ++fctx->sequence, 0);kref_get(&fctx->fence_ref);
ret =fctx->emit(fence);drivers/gpu/drm/panfrost/panfrost_job.c +1
-1@@ -105,7 +105,7 @@ static struct dma_fence *panfrost_fence_create(struct panfrost_device *pfdev, in fence->queue = js_num; fence->seqno = ++js->queue[js_num].emit_seqno; dma_fence_init(&fence->base, &panfrost_fence_ops, &js->job_lock, - js->queue[js_num].fence_context, fence->seqno); + js->queue[js_num].fence_context, fence->seqno, 0); return &fence->base; }drivers/gpu/drm/panthor/panthor_sched.c +1
-1@@ -3322,7 +3322,7 @@ queue_run_job(struct drm_sched_job *sched_job) &panthor_queue_fence_ops, &queue->fence_ctx.lock, queue->fence_ctx.id, - atomic64_inc_return(&queue->fence_ctx.seqno)); + atomic64_inc_return(&queue->fence_ctx.seqno), 0); job->profiling.slot = queue->profiling.seqno++; if (queue->profiling.seqno == queue->profiling.slot_count)drivers/gpu/drm/qxl/qxl_release.c +1
-1@@ -430,7 +430,7 @@ void qxl_release_fence_buffer_objects(struct qxl_release *release)* set the highest bits. This will break if we really allow exporting of dma-bufs. */ dma_fence_init(&release->base, &qxl_fence_ops, &qdev->release_lock, - release->id | 0xf0000000, release->base.seqno); + release->id | 0xf0000000, release->base.seqno, 0); trace_dma_fence_emit(&release->base); list_for_each_entry(entry, &release->bos, list) {drivers/gpu/drm/radeon/radeon_fence.c +1
-1@@ -148,7 +148,7 @@ int radeon_fence_emit(struct radeon_device *rdev, dma_fence_init(&(*fence)->base, &radeon_fence_ops, &rdev->fence_queue.lock, rdev->fence_context + ring, - seq); + seq, 0); radeon_fence_ring_emit(rdev, ring, *fence); trace_radeon_fence_emit(rdev_to_drm(rdev), ring, (*fence)->seq); radeon_fence_schedule_check(rdev, ring);drivers/gpu/drm/scheduler/sched_fence.c +2
-2@@ -229,9 +229,9 @@ void drm_sched_fence_init(struct drm_sched_fence *fence, fence->sched = entity->rq->sched; seq = atomic_inc_return(&entity->fence_seq); dma_fence_init(&fence->scheduled, &drm_sched_fence_ops_scheduled, - &fence->lock, entity->fence_context, seq); + &fence->lock, entity->fence_context, seq, 0); dma_fence_init(&fence->finished, &drm_sched_fence_ops_finished, - &fence->lock, entity->fence_context + 1, seq); + &fence->lock, entity->fence_context + 1, seq, 0); } module_init(drm_sched_fence_slab_init);drivers/gpu/drm/scheduler/tests/mock_scheduler.c +1
-1@@ -173,7 +173,7 @@ static struct dma_fence *mock_sched_run_job(struct drm_sched_job *sched_job) &drm_mock_sched_hw_fence_ops, &sched->lock, sched->hw_timeline.context, - atomic_inc_return(&sched->hw_timeline.next_seqno)); + atomic_inc_return(&sched->hw_timeline.next_seqno), 0);
dma_fence_get(&job->hw_fence); /* Reference for thejob_list*/
diff --gita/drivers/gpu/drm/ttm/tests/ttm_bo_test.cb/drivers/gpu/drm/ttm/tests/ttm_bo_test.cindexf3103307b5df..633cc7458505100644drivers/gpu/drm/ttm/tests/ttm_bo_test.c +1
-1@@ -450,7 +450,7 @@ static void ttm_bo_fini_shared_resv(struct kunit *test) KUNIT_ASSERT_NOT_NULL(test, fence); spin_lock_init(&fence_lock); - dma_fence_init(fence, &mock_fence_ops, &fence_lock, 0, 0); + dma_fence_init(fence, &mock_fence_ops, &fence_lock, 0, 0, 0); dma_resv_lock(external_resv, NULL); dma_resv_reserve_fences(external_resv, 1);drivers/gpu/drm/ttm/tests/ttm_bo_validate_test.c +1
-0@@ -57,7 +57,7 @@ static struct dma_fence *alloc_mock_fence(struct kunit *test) fence = kunit_kzalloc(test, sizeof(*fence), GFP_KERNEL); KUNIT_ASSERT_NOT_NULL(test, fence); - dma_fence_init(fence, &fence_ops, &fence_lock, 0, 0); + dma_fence_init(fence, &fence_ops, &fence_lock, 0, 0, 0); return fence; }drivers/gpu/drm/v3d/v3d_fence.c +1
-1@@ -16,7 +16,7 @@ struct dma_fence *v3d_fence_create(struct v3d_dev *v3d, enum v3d_queue q) fence->queue = q; fence->seqno = ++queue->emit_seqno; dma_fence_init(&fence->base, &v3d_fence_ops, &queue->queue_lock, - queue->fence_context, fence->seqno); + queue->fence_context, fence->seqno, 0); return &fence->base; }drivers/gpu/drm/vc4/vc4_gem.c +1
-1@@ -648,7 +648,7 @@ vc4_queue_submit(struct drm_device *dev, struct vc4_exec_info *exec, exec->seqno = seqno; dma_fence_init(&fence->base, &vc4_fence_ops, &vc4->job_lock, - vc4->dma_fence_context, exec->seqno); + vc4->dma_fence_context, exec->seqno, 0); fence->seqno = exec->seqno; exec->fence = &fence->base;diff --git
a/drivers/gpu/drm/vgem/vgem_fence.cb/drivers/gpu/drm/vgem/vgem_fence.cindex0e53ba7db629..18700e5f9167100644drivers/gpu/drm/vgem/vgem_fence.c +1
-1@@ -77,7 +77,7 @@ static struct dma_fence *vgem_fence_create(struct vgem_file *vfile, spin_lock_init(&fence->lock); dma_fence_init(&fence->base, &vgem_fence_ops, &fence->lock, - dma_fence_context_alloc(1), 1); + dma_fence_context_alloc(1), 1, 0); timer_setup(&fence->timer, vgem_fence_timeout, TIMER_IRQSAFE);diff --git
a/drivers/gpu/drm/virtio/virtgpu_fence.cb/drivers/gpu/drm/virtio/virtgpu_fence.cindexc3e66ef2133a..8e469391d2e4100644drivers/gpu/drm/virtio/virtgpu_fence.c +1
-1@@ -76,7 +76,7 @@ struct virtio_gpu_fence *virtio_gpu_fence_alloc(struct virtio_gpu_device *vgdev,*/ dma_fence_init(&fence->f, &virtio_gpu_fence_ops, &drv->lock, - fence_context, 0); + fence_context, 0, 0); return fence; }drivers/gpu/drm/vmwgfx/vmwgfx_fence.c +1
-1@@ -163,7 +163,7 @@ static int vmw_fence_obj_init(struct vmw_fence_manager *fman, int ret = 0; dma_fence_init(&fence->base, &vmw_fence_ops, &fman->lock, - fman->ctx, seqno); + fman->ctx, seqno, 0); fence->destroy = destroy; spin_lock(&fman->lock);drivers/gpu/drm/xe/xe_hw_fence.c +1
-1@@ -243,7 +243,7 @@ void xe_hw_fence_init(struct dma_fence *fence, struct xe_hw_fence_ctx *ctx, INIT_LIST_HEAD(&hw_fence->irq_link); dma_fence_init(fence, &xe_hw_fence_ops, &ctx->irq->lock, - ctx->dma_fence_ctx, ctx->next_seqno++); + ctx->dma_fence_ctx, ctx->next_seqno++, 0); trace_xe_hw_fence_create(hw_fence); }drivers/gpu/drm/xe/xe_oa.c +1
-1@@ -1053,7 +1053,7 @@ static int xe_oa_emit_oa_config(struct xe_oa_stream *stream, struct xe_oa_config /* Point of no return: initialize and set fence to signal */ spin_lock_init(&ofence->lock); - dma_fence_init(&ofence->base, &xe_oa_fence_ops, &ofence->lock, 0, 0); + dma_fence_init(&ofence->base, &xe_oa_fence_ops, &ofence->lock, 0, 0, 0); for (i = 0; i < stream->num_syncs; i++) { if (stream->syncs[i].flags & DRM_XE_SYNC_FLAG_SIGNAL)drivers/gpu/drm/xe/xe_preempt_fence.c +1
-1@@ -154,7 +154,7 @@ xe_preempt_fence_arm(struct xe_preempt_fence *pfence, struct xe_exec_queue *q, pfence->q = xe_exec_queue_get(q); spin_lock_init(&pfence->lock); dma_fence_init(&pfence->base, &preempt_fence_ops, - &pfence->lock, context, seqno); + &pfence->lock, context, seqno, 0); return &pfence->base; }drivers/gpu/drm/xe/xe_tlb_inval.c +1
-1@@ -544,7 +544,7 @@ void xe_tlb_inval_fence_init(struct xe_tlb_inval *tlb_inval, spin_lock_irq(&tlb_inval->lock); dma_fence_init(&fence->base, &inval_fence_ops, &tlb_inval->lock, - dma_fence_context_alloc(1), 1); + dma_fence_context_alloc(1), 1, 0); spin_unlock_irq(&tlb_inval->lock); INIT_LIST_HEAD(&fence->link); if (stack)drivers/gpu/host1x/fence.c +1
-1@@ -136,7 +136,7 @@ struct dma_fence *host1x_fence_create(struct host1x_syncpt *sp, u32 threshold, fence->timeout = timeout; dma_fence_init(&fence->base, &host1x_syncpt_fence_ops, &sp->fences.lock, - dma_fence_context_alloc(1), 0); + dma_fence_context_alloc(1), 0, 0); INIT_DELAYED_WORK(&fence->timeout_work, do_fence_timeout);diff --git
a/drivers/iio/industrialio-buffer.cb/drivers/iio/industrialio-buffer.cindex4294101810fd..f7d6b294b63c100644drivers/iio/industrialio-buffer.c +1
-1@@ -1904,7 +1904,7 @@ static int iio_buffer_enqueue_dmabuf(struct iio_dev_buffer_pair *ib,* the dma_fence. */ dma_fence_init(&fence->base, &iio_buffer_dma_fence_ops, - &fence->lock, priv->context, seqno); + &fence->lock, priv->context, seqno, 0); ret = iio_dma_resv_lock(dmabuf, nonblock); if (ret)drivers/usb/gadget/function/f_fs.c +1
-1@@ -1733,7 +1733,7 @@ static int ffs_dmabuf_transfer(struct file *file, seqno = atomic_add_return(1, &epfile->seqno); dma_fence_init(&fence->base, &ffs_dmabuf_fence_ops, - &priv->lock, priv->context, seqno); + &priv->lock, priv->context, seqno, 0); resv_dir = epfile->in ? DMA_RESV_USAGE_READ : DMA_RESV_USAGE_WRITE;diff --git
a/include/linux/dma-fence.hb/include/linux/dma-fence.hindexdd07d128adc3..6f5c245d89ec100644include/linux/dma-fence.h +0
-0@@ -103,6 +103,12 @@ struct dma_fence { int error; };+/** enum
dma_fence_flag_bits- internaldma_fenceflags
+ *
+ * These flags are all only for internal usage, except for
+ * @DMA_FENCE_FLAG_SEQNO64_BIT and the user bits beginning at
+ * @DMA_FENCE_FLAG_USER_BITS.
+ */
enumdma_fence_flag_bits{DMA_FENCE_FLAG_INITIALIZED_BIT,DMA_FENCE_FLAG_INLINE_LOCK_BIT,include/linux/dma-fence.h +1
-0@@ -110,6 +116,7 @@ enum dma_fence_flag_bits { DMA_FENCE_FLAG_SIGNALED_BIT, DMA_FENCE_FLAG_TIMESTAMP_BIT, DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, +
DMA_FENCE_FLAG_USER_BITS, /* must always be last member */
};
@@ -279,11 +286,10 @@ structdma_fence_ops{
};
void dma_fence_init(structdma_fence*fence, const structdma_fence_ops*ops, -spinlock_t*lock, u64 context, u64 seqno);
-
+spinlock_t*lock, u64 context, u64 seqno,
+ unsigned long flags);
voiddma_fence_init64(struct dma_fence *fence, const struct dma_fence_ops *ops, spinlock_t *lock, u64 context, u64 seqno);
-
voiddma_fence_release(struct kref *kref);
voiddma_fence_free(struct dma_fence *fence);
voiddma_fence_describe(struct dma_fence *fence, struct seq_file *seq);rust/kernel/dma_buf/dma_fence.rs +1
-1@@ -736,7 +736,7 @@ pub fn new_fence(self) -> DriverFence<'a, T> { // SAFETY: `fence_ptr` has been created directly above. It will live // at least as long as `Self`. The same applies to `&Self::OPS`. unsafe { - bindings::dma_fence_init(fence_ptr, self.ops, null_ptr, self.data.fctx.nr, seqno) + bindings::dma_fence_init(fence_ptr, self.ops, null_ptr, self.data.fctx.nr, seqno, 0) }; self.data.fctx.nr_of_unsignaled_fences.fetch_add(1, Relaxed);
Re: [PATCH 1/3] dma-buf: dma-fence: Add flags parameter to dma_fence_init()
-Cc rust-for-linux, since it was typo'ed and now misses the thread anyways..
Quoted 15 lines · Christian König
Quoted 14 lines · Tvrtko Ursulin
[I aggresively rewrote the To: list because my SMTP won't let me send this as it was.]
Quoted 8 lines · Philipp Stanner
Currently, there are two init functions for
dma_fence,dma_fence_init()
anddma_fence_init64().Since more future user options for
dma_fenceinitialization would require distinct init functions, too, it is better to do this in a
unified way.
Quoted 7 lines
Quoted 3 lines
Why not add something like
dma_fence_init_flags()and leave the 99% of the callers out of the (huge) diff? Ie. just portdma_fence_init64()todma_fence_init_flags().Well one advantage of the Linux kernel is to avoid such wrappers. I think having more than one function for the same thing basically just adds more confusion.
Do you think all future users would want SEQNO64 by default, btw?
Quoted 3 lines
That's also why I would really like to just have one
dma_fence_signal()and not like five (or was it four?) variants.
It should be dma_fence_signal(fence, error), anihilating dma_fence_set_error(), which is just another massive incentive to add race conditions.
P.
Christian König
maintainerRe: [PATCH 1/3] dma-buf: dma-fence: Add flags parameter to dma_fence_init()
Quoted 22 lines · Philipp Stanner
-Cc rust-for-linux, since it was typo'ed and now misses the thread anyways..
Quoted 19 lines · Christian König
Quoted 17 lines · Tvrtko Ursulin
[I aggresively rewrote the To: list because my SMTP won't let me send this as it was.]
Quoted 8 lines · Philipp Stanner
Currently, there are two init functions for
dma_fence,dma_fence_init()
anddma_fence_init64().Since more future user options for
dma_fenceinitialization would require distinct init functions, too, it is better to do this in a
unified way.Why not add something like
dma_fence_init_flags()and leave the 99% of the callers out of the (huge) diff? Ie. just portdma_fence_init64()todma_fence_init_flags().
Quoted 5 lines
Quoted 3 lines
Well one advantage of the Linux kernel is to avoid such wrappers. I think having more than one function for the same thing basically just adds more confusion.
Do you think all future users would want SEQNO64 by default, btw?
I was considering to invert the flag meaning, e.g. have SEQNO32 instead of SEQNO64.
But as I recently learned even on brand new x86 Intel CPUs you can do non 64bit aligned 64bit writes (yeah x86 architecture!) and PCIe devices see that as two 32bit writes to system memory which might or might not read coherently.
So assuming all future HW will be 64bit is clearly not possible.
Quoted 7 lines
Quoted 3 lines
That's also why I would really like to just have one
dma_fence_signal()and not like five (or was it four?) variants.It should be
dma_fence_signal(fence, error), anihilatingdma_fence_set_error(), which is just another massive incentive to add race conditions.
Yeah I'm largely in favor of that as well.
Regards,
Christian.
Quoted 3 lines
P.
Tvrtko Ursulin
maintainerRe: [PATCH 1/3] dma-buf: dma-fence: Add flags parameter to dma_fence_init()
In reply to Christian KönigQuoted 8 lines · Christian König
Quoted 7 lines · Tvrtko Ursulin
[I aggresively rewrote the To: list because my SMTP won't let me send this as it was.]
Quoted 3 lines · Philipp Stanner
Currently, there are two init functions for
dma_fence,dma_fence_init()anddma_fence_init64().
Quoted 7 lines
Quoted 5 lines
Quoted 3 lines
Since more future user options for
dma_fenceinitialization would require distinct init functions, too, it is better to do this in a unified way.Why not add something like
dma_fence_init_flags()and leave the 99% of the callers out of the (huge) diff? Ie. just portdma_fence_init64()todma_fence_init_flags().Well one advantage of the Linux kernel is to avoid such wrappers. I think having more than one function for the same thing basically just adds more confusion.
Sure we can churn if we really want. But as 99% of callers will be passing 0 it's not even very readable. Another option is variadic like kmalloc_objs so flags can be optional. Anyway, for consideration only.
Quoted 5 lines
That's also why I would really like to just have one
dma_fence_signal()and not like five (or was it four?) variants.Quoted 1 line
Also best to move the addition of
dma_fence_flags_invalid()to the patch which addsdma_fence_init_flags()and not have it in this one which is supposed to be functionality neutral.Well this is the first time you can actually specify flags so that kind of makes sense to now add the check as well.
Right, that comment was together with suggestion to add the dma_fence_init_flags() as a separate patch.
Regards,
Tvrtko
Quoted 702 lines
Quoted 701 lines
Quoted 700 lines
Add a flags field to
dma_fence_init(). Adjust all affected drivers, preserving the old behavior.Support the SEQNO64 flag, and add a check-function so that the user only sets valid bits.
Signed-off-by Philipp Stanner <[email protected]>--- drivers/accel/amdxdna/amdxdna_ctx.c | 2 +- drivers/accel/ethosu/ethosu_job.c | 2 +- drivers/accel/ivpu/ivpu_job.c | 2 +- drivers/accel/rocket/rocket_job.c | 2 +- drivers/dma-buf/dma-fence-array.c | 2 +- drivers/dma-buf/dma-fence.c | 31 ++++++++++++++++--- drivers/dma-buf/st-dma-fence-chain.c | 2 +- drivers/dma-buf/st-dma-fence-unwrap.c | 2 +- drivers/dma-buf/st-dma-fence.c | 2 +- drivers/dma-buf/st-dma-resv.c | 2 +- drivers/dma-buf/sw_sync.c | 2 +- .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 2 +- drivers/gpu/drm/drm_crtc.c | 2 +- drivers/gpu/drm/drm_writeback.c | 2 +- drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 2 +- drivers/gpu/drm/i915/i915_request.c | 2 +- drivers/gpu/drm/i915/i915_sw_fence_work.c | 2 +- drivers/gpu/drm/i915/i915_vma_resource.c | 2 +- .../gpu/drm/i915/selftests/i915_sw_fence.c | 2 +- drivers/gpu/drm/imagination/pvr_ccb.c | 2 +- drivers/gpu/drm/imagination/pvr_queue.c | 2 +- drivers/gpu/drm/lima/lima_sched.c | 2 +- drivers/gpu/drm/msm/msm_fence.c | 2 +- drivers/gpu/drm/nouveau/nouveau_fence.c | 4 +-- drivers/gpu/drm/panfrost/panfrost_job.c | 2 +- drivers/gpu/drm/panthor/panthor_sched.c | 2 +- drivers/gpu/drm/qxl/qxl_release.c | 2 +- drivers/gpu/drm/radeon/radeon_fence.c | 2 +- drivers/gpu/drm/scheduler/sched_fence.c | 4 +-- .../gpu/drm/scheduler/tests/mock_scheduler.c | 2 +- drivers/gpu/drm/ttm/tests/ttm_bo_test.c | 2 +- .../gpu/drm/ttm/tests/ttm_bo_validate_test.c | 2 +- drivers/gpu/drm/v3d/v3d_fence.c | 2 +- drivers/gpu/drm/vc4/vc4_gem.c | 2 +- drivers/gpu/drm/vgem/vgem_fence.c | 2 +- drivers/gpu/drm/virtio/virtgpu_fence.c | 2 +- drivers/gpu/drm/vmwgfx/vmwgfx_fence.c | 2 +- drivers/gpu/drm/xe/xe_hw_fence.c | 2 +- drivers/gpu/drm/xe/xe_oa.c | 2 +- drivers/gpu/drm/xe/xe_preempt_fence.c | 2 +- drivers/gpu/drm/xe/xe_tlb_inval.c | 2 +- drivers/gpu/host1x/fence.c | 2 +- drivers/iio/industrialio-buffer.c | 2 +- drivers/usb/gadget/function/f_fs.c | 2 +- include/linux/dma-fence.h | 12 +++++-- rust/kernel/dma_buf/dma_fence.rs | 2 +- 48 files changed, 83 insertions(+), 56 deletions(-)drivers/accel/amdxdna/amdxdna_ctx.c +1
-1@@ -53,7 +53,7 @@ static struct dma_fence *amdxdna_fence_create(struct amdxdna_hwctx *hwctx) spin_lock_init(&fence->lock); /* Unique timeline context prevents eviction from shared BO reservation. */ - dma_fence_init(&fence->base, &fence_ops, &fence->lock, dma_fence_context_alloc(1), 0); + dma_fence_init(&fence->base, &fence_ops, &fence->lock, dma_fence_context_alloc(1), 0, 0); return &fence->base; } diff --git a/drivers/accel/ethosu/ethosu_job.c b/drivers/accel/ethosu/ethosu_job.cindex
d656b3ec670e..d4fc71436cae100644drivers/accel/ethosu/ethosu_job.c +1
-1@@ -219,7 +219,7 @@ static struct dma_fence *ethosu_job_run(struct drm_sched_job *sched_job) return NULL; dma_fence_init(fence, ðosu_fence_ops, &dev->fence_lock, - dev->fence_context, ++dev->emit_seqno); + dev->fence_context, ++dev->emit_seqno, 0); dma_fence_get(fence); ethosu_switch_perfmon(dev, job);drivers/accel/ivpu/ivpu_job.c +1
-1@@ -519,7 +519,7 @@ static struct dma_fence *ivpu_fence_create(struct ivpu_device *vdev) fence->vdev = vdev; spin_lock_init(&fence->lock); - dma_fence_init(&fence->base, &ivpu_fence_ops, &fence->lock, dma_fence_context_alloc(1), 1); + dma_fence_init(&fence->base, &ivpu_fence_ops, &fence->lock, dma_fence_context_alloc(1), 1, 0); return &fence->base; }drivers/accel/rocket/rocket_job.c +1
-1@@ -61,7 +61,7 @@ static struct dma_fence *rocket_fence_create(struct rocket_core *core) return ERR_PTR(-ENOMEM); dma_fence_init(fence, &rocket_fence_ops, &core->fence_lock, - core->fence_context, ++core->emit_seqno); + core->fence_context, ++core->emit_seqno, 0); return fence; }drivers/dma-buf/dma-fence-array.c +1
-1@@ -205,7 +205,7 @@ void dma_fence_array_init(struct dma_fence_array *array, array->num_fences = num_fences; dma_fence_init(&array->base, &dma_fence_array_ops, NULL, context, - seqno); + seqno, 0); init_irq_work(&array->work, irq_dma_fence_array_work); /*drivers/dma-buf/dma-fence.c +25
-4@@ -122,7 +122,7 @@ static const struct dma_fence_ops dma_fence_stub_ops = { static int __init dma_fence_init_stub(void) { - dma_fence_init(&dma_fence_stub, &dma_fence_stub_ops, NULL, 0, 0); + dma_fence_init(&dma_fence_stub, &dma_fence_stub_ops, NULL, 0, 0, 0); set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, &dma_fence_stub.flags); dma_fence_signal(&dma_fence_stub);@@ -156,7 +156,7 @@ struct dma_fence *dma_fence_allocate_private_stub(ktime_t timestamp) if (fence == NULL) return NULL; - dma_fence_init(fence, &dma_fence_stub_ops, NULL, 0, 0); + dma_fence_init(fence, &dma_fence_stub_ops, NULL, 0, 0, 0); set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, &fence->flags); @@ -1063,7 +1063,6 @@ __dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops, spinlock_t *lock, u64 context, u64 seqno, unsigned long flags) { BUG_ON(!ops || !ops->get_driver_name || !ops->get_timeline_name); - kref_init(&fence->refcount); /** While it is counter intuitive to protect a constant function pointer @@ -1087,6 +1086,21 @@ __dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops, trace_dma_fence_init(fence); } +static bool dma_fence_flags_invalid(unsigned long flags) +{ + const unsigned long valid_fence_bits = + BIT(DMA_FENCE_FLAG_SEQNO64_BIT); + const unsigned long valid_user_bits = + GENMASK( + BITS_PER_TYPE(unsigned long) - 1, + DMA_FENCE_FLAG_USER_BITS + ); + const unsigned long invalid_bits = + ~(valid_fence_bits | valid_user_bits); + + return flags & invalid_bits; +} + /*** dma_fence_init - Initialize a custom fence. * @fence: the fence to initialize @@ -1094,6 +1108,7 @@ __dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops, * @lock: optional irqsafe spinlock to use for locking this fence * @context: the execution context this fence is run on * @seqno: a linear increasing sequence number for this context + * @flags: flags modifying a fence's behavior * * Initializes an allocated fence, the caller doesn't have to keep its * refcount after committing with this fence, but it will need to hold a@@ -1108,12 +1123,18 @@ __dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops,* introduction of the callback, but the external lock is still around. New * users MUST NOT use external locks, as they force the issuer to outlive all * fences that reference the lock. +* +* The @flags you can specify here are either DMA_FENCE_FLAG_SEQNO64_BIT or +* user-specified bits >= DMA_FENCE_FLAG_USER_BITS. */ void dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops, - spinlock_t *lock, u64 context, u64 seqno) + spinlock_t *lock, u64 context, u64 seqno, + unsigned long flags) { - __dma_fence_init(fence, ops, lock, context, seqno, 0UL); + WARN_ON(dma_fence_flags_invalid(flags)); + + __dma_fence_init(fence, ops, lock, context, seqno, flags); } EXPORT_SYMBOL(dma_fence_init); diff --git a/drivers/dma-buf/st-dma-fence-chain.c b/drivers/dma-buf/st-dma-fence-chain.cindex
e0d9b69bfa76..b9610df3ff19100644drivers/dma-buf/st-dma-fence-chain.c +1
-1@@ -52,7 +52,7 @@ static struct dma_fence *mock_fence(void) return NULL; spin_lock_init(&f->lock); - dma_fence_init(&f->base, &mock_ops, &f->lock, 0, 0); + dma_fence_init(&f->base, &mock_ops, &f->lock, 0, 0, 0); return &f->base; }drivers/dma-buf/st-dma-fence-unwrap.c +1
-1@@ -36,7 +36,7 @@ static struct dma_fence *__mock_fence(u64 context, u64 seqno) return NULL; spin_lock_init(&f->lock); - dma_fence_init(&f->base, &mock_ops, &f->lock, context, seqno); + dma_fence_init(&f->base, &mock_ops, &f->lock, context, seqno, 0); return &f->base; }drivers/dma-buf/st-dma-fence.c +1
-0@@ -31,7 +31,7 @@ static struct dma_fence *mock_fence(void) if (!f) return NULL; - dma_fence_init(f, &mock_ops, NULL, 0, 0); + dma_fence_init(f, &mock_ops, NULL, 0, 0, 0); return f; } diff --git a/drivers/dma-buf/st-dma-resv.c b/drivers/dma-buf/st-dma-resv.cindex
0b96136bbd54..c3a920ab3fcf100644drivers/dma-buf/st-dma-resv.c +1
-0@@ -35,7 +35,7 @@ static struct dma_fence *alloc_fence(void) if (!f) return NULL; - dma_fence_init(f, &fence_ops, &fence_lock, 0, 0); + dma_fence_init(f, &fence_ops, &fence_lock, 0, 0, 0); return f; } diff --git a/drivers/dma-buf/sw_sync.c b/drivers/dma-buf/sw_sync.cindex
8df20b0218a9..ce43af7e735e100644drivers/dma-buf/sw_sync.c +1
-1@@ -258,7 +258,7 @@ static struct sync_pt *sync_pt_create(struct sync_timeline *obj, sync_timeline_get(obj); dma_fence_init(&pt->base, &timeline_fence_ops, &obj->lock, - obj->context, value); + obj->context, value, 0); INIT_LIST_HEAD(&pt->link); spin_lock_irq(&obj->lock);drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c +1
-1@@ -77,7 +77,7 @@ struct amdgpu_amdkfd_fence *amdgpu_amdkfd_fence_create(u64 context, spin_lock_init(&fence->lock); fence->context_id = context_id; dma_fence_init(&fence->base, &amdkfd_fence_ops, &fence->lock, - context, atomic_inc_return(&fence_seq)); + context, atomic_inc_return(&fence_seq), 0); return fence; }drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c +1
-1@@ -112,7 +112,7 @@ void amdgpu_fence_emit(struct amdgpu_ring *ring, struct amdgpu_fence *af, seq = ++ring->fence_drv.sync_seq; dma_fence_init(fence, &amdgpu_fence_ops, &ring->fence_drv.lock, - adev->fence_context + ring->idx, seq); + adev->fence_context + ring->idx, seq, 0); amdgpu_ring_emit_fence(ring, ring->fence_drv.gpu_addr, seq, flags | AMDGPU_FENCE_FLAG_INT);drivers/gpu/drm/drm_crtc.c +1
-1@@ -190,7 +190,7 @@ struct dma_fence *drm_crtc_create_fence(struct drm_crtc *crtc) return NULL; dma_fence_init(fence, &drm_crtc_fence_ops, &crtc->fence_lock, - crtc->fence_context, ++crtc->fence_seqno); + crtc->fence_context, ++crtc->fence_seqno, 0); return fence; }drivers/gpu/drm/drm_writeback.c +1
-1@@ -592,7 +592,7 @@ drm_writeback_get_out_fence(struct drm_writeback_connector *wb_connector) dma_fence_init(fence, &drm_writeback_fence_ops, &wb_connector->fence_lock, wb_connector->fence_context, - ++wb_connector->fence_seqno); + ++wb_connector->fence_seqno, 0); return fence; }drivers/gpu/drm/etnaviv/etnaviv_gpu.c +1
-1@@ -1199,7 +1199,7 @@ static struct dma_fence *etnaviv_gpu_fence_alloc(struct etnaviv_gpu *gpu) f->gpu = gpu; dma_fence_init(&f->base, &etnaviv_fence_ops, &gpu->fence_spinlock, - gpu->fence_context, ++gpu->next_fence); + gpu->fence_context, ++gpu->next_fence, 0); return &f->base; }drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c +1
-1@@ -437,7 +437,7 @@ i915_ttm_memcpy_work_arm(struct i915_ttm_memcpy_work *work, int ret; spin_lock_init(&work->lock); - dma_fence_init(&work->fence, &dma_fence_memcpy_ops, &work->lock, 0, 0); + dma_fence_init(&work->fence, &dma_fence_memcpy_ops, &work->lock, 0, 0, 0); dma_fence_get(&work->fence); ret = dma_fence_add_callback(dep, &work->cb, __memcpy_cb); if (ret) {drivers/gpu/drm/i915/i915_request.c +1
-1@@ -953,7 +953,7 @@ __i915_request_create(struct intel_context *ce, gfp_t gfp) goto err_free; dma_fence_init(&rq->fence, &i915_fence_ops, &rq->lock, - tl->fence_context, seqno); + tl->fence_context, seqno, 0); RCU_INIT_POINTER(rq->timeline, tl); rq->hwsp_seqno = tl->hwsp_seqno;drivers/gpu/drm/i915/i915_sw_fence_work.c +1
-1@@ -85,7 +85,7 @@ void dma_fence_work_init(struct dma_fence_work *f, { f->ops = ops; spin_lock_init(&f->lock); - dma_fence_init(&f->dma, &fence_ops, &f->lock, 0, 0); + dma_fence_init(&f->dma, &fence_ops, &f->lock, 0, 0, 0); i915_sw_fence_init(&f->chain, fence_notify); INIT_WORK(&f->work, fence_work); }drivers/gpu/drm/i915/i915_vma_resource.c +1
-1@@ -263,7 +263,7 @@ void __i915_vma_resource_init(struct i915_vma_resource *vma_res) { spin_lock_init(&vma_res->lock); dma_fence_init(&vma_res->unbind_fence, &unbind_fence_ops, - &vma_res->lock, 0, 0); + &vma_res->lock, 0, 0, 0); refcount_set(&vma_res->hold_count, 1); i915_sw_fence_init(&vma_res->chain, i915_vma_resource_fence_notify); }drivers/gpu/drm/i915/selftests/i915_sw_fence.c +1
-1@@ -641,7 +641,7 @@ static struct dma_fence *alloc_dma_fence(void) dma = kmalloc_obj(*dma); if (dma) - dma_fence_init(dma, &mock_fence_ops, &mock_fence_lock, 0, 0); + dma_fence_init(dma, &mock_fence_ops, &mock_fence_lock, 0, 0, 0); return dma; }drivers/gpu/drm/imagination/pvr_ccb.c +1
-1@@ -645,7 +645,7 @@ pvr_kccb_reserve_slot(struct pvr_device *pvr_dev, struct dma_fence *f) dma_fence_init(&fence->base, &pvr_kccb_fence_ops, &pvr_dev->kccb.fence_ctx.lock, pvr_dev->kccb.fence_ctx.id, - atomic_inc_return(&pvr_dev->kccb.fence_ctx.seqno)); + atomic_inc_return(&pvr_dev->kccb.fence_ctx.seqno), 0); out_fence = dma_fence_get(&fence->base); list_add_tail(&fence->node, &pvr_dev->kccb.waiters); } else {drivers/gpu/drm/imagination/pvr_queue.c +1
-1@@ -305,7 +305,7 @@ pvr_queue_fence_init(struct dma_fence *f, INIT_WORK(&fence->release_work, pvr_queue_fence_release_work); dma_fence_init(&fence->base, fence_ops, &fence_ctx->lock, fence_ctx->id, - atomic_inc_return(&fence_ctx->seqno)); + atomic_inc_return(&fence_ctx->seqno), 0); } /**drivers/gpu/drm/lima/lima_sched.c +1
-1@@ -97,7 +97,7 @@ static struct lima_fence *lima_fence_create(struct lima_sched_pipe *pipe) fence->pipe = pipe; dma_fence_init(&fence->base, &lima_fence_ops, &pipe->fence_lock, - pipe->fence_context, ++pipe->fence_seqno); + pipe->fence_context, ++pipe->fence_seqno, 0); return fence; }drivers/gpu/drm/msm/msm_fence.c +1
-1@@ -197,5 +197,5 @@ msm_fence_init(struct dma_fence *fence, struct msm_fence_context *fctx) WARN_ON(kref_read(&fence->refcount)); dma_fence_init(&f->base, &msm_fence_ops, &fctx->spinlock, - fctx->context, ++fctx->last_fence); + fctx->context, ++fctx->last_fence, 0); }drivers/gpu/drm/nouveau/nouveau_fence.c +2
-2@@ -216,10 +216,10 @@ nouveau_fence_emit(struct nouveau_fence *fence) if (priv->uevent) dma_fence_init(&fence->base, &nouveau_fence_ops_uevent, - &fctx->lock, fctx->context, ++fctx->sequence); + &fctx->lock, fctx->context, ++fctx->sequence, 0); else dma_fence_init(&fence->base, &nouveau_fence_ops_legacy, - &fctx->lock, fctx->context, ++fctx->sequence); + &fctx->lock, fctx->context, ++fctx->sequence, 0); kref_get(&fctx->fence_ref); ret = fctx->emit(fence);drivers/gpu/drm/panfrost/panfrost_job.c +1
-1@@ -105,7 +105,7 @@ static struct dma_fence *panfrost_fence_create(struct panfrost_device *pfdev, in fence->queue = js_num; fence->seqno = ++js->queue[js_num].emit_seqno; dma_fence_init(&fence->base, &panfrost_fence_ops, &js->job_lock, - js->queue[js_num].fence_context, fence->seqno); + js->queue[js_num].fence_context, fence->seqno, 0); return &fence->base; }drivers/gpu/drm/panthor/panthor_sched.c +1
-1@@ -3322,7 +3322,7 @@ queue_run_job(struct drm_sched_job *sched_job) &panthor_queue_fence_ops, &queue->fence_ctx.lock, queue->fence_ctx.id, - atomic64_inc_return(&queue->fence_ctx.seqno)); + atomic64_inc_return(&queue->fence_ctx.seqno), 0); job->profiling.slot = queue->profiling.seqno++; if (queue->profiling.seqno == queue->profiling.slot_count)drivers/gpu/drm/qxl/qxl_release.c +1
-1@@ -430,7 +430,7 @@ void qxl_release_fence_buffer_objects(struct qxl_release *release)* set the highest bits. This will break if we really allow exporting of dma-bufs. */ dma_fence_init(&release->base, &qxl_fence_ops, &qdev->release_lock, - release->id | 0xf0000000, release->base.seqno); + release->id | 0xf0000000, release->base.seqno, 0); trace_dma_fence_emit(&release->base); list_for_each_entry(entry, &release->bos, list) {drivers/gpu/drm/radeon/radeon_fence.c +1
-1@@ -148,7 +148,7 @@ int radeon_fence_emit(struct radeon_device *rdev, dma_fence_init(&(*fence)->base, &radeon_fence_ops, &rdev->fence_queue.lock, rdev->fence_context + ring, - seq); + seq, 0); radeon_fence_ring_emit(rdev, ring, *fence); trace_radeon_fence_emit(rdev_to_drm(rdev), ring, (*fence)->seq); radeon_fence_schedule_check(rdev, ring);drivers/gpu/drm/scheduler/sched_fence.c +2
-2@@ -229,9 +229,9 @@ void drm_sched_fence_init(struct drm_sched_fence *fence, fence->sched = entity->rq->sched; seq = atomic_inc_return(&entity->fence_seq); dma_fence_init(&fence->scheduled, &drm_sched_fence_ops_scheduled, - &fence->lock, entity->fence_context, seq); + &fence->lock, entity->fence_context, seq, 0); dma_fence_init(&fence->finished, &drm_sched_fence_ops_finished, - &fence->lock, entity->fence_context + 1, seq); + &fence->lock, entity->fence_context + 1, seq, 0); } module_init(drm_sched_fence_slab_init);drivers/gpu/drm/scheduler/tests/mock_scheduler.c +1
-1@@ -173,7 +173,7 @@ static struct dma_fence *mock_sched_run_job(struct drm_sched_job *sched_job) &drm_mock_sched_hw_fence_ops, &sched->lock, sched->hw_timeline.context, - atomic_inc_return(&sched->hw_timeline.next_seqno)); + atomic_inc_return(&sched->hw_timeline.next_seqno), 0); dma_fence_get(&job->hw_fence); /* Reference for the job_list */ diff --git a/drivers/gpu/drm/ttm/tests/ttm_bo_test.c b/drivers/gpu/drm/ttm/tests/ttm_bo_test.cindex
f3103307b5df..633cc7458505100644drivers/gpu/drm/ttm/tests/ttm_bo_test.c +1
-1@@ -450,7 +450,7 @@ static void ttm_bo_fini_shared_resv(struct kunit *test) KUNIT_ASSERT_NOT_NULL(test, fence); spin_lock_init(&fence_lock); - dma_fence_init(fence, &mock_fence_ops, &fence_lock, 0, 0); + dma_fence_init(fence, &mock_fence_ops, &fence_lock, 0, 0, 0); dma_resv_lock(external_resv, NULL); dma_resv_reserve_fences(external_resv, 1);drivers/gpu/drm/ttm/tests/ttm_bo_validate_test.c +1
-0@@ -57,7 +57,7 @@ static struct dma_fence *alloc_mock_fence(struct kunit *test) fence = kunit_kzalloc(test, sizeof(*fence), GFP_KERNEL); KUNIT_ASSERT_NOT_NULL(test, fence); - dma_fence_init(fence, &fence_ops, &fence_lock, 0, 0); + dma_fence_init(fence, &fence_ops, &fence_lock, 0, 0, 0); return fence; }drivers/gpu/drm/v3d/v3d_fence.c +1
-1@@ -16,7 +16,7 @@ struct dma_fence *v3d_fence_create(struct v3d_dev *v3d, enum v3d_queue q) fence->queue = q; fence->seqno = ++queue->emit_seqno; dma_fence_init(&fence->base, &v3d_fence_ops, &queue->queue_lock, - queue->fence_context, fence->seqno); + queue->fence_context, fence->seqno, 0); return &fence->base; }drivers/gpu/drm/vc4/vc4_gem.c +1
-1@@ -648,7 +648,7 @@ vc4_queue_submit(struct drm_device *dev, struct vc4_exec_info *exec, exec->seqno = seqno; dma_fence_init(&fence->base, &vc4_fence_ops, &vc4->job_lock, - vc4->dma_fence_context, exec->seqno); + vc4->dma_fence_context, exec->seqno, 0); fence->seqno = exec->seqno; exec->fence = &fence->base; diff --git a/drivers/gpu/drm/vgem/vgem_fence.c b/drivers/gpu/drm/vgem/vgem_fence.cindex
0e53ba7db629..18700e5f9167100644drivers/gpu/drm/vgem/vgem_fence.c +1
-1@@ -77,7 +77,7 @@ static struct dma_fence *vgem_fence_create(struct vgem_file *vfile, spin_lock_init(&fence->lock); dma_fence_init(&fence->base, &vgem_fence_ops, &fence->lock, - dma_fence_context_alloc(1), 1); + dma_fence_context_alloc(1), 1, 0); timer_setup(&fence->timer, vgem_fence_timeout, TIMER_IRQSAFE); diff --git a/drivers/gpu/drm/virtio/virtgpu_fence.c b/drivers/gpu/drm/virtio/virtgpu_fence.cindex
c3e66ef2133a..8e469391d2e4100644drivers/gpu/drm/virtio/virtgpu_fence.c +1
-1@@ -76,7 +76,7 @@ struct virtio_gpu_fence *virtio_gpu_fence_alloc(struct virtio_gpu_device *vgdev,*/ dma_fence_init(&fence->f, &virtio_gpu_fence_ops, &drv->lock, - fence_context, 0); + fence_context, 0, 0); return fence; }drivers/gpu/drm/vmwgfx/vmwgfx_fence.c +1
-1@@ -163,7 +163,7 @@ static int vmw_fence_obj_init(struct vmw_fence_manager *fman, int ret = 0; dma_fence_init(&fence->base, &vmw_fence_ops, &fman->lock, - fman->ctx, seqno); + fman->ctx, seqno, 0); fence->destroy = destroy; spin_lock(&fman->lock);drivers/gpu/drm/xe/xe_hw_fence.c +1
-1@@ -243,7 +243,7 @@ void xe_hw_fence_init(struct dma_fence *fence, struct xe_hw_fence_ctx *ctx, INIT_LIST_HEAD(&hw_fence->irq_link); dma_fence_init(fence, &xe_hw_fence_ops, &ctx->irq->lock, - ctx->dma_fence_ctx, ctx->next_seqno++); + ctx->dma_fence_ctx, ctx->next_seqno++, 0); trace_xe_hw_fence_create(hw_fence); }drivers/gpu/drm/xe/xe_oa.c +1
-1@@ -1053,7 +1053,7 @@ static int xe_oa_emit_oa_config(struct xe_oa_stream *stream, struct xe_oa_config /* Point of no return: initialize and set fence to signal */ spin_lock_init(&ofence->lock); - dma_fence_init(&ofence->base, &xe_oa_fence_ops, &ofence->lock, 0, 0); + dma_fence_init(&ofence->base, &xe_oa_fence_ops, &ofence->lock, 0, 0, 0); for (i = 0; i < stream->num_syncs; i++) { if (stream->syncs[i].flags & DRM_XE_SYNC_FLAG_SIGNAL)drivers/gpu/drm/xe/xe_preempt_fence.c +1
-1@@ -154,7 +154,7 @@ xe_preempt_fence_arm(struct xe_preempt_fence *pfence, struct xe_exec_queue *q, pfence->q = xe_exec_queue_get(q); spin_lock_init(&pfence->lock); dma_fence_init(&pfence->base, &preempt_fence_ops, - &pfence->lock, context, seqno); + &pfence->lock, context, seqno, 0); return &pfence->base; }drivers/gpu/drm/xe/xe_tlb_inval.c +1
-1@@ -544,7 +544,7 @@ void xe_tlb_inval_fence_init(struct xe_tlb_inval *tlb_inval, spin_lock_irq(&tlb_inval->lock); dma_fence_init(&fence->base, &inval_fence_ops, &tlb_inval->lock, - dma_fence_context_alloc(1), 1); + dma_fence_context_alloc(1), 1, 0); spin_unlock_irq(&tlb_inval->lock); INIT_LIST_HEAD(&fence->link); if (stack)drivers/gpu/host1x/fence.c +1
-1@@ -136,7 +136,7 @@ struct dma_fence *host1x_fence_create(struct host1x_syncpt *sp, u32 threshold, fence->timeout = timeout; dma_fence_init(&fence->base, &host1x_syncpt_fence_ops, &sp->fences.lock, - dma_fence_context_alloc(1), 0); + dma_fence_context_alloc(1), 0, 0); INIT_DELAYED_WORK(&fence->timeout_work, do_fence_timeout); diff --git a/drivers/iio/industrialio-buffer.c b/drivers/iio/industrialio-buffer.cindex
4294101810fd..f7d6b294b63c100644drivers/iio/industrialio-buffer.c +1
-1@@ -1904,7 +1904,7 @@ static int iio_buffer_enqueue_dmabuf(struct iio_dev_buffer_pair *ib,* the dma_fence. */ dma_fence_init(&fence->base, &iio_buffer_dma_fence_ops, - &fence->lock, priv->context, seqno); + &fence->lock, priv->context, seqno, 0); ret = iio_dma_resv_lock(dmabuf, nonblock); if (ret)drivers/usb/gadget/function/f_fs.c +1
-1@@ -1733,7 +1733,7 @@ static int ffs_dmabuf_transfer(struct file *file, seqno = atomic_add_return(1, &epfile->seqno); dma_fence_init(&fence->base, &ffs_dmabuf_fence_ops, - &priv->lock, priv->context, seqno); + &priv->lock, priv->context, seqno, 0); resv_dir = epfile->in ? DMA_RESV_USAGE_READ : DMA_RESV_USAGE_WRITE; diff --git a/include/linux/dma-fence.h b/include/linux/dma-fence.hindex
dd07d128adc3..6f5c245d89ec100644include/linux/dma-fence.h +6
-0@@ -103,6 +103,12 @@ struct dma_fence { int error; }; +/** enum dma_fence_flag_bits - internal dma_fence flags + * + * These flags are all only for internal usage, except for + * @DMA_FENCE_FLAG_SEQNO64_BIT and the user bits beginning at + * @DMA_FENCE_FLAG_USER_BITS. + */ enum dma_fence_flag_bits { DMA_FENCE_FLAG_INITIALIZED_BIT, DMA_FENCE_FLAG_INLINE_LOCK_BIT,@@ -110,6 +116,7 @@ enum dma_fence_flag_bits { DMA_FENCE_FLAG_SIGNALED_BIT, DMA_FENCE_FLAG_TIMESTAMP_BIT, DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, + DMA_FENCE_FLAG_USER_BITS, /* must always be last member */ }; @@ -279,11 +286,10 @@ struct dma_fence_ops {};
void dma_fence_init(structdma_fence*fence, const structdma_fence_ops*ops,
-spinlock_t*lock, u64 context, u64 seqno);include/linux/dma-fence.h +2
-2- + spinlock_t *lock, u64 context, u64 seqno, + unsigned long flags); void dma_fence_init64(struct dma_fence *fence, const struct dma_fence_ops *ops, spinlock_t *lock, u64 context, u64 seqno); - void dma_fence_release(struct kref *kref); void dma_fence_free(struct dma_fence *fence); void dma_fence_describe(struct dma_fence *fence, struct seq_file *seq);rust/kernel/dma_buf/dma_fence.rs +1
-1@@ -736,7 +736,7 @@ pub fn new_fence(self) -> DriverFence<'a, T> { // SAFETY: `fence_ptr` has been created directly above. It will live // at least as long as `Self`. The same applies to `&Self::OPS`. unsafe { - bindings::dma_fence_init(fence_ptr, self.ops, null_ptr, self.data.fctx.nr, seqno) + bindings::dma_fence_init(fence_ptr, self.ops, null_ptr, self.data.fctx.nr, seqno, 0) }; self.data.fctx.nr_of_unsignaled_fences.fetch_add(1, Relaxed);
Re: [PATCH 1/3] dma-buf: dma-fence: Add flags parameter to dma_fence_init()
Quoted 8 lines · Tvrtko Ursulin
Quoted 3 lines · Christian König
Well one advantage of the Linux kernel is to avoid such wrappers. I think having more than one function for the same thing basically just adds more confusion.
Sure we can churn if we really want. But as 99% of callers will be passing 0 it's not even very readable. Another option is variadic like
kmalloc_objsso flags can be optional. Anyway, for consideration only.
It has the advantage of forcing the reader to think about whether he wants 64-bit sequence numbers or not. In Rust-fence, for example, we completely overlooked that for months:
https://lore.kernel.org/rust-for-linux/[email protected]/
Besides unused flags fields are quite common in APIs. As I state in the description, this is also for future extensions, see my race-flag (if accepted) as one potential example.
It could also be used for canonically setting the user-flags, which users currently do with a manual set_bit(NR, &fence.base.flags;
So I think it's safe to say that it's the right thing for long-term reduction of churn and maintainability.
P.
Christian König
maintainerRe: [PATCH 1/3] dma-buf: dma-fence: Add flags parameter to dma_fence_init()
In reply to Philipp StannerOn 11/5/26 12:35, Philipp Stanner wrote:
...>
Quoted 1 line
+static bool
dma_fence_flags_invalid(unsigned long flags)
I think dma_fence_are_flags_valid() would match the kernel naming style better.
But that is only a nit pick. With or without the name changed Reviewed-by: Christian König <[email protected]> for the entire series.
Feel free to push to drm-misc-next or ping me when I should.
Thanks,
Christian.
Quoted 623 lines
drivers/dma-buf/dma-fence.c +23
-2+{ +const unsigned long valid_fence_bits = +BIT (DMA_FENCE_FLAG_SEQNO64_BIT ); +const unsigned long valid_user_bits = +GENMASK ( + BITS_PER_TYPE(unsigned long) - 1, +DMA_FENCE_FLAG_USER_BITS + ); +const unsigned long invalid_bits = + ~(valid_fence_bits | valid_user_bits); + +return flags & invalid_bits; +} +/** * dma_fence_init - Initialize a custom fence. * @fence: the fence to initialize @@ -1094,6 +1108,7 @@ __dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops,* @lock: optional irqsafe spinlock to use for locking this fence * @context: the execution context this fence is run on * @seqno: a linear increasing sequence number for this context +* @flags: flags modifying a fence's behavior * * Initializes an allocated fence, the caller doesn't have to keep its * refcount after committing with this fence, but it will need to hold a @@ -1108,12 +1123,18 @@ __dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops,* introduction of the callback, but the external lock is still around. New * users MUST NOT use external locks, as they force the issuer to outlive all * fences that reference the lock. +* +* The @flags you can specify here are either DMA_FENCE_FLAG_SEQNO64_BIT or +* user-specified bits >= DMA_FENCE_FLAG_USER_BITS. */ void dma_fence_init (struct dma_fence *fence,const struct dma_fence_ops *ops, -spinlock_t *lock,u64 context,u64 seqno) +spinlock_t *lock,u64 context,u64 seqno, +unsigned long flags) { -__dma_fence_init (fence, ops, lock, context, seqno,0UL ); +WARN_ON (dma_fence_flags_invalid (flags)); + +__dma_fence_init (fence, ops, lock, context, seqno, flags); }EXPORT_SYMBOL (dma_fence_init);drivers/dma-buf/st-dma-fence-chain.c +1
-1@@ -52,7 +52,7 @@ static struct dma_fence *mock_fence(void)return NULL ;spin_lock_init (&f->lock); -dma_fence_init (&f->base, &mock_ops, &f->lock,0 ,0 ); +dma_fence_init (&f->base, &mock_ops, &f->lock,0 ,0 ,0 );return &f->base; }drivers/dma-buf/st-dma-fence-unwrap.c +1
-1@@ -36,7 +36,7 @@ static struct dma_fence *__mock_fence(u64 context, u64 seqno)return NULL ;spin_lock_init (&f->lock); -dma_fence_init (&f->base, &mock_ops, &f->lock, context, seqno); +dma_fence_init (&f->base, &mock_ops, &f->lock, context, seqno,0 );return &f->base; }drivers/dma-buf/st-dma-fence.c +1
-1@@ -31,7 +31,7 @@ static struct dma_fence *mock_fence(void)if (!f)return NULL ; -dma_fence_init (f, &mock_ops,NULL ,0 ,0 ); +dma_fence_init (f, &mock_ops,NULL ,0 ,0 ,0 );return f; }drivers/dma-buf/st-dma-resv.c +1
-1@@ -35,7 +35,7 @@ static struct dma_fence *alloc_fence(void)if (!f)return NULL ; -dma_fence_init (f, &fence_ops, &fence_lock,0 ,0 ); +dma_fence_init (f, &fence_ops, &fence_lock,0 ,0 ,0 );return f; }drivers/dma-buf/sw_sync.c +1
-1@@ -258,7 +258,7 @@ static struct sync_pt *sync_pt_create(struct sync_timeline *obj,sync_timeline_get (obj);dma_fence_init (&pt->base, &timeline_fence_ops, &obj->lock, - obj->context, value); + obj->context, value,0 );INIT_LIST_HEAD (&pt->link);spin_lock_irq (&obj->lock);drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c +1
-1@@ -77,7 +77,7 @@ struct amdgpu_amdkfd_fence *amdgpu_amdkfd_fence_create(u64 context,spin_lock_init (&fence->lock); fence->context_id = context_id;dma_fence_init (&fence->base, &amdkfd_fence_ops, &fence->lock, - context,atomic_inc_return (&fence_seq)); + context,atomic_inc_return (&fence_seq),0 );return fence; }drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c +1
-1@@ -112,7 +112,7 @@ void amdgpu_fence_emit(struct amdgpu_ring *ring, struct amdgpu_fence *af, seq = ++ring->fence_drv.sync_seq;dma_fence_init (fence, &amdgpu_fence_ops, &ring->fence_drv.lock, - adev->fence_context + ring->idx, seq); + adev->fence_context + ring->idx, seq,0 );amdgpu_ring_emit_fence (ring, ring->fence_drv.gpu_addr, seq, flags |AMDGPU_FENCE_FLAG_INT );drivers/gpu/drm/drm_crtc.c +1
-1@@ -190,7 +190,7 @@ struct dma_fence *drm_crtc_create_fence(struct drm_crtc *crtc)return NULL ;dma_fence_init (fence, &drm_crtc_fence_ops, &crtc->fence_lock, - crtc->fence_context, ++crtc->fence_seqno); + crtc->fence_context, ++crtc->fence_seqno,0 );return fence; }drivers/gpu/drm/drm_writeback.c +1
-1@@ -592,7 +592,7 @@ drm_writeback_get_out_fence(struct drm_writeback_connector *wb_connector)dma_fence_init (fence, &drm_writeback_fence_ops, &wb_connector->fence_lock, wb_connector->fence_context, - ++wb_connector->fence_seqno); + ++wb_connector->fence_seqno,0 );return fence; }drivers/gpu/drm/etnaviv/etnaviv_gpu.c +1
-1@@ -1199,7 +1199,7 @@ static struct dma_fence *etnaviv_gpu_fence_alloc(struct etnaviv_gpu *gpu) f->gpu = gpu;dma_fence_init (&f->base, &etnaviv_fence_ops, &gpu->fence_spinlock, - gpu->fence_context, ++gpu->next_fence); + gpu->fence_context, ++gpu->next_fence,0 );return &f->base; }drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c +1
-1@@ -437,7 +437,7 @@ i915_ttm_memcpy_work_arm(struct i915_ttm_memcpy_work *work,int ret;spin_lock_init (&work->lock); -dma_fence_init (&work->fence, &dma_fence_memcpy_ops, &work->lock,0 ,0 ); +dma_fence_init (&work->fence, &dma_fence_memcpy_ops, &work->lock,0 ,0 ,0 );dma_fence_get (&work->fence); ret =dma_fence_add_callback (dep, &work->cb, __memcpy_cb);if (ret) {drivers/gpu/drm/i915/i915_request.c +1
-1@@ -953,7 +953,7 @@ __i915_request_create(struct intel_context *ce, gfp_t gfp) goto err_free;dma_fence_init (&rq->fence, &i915_fence_ops, &rq->lock, - tl->fence_context, seqno); + tl->fence_context, seqno,0 );RCU_INIT_POINTER (rq->timeline, tl); rq->hwsp_seqno = tl->hwsp_seqno;drivers/gpu/drm/i915/i915_sw_fence_work.c +1
-1@@ -85,7 +85,7 @@ void dma_fence_work_init(struct dma_fence_work *f, { f->ops = ops;spin_lock_init (&f->lock); -dma_fence_init (&f->dma, &fence_ops, &f->lock,0 ,0 ); +dma_fence_init (&f->dma, &fence_ops, &f->lock,0 ,0 ,0 );i915_sw_fence_init (&f->chain, fence_notify);INIT_WORK (&f->work, fence_work); }drivers/gpu/drm/i915/i915_vma_resource.c +1
-1@@ -263,7 +263,7 @@ void __i915_vma_resource_init(struct i915_vma_resource *vma_res) {spin_lock_init (&vma_res->lock);dma_fence_init (&vma_res->unbind_fence, &unbind_fence_ops, - &vma_res->lock,0 ,0 ); + &vma_res->lock,0 ,0 ,0 );refcount_set (&vma_res->hold_count,1 );i915_sw_fence_init (&vma_res->chain, i915_vma_resource_fence_notify); }drivers/gpu/drm/i915/selftests/i915_sw_fence.c +1
-1@@ -641,7 +641,7 @@ static struct dma_fence *alloc_dma_fence(void) dma =kmalloc_obj (*dma);if (dma) -dma_fence_init (dma, &mock_fence_ops, &mock_fence_lock,0 ,0 ); +dma_fence_init (dma, &mock_fence_ops, &mock_fence_lock,0 ,0 ,0 );return dma; }drivers/gpu/drm/imagination/pvr_ccb.c +1
-1@@ -645,7 +645,7 @@ pvr_kccb_reserve_slot(struct pvr_device *pvr_dev, struct dma_fence *f)dma_fence_init (&fence->base, &pvr_kccb_fence_ops, &pvr_dev->kccb.fence_ctx.lock, pvr_dev->kccb.fence_ctx.id, -atomic_inc_return (&pvr_dev->kccb.fence_ctx.seqno)); +atomic_inc_return (&pvr_dev->kccb.fence_ctx.seqno),0 ); out_fence =dma_fence_get (&fence->base);list_add_tail (&fence->node, &pvr_dev->kccb.waiters); }else {drivers/gpu/drm/imagination/pvr_queue.c +1
-1@@ -305,7 +305,7 @@ pvr_queue_fence_init(struct dma_fence *f,INIT_WORK (&fence->release_work, pvr_queue_fence_release_work);dma_fence_init (&fence->base, fence_ops, &fence_ctx->lock, fence_ctx->id, -atomic_inc_return (&fence_ctx->seqno)); +atomic_inc_return (&fence_ctx->seqno),0 ); }/** drivers/gpu/drm/lima/lima_sched.c +1
-1@@ -97,7 +97,7 @@ static struct lima_fence *lima_fence_create(struct lima_sched_pipe *pipe) fence->pipe = pipe;dma_fence_init (&fence->base, &lima_fence_ops, &pipe->fence_lock, - pipe->fence_context, ++pipe->fence_seqno); + pipe->fence_context, ++pipe->fence_seqno,0 );return fence; }drivers/gpu/drm/msm/msm_fence.c +1
-1@@ -197,5 +197,5 @@ msm_fence_init(struct dma_fence *fence, struct msm_fence_context *fctx)WARN_ON (kref_read (&fence->refcount));dma_fence_init (&f->base, &msm_fence_ops, &fctx->spinlock, - fctx->context, ++fctx->last_fence); + fctx->context, ++fctx->last_fence,0 ); }drivers/gpu/drm/nouveau/nouveau_fence.c +2
-2@@ -216,10 +216,10 @@ nouveau_fence_emit(struct nouveau_fence *fence)if (priv->uevent)dma_fence_init (&fence->base, &nouveau_fence_ops_uevent, - &fctx->lock, fctx->context, ++fctx->sequence); + &fctx->lock, fctx->context, ++fctx->sequence,0 );else dma_fence_init (&fence->base, &nouveau_fence_ops_legacy, - &fctx->lock, fctx->context, ++fctx->sequence); + &fctx->lock, fctx->context, ++fctx->sequence,0 );kref_get (&fctx->fence_ref); ret = fctx->emit (fence);drivers/gpu/drm/panfrost/panfrost_job.c +1
-1@@ -105,7 +105,7 @@ static struct dma_fence *panfrost_fence_create(struct panfrost_device *pfdev, in fence->queue = js_num; fence->seqno = ++js->queue[js_num].emit_seqno;dma_fence_init (&fence->base, &panfrost_fence_ops, &js->job_lock, - js->queue[js_num].fence_context, fence->seqno); + js->queue[js_num].fence_context, fence->seqno,0 );return &fence->base; }drivers/gpu/drm/panthor/panthor_sched.c +1
-1@@ -3322,7 +3322,7 @@ queue_run_job(struct drm_sched_job *sched_job) &panthor_queue_fence_ops, &queue->fence_ctx.lock, queue->fence_ctx.id, - atomic64_inc_return(&queue->fence_ctx.seqno)); + atomic64_inc_return(&queue->fence_ctx.seqno), 0); job->profiling.slot = queue->profiling.seqno++;if (queue->profiling.seqno == queue->profiling.slot_count)drivers/gpu/drm/qxl/qxl_release.c +1
-1@@ -430,7 +430,7 @@ void qxl_release_fence_buffer_objects(struct qxl_release *release)* set the highest bits. This will break if we really allow exporting of dma-bufs. */ dma_fence_init (&release->base, &qxl_fence_ops, &qdev->release_lock, - release->id |0xf0000000 , release->base.seqno); + release->id |0xf0000000 , release->base.seqno,0 );trace_dma_fence_emit (&release->base);list_for_each_entry (entry, &release->bos, list) {drivers/gpu/drm/radeon/radeon_fence.c +1
-1@@ -148,7 +148,7 @@ int radeon_fence_emit(struct radeon_device *rdev,dma_fence_init (&(*fence)->base, &radeon_fence_ops, &rdev->fence_queue.lock, rdev->fence_context + ring, - seq); + seq,0 );radeon_fence_ring_emit (rdev, ring, *fence);trace_radeon_fence_emit (rdev_to_drm (rdev), ring, (*fence)->seq);radeon_fence_schedule_check (rdev, ring);drivers/gpu/drm/scheduler/sched_fence.c +2
-2@@ -229,9 +229,9 @@ void drm_sched_fence_init(struct drm_sched_fence *fence, fence->sched = entity->rq->sched; seq =atomic_inc_return (&entity->fence_seq);dma_fence_init (&fence->scheduled, &drm_sched_fence_ops_scheduled, - &fence->lock, entity->fence_context, seq); + &fence->lock, entity->fence_context, seq,0 );dma_fence_init (&fence->finished, &drm_sched_fence_ops_finished, - &fence->lock, entity->fence_context +1 , seq); + &fence->lock, entity->fence_context +1 , seq,0 ); }module_init (drm_sched_fence_slab_init);drivers/gpu/drm/scheduler/tests/mock_scheduler.c +1
-1@@ -173,7 +173,7 @@ static struct dma_fence *mock_sched_run_job(struct drm_sched_job *sched_job) &drm_mock_sched_hw_fence_ops, &sched->lock, sched->hw_timeline.context, - atomic_inc_return(&sched->hw_timeline.next_seqno)); + atomic_inc_return(&sched->hw_timeline.next_seqno), 0);dma_fence_get (&job->hw_fence);/* Reference for the job_list */ drivers/gpu/drm/ttm/tests/ttm_bo_test.c +1
-1@@ -450,7 +450,7 @@ static void ttm_bo_fini_shared_resv(struct kunit *test)KUNIT_ASSERT_NOT_NULL (test, fence);spin_lock_init (&fence_lock); -dma_fence_init (fence, &mock_fence_ops, &fence_lock,0 ,0 ); +dma_fence_init (fence, &mock_fence_ops, &fence_lock,0 ,0 ,0 );dma_resv_lock (external_resv,NULL );dma_resv_reserve_fences (external_resv,1 );drivers/gpu/drm/ttm/tests/ttm_bo_validate_test.c +1
-1@@ -57,7 +57,7 @@ static struct dma_fence *alloc_mock_fence(struct kunit *test) fence =kunit_kzalloc (test,sizeof (*fence),GFP_KERNEL );KUNIT_ASSERT_NOT_NULL (test, fence); -dma_fence_init (fence, &fence_ops, &fence_lock,0 ,0 ); +dma_fence_init (fence, &fence_ops, &fence_lock,0 ,0 ,0 );return fence; }drivers/gpu/drm/v3d/v3d_fence.c +1
-1@@ -16,7 +16,7 @@ struct dma_fence *v3d_fence_create(struct v3d_dev *v3d, enum v3d_queue q) fence->queue = q; fence->seqno = ++queue->emit_seqno;dma_fence_init (&fence->base, &v3d_fence_ops, &queue->queue_lock, - queue->fence_context, fence->seqno); + queue->fence_context, fence->seqno,0 );return &fence->base; }drivers/gpu/drm/vc4/vc4_gem.c +1
-1@@ -648,7 +648,7 @@ vc4_queue_submit(struct drm_device *dev, struct vc4_exec_info *exec, exec->seqno = seqno;dma_fence_init (&fence->base, &vc4_fence_ops, &vc4->job_lock, - vc4->dma_fence_context, exec->seqno); + vc4->dma_fence_context, exec->seqno,0 ); fence->seqno = exec->seqno; exec->fence = &fence->base;drivers/gpu/drm/vgem/vgem_fence.c +1
-1@@ -77,7 +77,7 @@ static struct dma_fence *vgem_fence_create(struct vgem_file *vfile,spin_lock_init (&fence->lock);dma_fence_init (&fence->base, &vgem_fence_ops, &fence->lock, -dma_fence_context_alloc (1 ),1 ); +dma_fence_context_alloc (1 ),1 ,0 );timer_setup (&fence->timer, vgem_fence_timeout,TIMER_IRQSAFE );drivers/gpu/drm/virtio/virtgpu_fence.c +1
-1@@ -76,7 +76,7 @@ struct virtio_gpu_fence *virtio_gpu_fence_alloc(struct virtio_gpu_device *vgdev,*/ dma_fence_init (&fence->f, &virtio_gpu_fence_ops, &drv->lock, - fence_context,0 ); + fence_context,0 ,0 );return fence; }drivers/gpu/drm/vmwgfx/vmwgfx_fence.c +1
-1@@ -163,7 +163,7 @@ static int vmw_fence_obj_init(struct vmw_fence_manager *fman,int ret =0 ;dma_fence_init (&fence->base, &vmw_fence_ops, &fman->lock, - fman->ctx, seqno); + fman->ctx, seqno,0 ); fence->destroy = destroy;spin_lock (&fman->lock);drivers/gpu/drm/xe/xe_hw_fence.c +1
-1@@ -243,7 +243,7 @@ void xe_hw_fence_init(struct dma_fence *fence, struct xe_hw_fence_ctx *ctx,INIT_LIST_HEAD (&hw_fence->irq_link);dma_fence_init (fence, &xe_hw_fence_ops, &ctx->irq->lock, - ctx->dma_fence_ctx, ctx->next_seqno++); + ctx->dma_fence_ctx, ctx->next_seqno++,0 );trace_xe_hw_fence_create (hw_fence); }drivers/gpu/drm/xe/xe_oa.c +1
-1@@ -1053,7 +1053,7 @@ static int xe_oa_emit_oa_config(struct xe_oa_stream *stream, struct xe_oa_config/* Point of no return: initialize and set fence to signal */ spin_lock_init (&ofence->lock); -dma_fence_init (&ofence->base, &xe_oa_fence_ops, &ofence->lock,0 ,0 ); +dma_fence_init (&ofence->base, &xe_oa_fence_ops, &ofence->lock,0 ,0 ,0 );for (i =0 ; i < stream->num_syncs; i++) {if (stream->syncs[i].flags &DRM_XE_SYNC_FLAG_SIGNAL )drivers/gpu/drm/xe/xe_preempt_fence.c +1
-1@@ -154,7 +154,7 @@ xe_preempt_fence_arm(struct xe_preempt_fence *pfence, struct xe_exec_queue *q, pfence->q =xe_exec_queue_get (q);spin_lock_init (&pfence->lock);dma_fence_init (&pfence->base, &preempt_fence_ops, - &pfence->lock, context, seqno); + &pfence->lock, context, seqno,0 );return &pfence->base; }drivers/gpu/drm/xe/xe_tlb_inval.c +1
-1@@ -544,7 +544,7 @@ void xe_tlb_inval_fence_init(struct xe_tlb_inval *tlb_inval,spin_lock_irq (&tlb_inval->lock);dma_fence_init (&fence->base, &inval_fence_ops, &tlb_inval->lock, -dma_fence_context_alloc (1 ),1 ); +dma_fence_context_alloc (1 ),1 ,0 );spin_unlock_irq (&tlb_inval->lock);INIT_LIST_HEAD (&fence->link);if (stack)drivers/gpu/host1x/fence.c +1
-1@@ -136,7 +136,7 @@ struct dma_fence *host1x_fence_create(struct host1x_syncpt *sp, u32 threshold, fence->timeout = timeout;dma_fence_init (&fence->base, &host1x_syncpt_fence_ops, &sp->fences.lock, -dma_fence_context_alloc (1 ),0 ); +dma_fence_context_alloc (1 ),0 ,0 );INIT_DELAYED_WORK (&fence->timeout_work, do_fence_timeout);drivers/iio/industrialio-buffer.c +1
-1@@ -1904,7 +1904,7 @@ static int iio_buffer_enqueue_dmabuf(struct iio_dev_buffer_pair *ib,* the dma_fence. */ dma_fence_init (&fence->base, &iio_buffer_dma_fence_ops, - &fence->lock, priv->context, seqno); + &fence->lock, priv->context, seqno,0 ); ret =iio_dma_resv_lock (dmabuf, nonblock);if (ret)drivers/usb/gadget/function/f_fs.c +1
-1@@ -1733,7 +1733,7 @@ static int ffs_dmabuf_transfer(struct file *file, seqno =atomic_add_return (1 , &epfile->seqno);dma_fence_init (&fence->base, &ffs_dmabuf_fence_ops, - &priv->lock, priv->context, seqno); + &priv->lock, priv->context, seqno,0 ); resv_dir = epfile->in ?DMA_RESV_USAGE_READ :DMA_RESV_USAGE_WRITE ;include/linux/dma-fence.h +9
-3@@ -103,6 +103,12 @@ struct dma_fence {int error; }; +/** enum dma_fence_flag_bits - internal dma_fence flags +* +* These flags are all only for internal usage, except for +* @DMA_FENCE_FLAG_SEQNO64_BIT and the user bits beginning at +* @DMA_FENCE_FLAG_USER_BITS. +*/ enum dma_fence_flag_bits {DMA_FENCE_FLAG_INITIALIZED_BIT ,DMA_FENCE_FLAG_INLINE_LOCK_BIT ,@@ -110,6 +116,7 @@ enum dma_fence_flag_bits {DMA_FENCE_FLAG_SIGNALED_BIT ,DMA_FENCE_FLAG_TIMESTAMP_BIT ,DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT , + DMA_FENCE_FLAG_USER_BITS, /* must always be last member */ };@@ -279,11 +286,10 @@ struct dma_fence_ops { };void dma_fence_init (struct dma_fence *fence,const struct dma_fence_ops *ops, -spinlock_t *lock,u64 context,u64 seqno); - +spinlock_t *lock,u64 context,u64 seqno, +unsigned long flags);void dma_fence_init64 (struct dma_fence *fence,const struct dma_fence_ops *ops,spinlock_t *lock,u64 context,u64 seqno); -void dma_fence_release (struct kref *kref);void dma_fence_free (struct dma_fence *fence);void dma_fence_describe (struct dma_fence *fence,struct seq_file *seq);rust/kernel/dma_buf/dma_fence.rs +1
-1@@ -736,7 +736,7 @@ pub fn new_fence(self) -> DriverFence<'a, T> {// SAFETY: `fence_ptr` has been created directly above. It will live // at least as long as `Self`. The same applies to `&Self::OPS`. unsafe { - bindings::dma_fence_init (fence_ptr, self.ops, null_ptr, self.data.fctx.nr, seqno) + bindings::dma_fence_init (fence_ptr, self.ops, null_ptr, self.data.fctx.nr, seqno,0 ) }; self.data.fctx.nr_of_unsignaled_fences.fetch_add (1 ,Relaxed );
Philipp Stanner
maintainerPATCH 2/3 dma-buf: Port users of dma_fence_init64()
In reply to Philipp Stannerdma_fence_init() now natively allows for selecting 64-bit seqno support. Port all users of dma_fence_init64() to this unified method.
--- drivers/dma-buf/dma-fence-chain.c | 4 ++-- drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.c | 7 ++++--- drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c | 5 +++-- drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c | 5 +++-- 4 files changed, 12 insertions(+), 9 deletions(-)
drivers/dma-buf/dma-fence-chain.c +2 -2
@@ -261,8 +261,8 @@ void dma_fence_chain_init(struct dma_fence_chain *chain, seqno =max (prev->seqno, seqno); } -dma_fence_init64 (&chain->base, &dma_fence_chain_ops,NULL , - context, seqno); +dma_fence_init (&chain->base, &dma_fence_chain_ops,NULL , + context, seqno,BIT (DMA_FENCE_FLAG_SEQNO64_BIT ));/* * dma_fence_chain_enable_signaling() is invoked while holding
drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.c +4 -3
@@ -133,9 +133,10 @@ int amdgpu_evf_mgr_rearm(struct amdgpu_eviction_fence_mgr *evf_mgr, ev_fence->evf_mgr = evf_mgr;get_task_comm (ev_fence->timeline_name, current);spin_lock_init (&ev_fence->lock); -dma_fence_init64 (&ev_fence->base, &amdgpu_eviction_fence_ops, - &ev_fence->lock, evf_mgr->ev_fence_ctx, -atomic_inc_return (&evf_mgr->ev_fence_seq)); +dma_fence_init (&ev_fence->base, &amdgpu_eviction_fence_ops, + &ev_fence->lock, evf_mgr->ev_fence_ctx, +atomic_inc_return (&evf_mgr->ev_fence_seq), +BIT (DMA_FENCE_FLAG_SEQNO64_BIT ));/* Remember it for newly added BOs */ dma_fence_put (evf_mgr->ev_fence);
drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c +3 -2
@@ -274,8 +274,9 @@ static void amdgpu_userq_fence_init(struct amdgpu_usermode_queue *userq,bool signaled = false;spin_lock_init (&fence->lock); -dma_fence_init64 (&fence->base, &amdgpu_userq_fence_ops, &fence->lock, - fence_drv->context, seq); +dma_fence_init (&fence->base, &amdgpu_userq_fence_ops, &fence->lock, + fence_drv->context, seq, +BIT (DMA_FENCE_FLAG_SEQNO64_BIT ));/* Make sure the fence is visible to the hang detect worker */ dma_fence_put (userq->last_fence);
drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c +3 -2
@@ -100,8 +100,9 @@ void amdgpu_vm_tlb_fence_create(struct amdgpu_device *adev, struct amdgpu_vm *vmINIT_WORK (&f->work, amdgpu_tlb_fence_work);spin_lock_init (&f->lock); -dma_fence_init64 (&f->base, &amdgpu_tlb_fence_ops, &f->lock, - vm->tlb_fence_context,atomic64_read (&vm->tlb_seq)); +dma_fence_init (&f->base, &amdgpu_tlb_fence_ops, &f->lock, + vm->tlb_fence_context,atomic64_read (&vm->tlb_seq), +BIT (DMA_FENCE_FLAG_SEQNO64_BIT ));/* TODO: We probably need a separate wq here */ dma_fence_get (&f->base);
Signature · 1 line
2.56.0
[email protected]
AI reviewRe: [PATCH 2/3] dma-buf: Port users of dma_fence_init64()
Sashiko has reviewed this patch and found no issues.
Quoted 4 lines
dma_fence_init()now natively allows for selecting 64-bit seqno support. Port all users ofdma_fence_init64()to this unified method.Signed-off-by Philipp Stanner <[email protected]>
Sashiko has reviewed this patch and found no issues.
Signature · 1 line
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=2
Philipp Stanner
maintainerPATCH 3/3 dma-buf: dma-fence: Remove dma_fence_init64()
In reply to Philipp StannerAll users of dma_fence_init64() have been removed. They now use the respective initialization flag in dma_fence_init().
Remove dma_fence_init64().
--- drivers/dma-buf/dma-fence.c | 27 --------------------------- include/linux/dma-fence.h | 2 -- 2 files changed, 29 deletions(-)
drivers/dma-buf/dma-fence.c +0 -27
@@ -1138,33 +1138,6 @@ dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops, }EXPORT_SYMBOL (dma_fence_init); -/** -* dma_fence_init64 - Initialize a custom fence with 64-bit seqno support. -* @fence: the fence to initialize -* @ops: the dma_fence_ops for operations on this fence -* @lock: optional irqsafe spinlock to use for locking this fence -* @context: the execution context this fence is run on -* @seqno: a linear increasing sequence number for this context -* -* Initializes an allocated fence, the caller doesn't have to keep its -* refcount after committing with this fence, but it will need to hold a -* refcount again if &dma_fence_ops.enable_signaling gets called. -* -* Context and seqno are used for easy comparison between fences, allowing -* to check which fence is later by simply using dma_fence_later(). -* -* New users MUST NOT use external locks. Check the documentation in -* dma_fence_init() to understand the motives behind the legacy use cases. -*/ -void -dma_fence_init64 (struct dma_fence *fence,const struct dma_fence_ops *ops, -spinlock_t *lock,u64 context,u64 seqno) -{ -__dma_fence_init (fence, ops, lock, context, seqno, -BIT (DMA_FENCE_FLAG_SEQNO64_BIT )); -} -EXPORT_SYMBOL (dma_fence_init64); -/** * dma_fence_driver_name - Access the driver name * @fence: the fence to query
include/linux/dma-fence.h +0 -2
@@ -288,8 +288,6 @@ struct dma_fence_ops {void dma_fence_init (struct dma_fence *fence,const struct dma_fence_ops *ops,spinlock_t *lock,u64 context,u64 seqno,unsigned long flags); -void dma_fence_init64 (struct dma_fence *fence,const struct dma_fence_ops *ops, -spinlock_t *lock,u64 context,u64 seqno);void dma_fence_release (struct kref *kref);void dma_fence_free (struct dma_fence *fence);void dma_fence_describe (struct dma_fence *fence,struct seq_file *seq);
Signature · 1 line
2.56.0
[email protected]
AI reviewSashiko has reviewed this patch and found no issues.
Quoted 6 lines
All users of
dma_fence_init64()have been removed. They now use the respective initialization flag indma_fence_init().Remove
dma_fence_init64().Signed-off-by Philipp Stanner <[email protected]>
Sashiko has reviewed this patch and found no issues.
Signature · 1 line
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=3
Patchwork
CI✗ CI.checkpatch: warning for dma-buf: dma-fence: Remove dma_fence_init64()
In reply to Philipp Stanner== Series Details ==
== Series Details ==
Series: dma-buf: dma-fence: Remove dma_fence_init64()
URL : https://patchwork.freedesktop.org/series/177858/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master 3009867cd31863246e4afc138520a7a8bd37bb11
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 803183dc66a6540c7670a1d1af5edf74c7411a9e
Author: Philipp Stanner <[email protected]> Date: Thu Nov 5 12:35:30 2026 +0100
dma-buf: dma-fence: Remove dma_fence_init64()
All users of dma_fence_init64() have been removed. They now use the respective initialization flag in dma_fence_init().
Remove dma_fence_init64().
+ /mt/dim checkpatch 0e8b43b5a5ef2dd52c454158e7fd8a927d796eb4 drm-intel f4f82e165c22 dma-buf: dma-fence: Add flags parameter to dma_fence_init() -:56: WARNING:LONG_LINE: line length of 102 exceeds 100 columns #56: FILE: drivers/accel/ivpu/ivpu_job.c:522:
+ dma_fence_init(&fence->base, &ivpu_fence_ops, &fence->lock, dma_fence_context_alloc(1), 1, 0);
-:125: CHECK:OPEN_ENDED_LINE: Lines should not end with a '(' #125: FILE: drivers/dma-buf/dma-fence.c:1094:
+ GENMASK(
-:126: CHECK:SPACING: No space is necessary after a cast #126: FILE: drivers/dma-buf/dma-fence.c:1095:
+ BITS_PER_TYPE(unsigned long) - 1,
total: 0 errors, 1 warnings, 2 checks, 476 lines checked cf362d87ff17 dma-buf: Port users of dma_fence_init64() 803183dc66a6 dma-buf: dma-fence: Remove dma_fence_init64()
Patchwork
CI✓ CI.KUnit: success for dma-buf: dma-fence: Remove dma_fence_init64()
In reply to Philipp Stanner== Series Details ==
== Series Details ==
Series: dma-buf: dma-fence: Remove dma_fence_init64()
URL : https://patchwork.freedesktop.org/series/177858/
State : success
== Summary ==
+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[14:14:31] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig [14:14:36] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [14:14:57] Starting KUnit Kernel (1/1)... [14:14:57] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [14:14:57] ================= gpu_buddy (14 subtests) ================== [14:14:57] [PASSED] gpu_test_buddy_alloc_limit [14:14:57] [PASSED] gpu_test_buddy_alloc_optimistic [14:14:57] [PASSED] gpu_test_buddy_alloc_pessimistic [14:14:57] [PASSED] gpu_test_buddy_alloc_pathological [14:14:57] [PASSED] gpu_test_buddy_alloc_contiguous [14:14:57] [PASSED] gpu_test_buddy_alloc_clear [14:14:57] [PASSED] gpu_test_buddy_alloc_range [14:14:57] [PASSED] gpu_test_buddy_alloc_range_bias [14:14:58] [PASSED] gpu_test_buddy_fragmentation_performance [14:14:59] [PASSED] gpu_test_buddy_dirty_tracker_performance [14:14:59] [PASSED] gpu_test_buddy_alloc_exceeds_max_order [14:14:59] [PASSED] gpu_test_buddy_offset_aligned_allocation [14:14:59] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress [14:14:59] [PASSED] gpu_test_buddy_addr_to_block [14:14:59] ==================== [PASSED] gpu_buddy ==================== [14:14:59] ============================================================ [14:14:59] Testing complete. Ran 14 tests: passed: 14 [14:14:59] Elapsed time: 27.458s total, 5.087s configuring, 20.503s building, 1.833s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig [14:14:59] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig [14:15:01] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [14:15:39] Starting KUnit Kernel (1/1)... [14:15:39] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [14:15:40] ================== guc_buf (11 subtests) =================== [14:15:40] [PASSED] test_smallest [14:15:40] [PASSED] test_largest [14:15:40] [PASSED] test_granular [14:15:40] [PASSED] test_unique [14:15:40] [PASSED] test_overlap [14:15:40] [PASSED] test_reusable [14:15:40] [PASSED] test_too_big [14:15:40] [PASSED] test_flush [14:15:40] [PASSED] test_lookup [14:15:40] [PASSED] test_data [14:15:40] [PASSED] test_class [14:15:40] ===================== [PASSED] guc_buf ===================== [14:15:40] =================== guc_dbm (7 subtests) =================== [14:15:40] [PASSED] test_empty [14:15:40] [PASSED] test_default [14:15:40] ======================== test_size ======================== [14:15:40] [PASSED] 4 [14:15:40] [PASSED] 8 [14:15:40] [PASSED] 32 [14:15:40] [PASSED] 256 [14:15:40] ==================== [PASSED] test_size ==================== [14:15:40] ======================= test_reuse ======================== [14:15:40] [PASSED] 4 [14:15:40] [PASSED] 8 [14:15:40] [PASSED] 32 [14:15:40] [PASSED] 256 [14:15:40] =================== [PASSED] test_reuse ==================== [14:15:40] =================== test_range_overlap ==================== [14:15:40] [PASSED] 4 [14:15:40] [PASSED] 8 [14:15:40] [PASSED] 32 [14:15:40] [PASSED] 256 [14:15:40] =============== [PASSED] test_range_overlap ================ [14:15:40] =================== test_range_compact ==================== [14:15:40] [PASSED] 4 [14:15:40] [PASSED] 8 [14:15:40] [PASSED] 32 [14:15:40] [PASSED] 256 [14:15:40] =============== [PASSED] test_range_compact ================ [14:15:40] ==================== test_range_spare ===================== [14:15:40] [PASSED] 4 [14:15:40] [PASSED] 8 [14:15:40] [PASSED] 32 [14:15:40] [PASSED] 256 [14:15:40] ================ [PASSED] test_range_spare ================= [14:15:40] ===================== [PASSED] guc_dbm ===================== [14:15:40] ================== guc_idm (22 subtests) =================== [14:15:40] [PASSED] bad_init [14:15:40] [PASSED] no_init [14:15:40] [PASSED] init_fini [14:15:40] [PASSED] check_init_small [14:15:40] [PASSED] check_init_shared [14:15:40] [PASSED] check_used [14:15:40] [PASSED] check_quota [14:15:40] [PASSED] check_all [14:15:40] [PASSED] check_limits [14:15:40] [PASSED] check_overlap [14:15:40] [PASSED] check_overlap_alloc [14:15:40] [PASSED] check_overlap_release [14:15:40] [PASSED] check_overlap_partial_init [14:15:40] [PASSED] check_overlap_partial_shared_range_blocking [14:15:40] [PASSED] check_used_usable [14:15:40] [PASSED] check_used_shareable [14:15:40] [PASSED] check_used_mixed [14:15:40] [PASSED] check_release_usable_range [14:15:40] [PASSED] check_release_shareable_range [14:15:40] [PASSED] check_split_boundaries [14:15:40] [PASSED] check_shareable_spare [14:15:40] [PASSED] check_shareable_spare_fragmented_tail [14:15:40] ===================== [PASSED] guc_idm ===================== [14:15:40] ============== guc_klv_helpers (13 subtests) =============== [14:15:40] [PASSED] test_count [14:15:40] [PASSED] test_encode_u32 [14:15:40] [PASSED] test_encode_u64 [14:15:40] [PASSED] test_encode_string [14:15:40] [PASSED] test_encode_object_raw [14:15:40] [PASSED] test_encode_object_klv [14:15:40] [PASSED] test_encode_object_nested [14:15:40] [PASSED] test_encode_object_basic [14:15:40] ===================== test_decode_u16 ===================== [14:15:40] [PASSED] empty [14:15:40] [PASSED] valid [14:15:40] [PASSED] max [14:15:40] [PASSED] big [14:15:40] [PASSED] long [14:15:40] ================= [PASSED] test_decode_u16 ================= [14:15:40] ===================== test_decode_u32 ===================== [14:15:40] [PASSED] empty [14:15:40] [PASSED] valid [14:15:40] [PASSED] max [14:15:40] [PASSED] long [14:15:40] ================= [PASSED] test_decode_u32 ================= [14:15:40] ===================== test_decode_u64 ===================== [14:15:40] [PASSED] empty [14:15:40] [PASSED] short [14:15:40] [PASSED] valid [14:15:40] [PASSED] max [14:15:40] [PASSED] long [14:15:40] ================= [PASSED] test_decode_u64 ================= [14:15:40] ===================== test_decode_str ===================== [14:15:40] [PASSED] empty [14:15:40] [PASSED] one [14:15:40] [PASSED] one_trash [14:15:40] [PASSED] two [14:15:40] [PASSED] two_trash [14:15:40] [PASSED] three [14:15:40] [PASSED] dword [14:15:40] [PASSED] four [14:15:40] [PASSED] five [14:15:40] [PASSED] six [14:15:40] [PASSED] seven [14:15:40] [PASSED] qword [14:15:40] ================= [PASSED] test_decode_str ================= [14:15:40] [PASSED] test_print [14:15:40] ================= [PASSED] guc_klv_helpers ================= [14:15:40] =================== xe_log (4 subtests) ==================== [14:15:40] [PASSED] demo_cper [14:15:40] [PASSED] demo_dmesg [14:15:40] ======================= test_dmesg ======================== [14:15:40] [PASSED] test_fatal [14:15:40] [PASSED] test_fatal_tile [14:15:40] [PASSED] test_fatal_gt [14:15:40] [PASSED] test_fatal_comp [14:15:40] [PASSED] test_fatal_comp_tile [14:15:40] [PASSED] test_fatal_comp_gt [14:15:40] [PASSED] test_fatal_all [14:15:40] [PASSED] test_recoverable [14:15:40] [PASSED] test_recoverable_tile [14:15:40] [PASSED] test_recoverable_gt [14:15:40] [PASSED] test_recoverable_comp [14:15:40] [PASSED] test_recoverable_comp_tile [14:15:40] [PASSED] test_recoverable_comp_gt [14:15:40] [PASSED] test_recoverable_all [14:15:40] [PASSED] test_info [14:15:40] [PASSED] test_info_tile [14:15:40] [PASSED] test_info_gt [14:15:40] [PASSED] test_info_err [14:15:40] [PASSED] test_info_comp [14:15:40] [PASSED] test_info_comp_tile [14:15:40] [PASSED] test_info_comp_gt [14:15:40] [PASSED] test_info_all [14:15:40] [PASSED] test_hw_fatal [14:15:40] [PASSED] test_hw_recoverable [14:15:40] [PASSED] test_hw_corrected [14:15:40] [PASSED] test_hw_informational [14:15:40] =================== [PASSED] test_dmesg ==================== [14:15:40] ====================== test_invalid ======================= [14:15:40] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG) [14:15:40] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG) [14:15:40] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG) [14:15:40] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG) [14:15:40] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG) [14:15:40] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG) [14:15:40] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG) [14:15:40] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG) [14:15:40] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG) [14:15:40] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG) [14:15:40] ================== [SKIPPED] test_invalid ================== [14:15:40] ===================== [PASSED] xe_log ====================== [14:15:40] ================== no_relay (3 subtests) =================== [14:15:40] [PASSED] xe_drops_guc2pf_if_not_ready [14:15:40] [PASSED] xe_drops_guc2vf_if_not_ready [14:15:40] [PASSED] xe_rejects_send_if_not_ready [14:15:40] ==================== [PASSED] no_relay ===================== [14:15:40] ================== pf_relay (14 subtests) ================== [14:15:40] [PASSED] pf_rejects_guc2pf_too_short [14:15:40] [PASSED] pf_rejects_guc2pf_too_long [14:15:40] [PASSED] pf_rejects_guc2pf_no_payload [14:15:40] [PASSED] pf_fails_no_payload [14:15:40] [PASSED] pf_fails_bad_origin [14:15:40] [PASSED] pf_fails_bad_type [14:15:40] [PASSED] pf_txn_reports_error [14:15:40] [PASSED] pf_txn_sends_pf2guc [14:15:40] [PASSED] pf_sends_pf2guc [14:15:40] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV) [14:15:40] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV) [14:15:40] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV) [14:15:40] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV) [14:15:40] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV) [14:15:40] ==================== [PASSED] pf_relay ===================== [14:15:40] ================== vf_relay (3 subtests) =================== [14:15:40] [PASSED] vf_rejects_guc2vf_too_short [14:15:40] [PASSED] vf_rejects_guc2vf_too_long [14:15:40] [PASSED] vf_rejects_guc2vf_no_payload [14:15:40] ==================== [PASSED] vf_relay ===================== [14:15:40] ================ pf_gt_config (9 subtests) ================= [14:15:40] [PASSED] fair_contexts_1vf [14:15:40] [PASSED] fair_doorbells_1vf [14:15:40] [PASSED] fair_ggtt_1vf [14:15:40] ====================== fair_vram_1vf ====================== [14:15:40] [PASSED] 3.50 GiB [14:15:40] [PASSED] 11.5 GiB [14:15:40] [PASSED] 15.5 GiB [14:15:40] [PASSED] 31.5 GiB [14:15:40] [PASSED] 63.5 GiB [14:15:40] [PASSED] 1.91 GiB [14:15:40] ================== [PASSED] fair_vram_1vf ================== [14:15:40] ================ fair_vram_1vf_admin_only ================= [14:15:40] [PASSED] 3.50 GiB [14:15:40] [PASSED] 11.5 GiB [14:15:40] [PASSED] 15.5 GiB [14:15:40] [PASSED] 31.5 GiB [14:15:40] [PASSED] 63.5 GiB [14:15:40] [PASSED] 1.91 GiB [14:15:40] ============ [PASSED] fair_vram_1vf_admin_only ============= [14:15:40] ====================== fair_contexts ====================== [14:15:40] [PASSED] 1 VF [14:15:40] [PASSED] 2 VFs [14:15:40] [PASSED] 3 VFs [14:15:40] [PASSED] 4 VFs [14:15:40] [PASSED] 5 VFs [14:15:40] [PASSED] 6 VFs [14:15:40] [PASSED] 7 VFs [14:15:40] [PASSED] 8 VFs [14:15:40] [PASSED] 9 VFs [14:15:40] [PASSED] 10 VFs [14:15:40] [PASSED] 11 VFs [14:15:40] [PASSED] 12 VFs [14:15:40] [PASSED] 13 VFs [14:15:40] [PASSED] 14 VFs [14:15:40] [PASSED] 15 VFs [14:15:40] [PASSED] 16 VFs [14:15:40] [PASSED] 17 VFs [14:15:40] [PASSED] 18 VFs [14:15:40] [PASSED] 19 VFs [14:15:40] [PASSED] 20 VFs [14:15:40] [PASSED] 21 VFs [14:15:40] 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fair_doorbells ================== [14:15:40] ======================== fair_ggtt ======================== [14:15:40] [PASSED] 1 VF [14:15:40] [PASSED] 2 VFs [14:15:40] [PASSED] 3 VFs [14:15:40] [PASSED] 4 VFs [14:15:40] [PASSED] 5 VFs [14:15:40] [PASSED] 6 VFs [14:15:40] [PASSED] 7 VFs [14:15:40] [PASSED] 8 VFs [14:15:40] [PASSED] 9 VFs [14:15:40] [PASSED] 10 VFs [14:15:40] [PASSED] 11 VFs [14:15:40] [PASSED] 12 VFs [14:15:40] [PASSED] 13 VFs [14:15:40] [PASSED] 14 VFs [14:15:40] [PASSED] 15 VFs [14:15:40] [PASSED] 16 VFs [14:15:40] [PASSED] 17 VFs [14:15:40] [PASSED] 18 VFs [14:15:40] [PASSED] 19 VFs [14:15:40] [PASSED] 20 VFs [14:15:40] [PASSED] 21 VFs [14:15:40] [PASSED] 22 VFs [14:15:40] [PASSED] 23 VFs [14:15:40] [PASSED] 24 VFs [14:15:40] [PASSED] 25 VFs [14:15:40] [PASSED] 26 VFs [14:15:40] [PASSED] 27 VFs [14:15:40] [PASSED] 28 VFs [14:15:40] [PASSED] 29 VFs [14:15:40] [PASSED] 30 VFs [14:15:40] [PASSED] 31 VFs [14:15:40] [PASSED] 32 VFs [14:15:40] [PASSED] 33 VFs [14:15:40] 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[14:15:40] [PASSED] 40 VFs [14:15:40] [PASSED] 41 VFs [14:15:40] [PASSED] 42 VFs [14:15:40] [PASSED] 43 VFs [14:15:40] [PASSED] 44 VFs [14:15:40] [PASSED] 45 VFs [14:15:40] [PASSED] 46 VFs [14:15:40] [PASSED] 47 VFs [14:15:40] [PASSED] 48 VFs [14:15:40] [PASSED] 49 VFs [14:15:40] [PASSED] 50 VFs [14:15:40] [PASSED] 51 VFs [14:15:40] [PASSED] 52 VFs [14:15:40] [PASSED] 53 VFs [14:15:40] [PASSED] 54 VFs [14:15:40] [PASSED] 55 VFs [14:15:40] [PASSED] 56 VFs [14:15:40] [PASSED] 57 VFs [14:15:40] [PASSED] 58 VFs [14:15:40] [PASSED] 59 VFs [14:15:40] [PASSED] 60 VFs [14:15:40] [PASSED] 61 VFs [14:15:40] [PASSED] 62 VFs [14:15:40] [PASSED] 63 VFs [14:15:40] ==================== [PASSED] fair_vram ==================== [14:15:40] ================== [PASSED] pf_gt_config =================== [14:15:40] ===================== lmtt (1 subtest) ===================== [14:15:40] ======================== test_ops ========================= [14:15:40] [PASSED] 2-level [14:15:40] [PASSED] multi-level [14:15:40] ==================== [PASSED] test_ops ===================== [14:15:40] ====================== [PASSED] lmtt ======================= [14:15:40] ================= sriov_packet (1 subtest) ================= [14:15:40] [PASSED] test_descriptor_init [14:15:40] ================== [PASSED] sriov_packet =================== [14:15:40] ================= pf_service (11 subtests) ================= [14:15:40] [PASSED] pf_negotiate_any [14:15:40] [PASSED] pf_negotiate_base_match [14:15:40] [PASSED] pf_negotiate_base_newer [14:15:40] [PASSED] pf_negotiate_base_next [14:15:40] [SKIPPED] pf_negotiate_base_older (no older minor) [14:15:40] [PASSED] pf_negotiate_base_prev [14:15:40] [PASSED] pf_negotiate_latest_match [14:15:40] [PASSED] pf_negotiate_latest_newer [14:15:40] [PASSED] pf_negotiate_latest_next [14:15:40] [SKIPPED] pf_negotiate_latest_older (no older minor) [14:15:40] [SKIPPED] pf_negotiate_latest_prev (no prev major) [14:15:40] =================== [PASSED] pf_service ==================== [14:15:40] ================= xe_guc_g2g (2 subtests) ================== [14:15:40] ============== xe_live_guc_g2g_kunit_default ============== [14:15:40] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ========== [14:15:40] ============== xe_live_guc_g2g_kunit_allmem =============== [14:15:40] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ========== [14:15:40] =================== [SKIPPED] xe_guc_g2g =================== [14:15:40] =================== xe_mocs (2 subtests) =================== [14:15:40] ================ xe_live_mocs_kernel_kunit ================ [14:15:40] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============ [14:15:40] ================ xe_live_mocs_reset_kunit ================= [14:15:40] ============ [SKIPPED] xe_live_mocs_reset_kunit ============ [14:15:40] ==================== [SKIPPED] xe_mocs ===================== [14:15:40] ================= xe_migrate (3 subtests) ================== [14:15:40] ================= xe_migrate_sanity_kunit ================= [14:15:40] ============ [SKIPPED] xe_migrate_sanity_kunit ============= [14:15:40] ================== xe_validate_ccs_kunit ================== [14:15:40] ============= [SKIPPED] xe_validate_ccs_kunit ============== [14:15:40] ============= xe_migrate_access_memory_kunit ============== [14:15:40] ========= [SKIPPED] xe_migrate_access_memory_kunit ========= [14:15:40] =================== [SKIPPED] xe_migrate =================== [14:15:40] ================== xe_dma_buf (1 subtest) ================== [14:15:40] ==================== xe_dma_buf_kunit ===================== [14:15:40] ================ [SKIPPED] xe_dma_buf_kunit ================ [14:15:40] =================== [SKIPPED] xe_dma_buf =================== [14:15:40] ================= xe_bo_shrink (1 subtest) ================= [14:15:40] =================== xe_bo_shrink_kunit ==================== [14:15:40] =============== [SKIPPED] xe_bo_shrink_kunit =============== [14:15:40] ================== [SKIPPED] xe_bo_shrink ================== [14:15:40] ==================== xe_bo (2 subtests) ==================== [14:15:40] ================== xe_ccs_migrate_kunit =================== [14:15:40] ============== [SKIPPED] xe_ccs_migrate_kunit ============== [14:15:40] ==================== xe_bo_evict_kunit ==================== [14:15:40] =============== [SKIPPED] xe_bo_evict_kunit ================ [14:15:40] ===================== [SKIPPED] xe_bo ====================== [14:15:40] =================== xe_any (9 subtests) ==================== [14:15:40] [PASSED] test_to_xe [14:15:40] [PASSED] test_to_dev [14:15:40] [PASSED] test_to_pdev [14:15:40] [PASSED] test_to_drm [14:15:40] [PASSED] test_if_pdev [14:15:40] [PASSED] test_if_xe [14:15:40] [PASSED] test_if_tile [14:15:40] [PASSED] test_if_gt [14:15:40] [PASSED] test_to_id [14:15:40] ===================== [PASSED] xe_any ====================== [14:15:40] ==================== args (13 subtests) ==================== [14:15:40] [PASSED] count_args_test [14:15:40] [PASSED] call_args_example [14:15:40] [PASSED] call_args_test [14:15:40] [PASSED] drop_first_arg_example [14:15:40] [PASSED] drop_first_arg_test [14:15:40] [PASSED] first_arg_example [14:15:40] [PASSED] first_arg_test [14:15:40] [PASSED] last_arg_example [14:15:40] [PASSED] last_arg_test [14:15:40] [PASSED] pick_arg_example [14:15:40] [PASSED] if_args_example [14:15:40] [PASSED] if_args_test [14:15:40] [PASSED] sep_comma_example [14:15:40] ====================== [PASSED] args ======================= [14:15:40] =================== xe_pci (3 subtests) ==================== [14:15:40] ==================== check_graphics_ip ==================== [14:15:40] [PASSED] 12.00 Xe_LP [14:15:40] [PASSED] 12.10 Xe_LP+ [14:15:40] [PASSED] 12.55 Xe_HPG [14:15:40] [PASSED] 12.60 Xe_HPC [14:15:40] [PASSED] 12.70 Xe_LPG [14:15:40] [PASSED] 12.71 Xe_LPG [14:15:40] [PASSED] 12.74 Xe_LPG+ [14:15:40] [PASSED] 20.01 Xe2_HPG [14:15:40] [PASSED] 20.02 Xe2_HPG [14:15:40] [PASSED] 20.04 Xe2_LPG [14:15:40] [PASSED] 30.00 Xe3_LPG [14:15:40] [PASSED] 30.01 Xe3_LPG [14:15:40] [PASSED] 30.03 Xe3_LPG [14:15:40] [PASSED] 30.04 Xe3_LPG [14:15:40] [PASSED] 30.05 Xe3_LPG [14:15:40] [PASSED] 35.10 Xe3p_LPG [14:15:40] [PASSED] 35.11 Xe3p_XPC [14:15:40] ================ [PASSED] check_graphics_ip ================ [14:15:40] ===================== check_media_ip ====================== [14:15:40] [PASSED] 12.00 Xe_M [14:15:40] [PASSED] 12.55 Xe_HPM [14:15:40] [PASSED] 13.00 Xe_LPM+ [14:15:40] [PASSED] 13.01 Xe2_HPM [14:15:40] [PASSED] 20.00 Xe2_LPM [14:15:40] [PASSED] 30.00 Xe3_LPM [14:15:40] [PASSED] 30.02 Xe3_LPM [14:15:40] [PASSED] 35.00 Xe3p_LPM [14:15:40] [PASSED] 35.03 Xe3p_HPM [14:15:40] ================= [PASSED] check_media_ip ================== [14:15:40] =================== check_platform_desc =================== [14:15:40] [PASSED] 0x9A60 (TIGERLAKE) [14:15:40] [PASSED] 0x9A68 (TIGERLAKE) [14:15:40] [PASSED] 0x9A70 (TIGERLAKE) [14:15:40] [PASSED] 0x9A40 (TIGERLAKE) [14:15:40] [PASSED] 0x9A49 (TIGERLAKE) [14:15:40] [PASSED] 0x9A59 (TIGERLAKE) [14:15:40] [PASSED] 0x9A78 (TIGERLAKE) [14:15:40] [PASSED] 0x9AC0 (TIGERLAKE) [14:15:40] [PASSED] 0x9AC9 (TIGERLAKE) [14:15:40] [PASSED] 0x9AD9 (TIGERLAKE) [14:15:40] [PASSED] 0x9AF8 (TIGERLAKE) [14:15:40] [PASSED] 0x4C80 (ROCKETLAKE) [14:15:40] [PASSED] 0x4C8A (ROCKETLAKE) [14:15:40] [PASSED] 0x4C8B (ROCKETLAKE) [14:15:40] [PASSED] 0x4C8C (ROCKETLAKE) [14:15:40] [PASSED] 0x4C90 (ROCKETLAKE) [14:15:40] [PASSED] 0x4C9A (ROCKETLAKE) [14:15:40] [PASSED] 0x4680 (ALDERLAKE_S) [14:15:40] [PASSED] 0x4682 (ALDERLAKE_S) [14:15:40] [PASSED] 0x4688 (ALDERLAKE_S) [14:15:40] [PASSED] 0x468A (ALDERLAKE_S) [14:15:40] [PASSED] 0x468B (ALDERLAKE_S) [14:15:40] [PASSED] 0x4690 (ALDERLAKE_S) [14:15:40] [PASSED] 0x4692 (ALDERLAKE_S) [14:15:40] [PASSED] 0x4693 (ALDERLAKE_S) [14:15:40] [PASSED] 0x46A0 (ALDERLAKE_P) [14:15:40] [PASSED] 0x46A1 (ALDERLAKE_P) [14:15:40] [PASSED] 0x46A2 (ALDERLAKE_P) [14:15:40] [PASSED] 0x46A3 (ALDERLAKE_P) [14:15:40] [PASSED] 0x46A6 (ALDERLAKE_P) [14:15:40] [PASSED] 0x46A8 (ALDERLAKE_P) [14:15:40] [PASSED] 0x46AA (ALDERLAKE_P) [14:15:40] [PASSED] 0x462A (ALDERLAKE_P) [14:15:40] [PASSED] 0x4626 (ALDERLAKE_P) [14:15:40] [PASSED] 0x4628 (ALDERLAKE_P) [14:15:40] [PASSED] 0x46B0 (ALDERLAKE_P) [14:15:40] [PASSED] 0x46B1 (ALDERLAKE_P) [14:15:40] [PASSED] 0x46B2 (ALDERLAKE_P) [14:15:40] [PASSED] 0x46B3 (ALDERLAKE_P) [14:15:40] [PASSED] 0x46C0 (ALDERLAKE_P) [14:15:40] [PASSED] 0x46C1 (ALDERLAKE_P) [14:15:40] [PASSED] 0x46C2 (ALDERLAKE_P) [14:15:40] [PASSED] 0x46C3 (ALDERLAKE_P) [14:15:40] [PASSED] 0x46D0 (ALDERLAKE_N) [14:15:40] [PASSED] 0x46D1 (ALDERLAKE_N) [14:15:40] [PASSED] 0x46D2 (ALDERLAKE_N) [14:15:40] [PASSED] 0x46D3 (ALDERLAKE_N) [14:15:40] [PASSED] 0x46D4 (ALDERLAKE_N) [14:15:40] [PASSED] 0xA721 (ALDERLAKE_P) [14:15:40] [PASSED] 0xA7A1 (ALDERLAKE_P) [14:15:40] [PASSED] 0xA7A9 (ALDERLAKE_P) [14:15:40] [PASSED] 0xA7AC (ALDERLAKE_P) [14:15:40] [PASSED] 0xA7AD (ALDERLAKE_P) [14:15:40] [PASSED] 0xA720 (ALDERLAKE_P) [14:15:40] [PASSED] 0xA7A0 (ALDERLAKE_P) [14:15:40] [PASSED] 0xA7A8 (ALDERLAKE_P) [14:15:40] [PASSED] 0xA7AA (ALDERLAKE_P) [14:15:40] [PASSED] 0xA7AB (ALDERLAKE_P) [14:15:40] [PASSED] 0xA780 (ALDERLAKE_S) [14:15:40] [PASSED] 0xA781 (ALDERLAKE_S) [14:15:40] [PASSED] 0xA782 (ALDERLAKE_S) [14:15:40] [PASSED] 0xA783 (ALDERLAKE_S) [14:15:40] [PASSED] 0xA788 (ALDERLAKE_S) [14:15:40] [PASSED] 0xA789 (ALDERLAKE_S) [14:15:40] [PASSED] 0xA78A (ALDERLAKE_S) [14:15:40] [PASSED] 0xA78B (ALDERLAKE_S) [14:15:40] [PASSED] 0x4905 (DG1) [14:15:40] [PASSED] 0x4906 (DG1) [14:15:40] [PASSED] 0x4907 (DG1) [14:15:40] [PASSED] 0x4908 (DG1) [14:15:40] [PASSED] 0x4909 (DG1) [14:15:40] [PASSED] 0x56C0 (DG2) [14:15:40] [PASSED] 0x56C2 (DG2) [14:15:40] [PASSED] 0x56C1 (DG2) [14:15:40] [PASSED] 0x7D51 (METEORLAKE) [14:15:40] [PASSED] 0x7DD1 (METEORLAKE) [14:15:40] [PASSED] 0x7D41 (METEORLAKE) [14:15:40] [PASSED] 0x7D67 (METEORLAKE) [14:15:40] [PASSED] 0xB640 (METEORLAKE) [14:15:40] [PASSED] 0x56A0 (DG2) [14:15:40] [PASSED] 0x56A1 (DG2) [14:15:40] [PASSED] 0x56A2 (DG2) [14:15:40] [PASSED] 0x56BE (DG2) [14:15:40] [PASSED] 0x56BF (DG2) [14:15:40] [PASSED] 0x5690 (DG2) [14:15:40] [PASSED] 0x5691 (DG2) [14:15:40] [PASSED] 0x5692 (DG2) [14:15:40] [PASSED] 0x56A5 (DG2) [14:15:40] [PASSED] 0x56A6 (DG2) [14:15:40] [PASSED] 0x56B0 (DG2) [14:15:40] [PASSED] 0x56B1 (DG2) [14:15:40] [PASSED] 0x56BA (DG2) [14:15:40] [PASSED] 0x56BB (DG2) [14:15:40] [PASSED] 0x56BC (DG2) [14:15:40] [PASSED] 0x56BD (DG2) [14:15:40] [PASSED] 0x5693 (DG2) [14:15:40] [PASSED] 0x5694 (DG2) [14:15:40] [PASSED] 0x5695 (DG2) [14:15:40] [PASSED] 0x56A3 (DG2) [14:15:40] [PASSED] 0x56A4 (DG2) [14:15:40] [PASSED] 0x56B2 (DG2) [14:15:40] [PASSED] 0x56B3 (DG2) [14:15:40] [PASSED] 0x5696 (DG2) [14:15:40] [PASSED] 0x5697 (DG2) [14:15:40] [PASSED] 0xB69 (PVC) [14:15:40] [PASSED] 0xB6E (PVC) [14:15:40] [PASSED] 0xBD4 (PVC) [14:15:40] [PASSED] 0xBD5 (PVC) [14:15:40] [PASSED] 0xBD6 (PVC) [14:15:40] [PASSED] 0xBD7 (PVC) [14:15:40] [PASSED] 0xBD8 (PVC) [14:15:40] [PASSED] 0xBD9 (PVC) [14:15:40] [PASSED] 0xBDA (PVC) [14:15:40] [PASSED] 0xBDB (PVC) [14:15:40] [PASSED] 0xBE0 (PVC) [14:15:40] [PASSED] 0xBE1 (PVC) [14:15:40] [PASSED] 0xBE5 (PVC) [14:15:40] [PASSED] 0x7D40 (METEORLAKE) [14:15:40] [PASSED] 0x7D45 (METEORLAKE) [14:15:40] [PASSED] 0x7D55 (METEORLAKE) [14:15:40] [PASSED] 0x7D60 (METEORLAKE) [14:15:40] [PASSED] 0x7DD5 (METEORLAKE) [14:15:40] [PASSED] 0x6420 (LUNARLAKE) [14:15:40] [PASSED] 0x64A0 (LUNARLAKE) [14:15:40] [PASSED] 0x64B0 (LUNARLAKE) [14:15:40] [PASSED] 0xE202 (BATTLEMAGE) [14:15:40] [PASSED] 0xE209 (BATTLEMAGE) [14:15:40] [PASSED] 0xE20B (BATTLEMAGE) [14:15:40] [PASSED] 0xE20C (BATTLEMAGE) [14:15:40] [PASSED] 0xE20D (BATTLEMAGE) [14:15:40] [PASSED] 0xE210 (BATTLEMAGE) [14:15:40] [PASSED] 0xE211 (BATTLEMAGE) [14:15:40] [PASSED] 0xE212 (BATTLEMAGE) [14:15:40] [PASSED] 0xE216 (BATTLEMAGE) [14:15:40] [PASSED] 0xE220 (BATTLEMAGE) [14:15:40] [PASSED] 0xE221 (BATTLEMAGE) [14:15:40] [PASSED] 0xE222 (BATTLEMAGE) [14:15:40] [PASSED] 0xE223 (BATTLEMAGE) [14:15:40] [PASSED] 0xB080 (PANTHERLAKE) [14:15:40] [PASSED] 0xB081 (PANTHERLAKE) [14:15:40] [PASSED] 0xB082 (PANTHERLAKE) [14:15:40] [PASSED] 0xB083 (PANTHERLAKE) [14:15:40] [PASSED] 0xB084 (PANTHERLAKE) [14:15:40] [PASSED] 0xB085 (PANTHERLAKE) [14:15:40] [PASSED] 0xB086 (PANTHERLAKE) [14:15:40] [PASSED] 0xB087 (PANTHERLAKE) [14:15:40] [PASSED] 0xB08F (PANTHERLAKE) [14:15:40] [PASSED] 0xB090 (PANTHERLAKE) [14:15:40] [PASSED] 0xB0A0 (PANTHERLAKE) [14:15:40] [PASSED] 0xB0A1 (PANTHERLAKE) [14:15:40] [PASSED] 0xB0B0 (PANTHERLAKE) [14:15:40] [PASSED] 0xFD80 (PANTHERLAKE) [14:15:40] [PASSED] 0xFD81 (PANTHERLAKE) [14:15:40] [PASSED] 0xD740 (NOVALAKE_S) [14:15:40] [PASSED] 0xD741 (NOVALAKE_S) [14:15:40] [PASSED] 0xD742 (NOVALAKE_S) [14:15:40] [PASSED] 0xD743 (NOVALAKE_S) [14:15:40] [PASSED] 0xD745 (NOVALAKE_S) [14:15:40] [PASSED] 0xD74A (NOVALAKE_S) [14:15:40] [PASSED] 0xD74B (NOVALAKE_S) [14:15:40] [PASSED] 0x674C (CRESCENTISLAND) [14:15:40] [PASSED] 0x674D (CRESCENTISLAND) [14:15:40] [PASSED] 0x674E (CRESCENTISLAND) [14:15:40] [PASSED] 0x674F (CRESCENTISLAND) [14:15:40] [PASSED] 0x6750 (CRESCENTISLAND) [14:15:40] [PASSED] 0x6751 (CRESCENTISLAND) [14:15:40] [PASSED] 0x6752 (CRESCENTISLAND) [14:15:40] [PASSED] 0xD750 (NOVALAKE_P) [14:15:40] [PASSED] 0xD751 (NOVALAKE_P) [14:15:40] [PASSED] 0xD752 (NOVALAKE_P) [14:15:40] [PASSED] 0xD753 (NOVALAKE_P) [14:15:40] [PASSED] 0xD754 (NOVALAKE_P) [14:15:40] [PASSED] 0xD755 (NOVALAKE_P) [14:15:40] [PASSED] 0xD756 (NOVALAKE_P) [14:15:40] [PASSED] 0xD757 (NOVALAKE_P) [14:15:40] [PASSED] 0xD75F (NOVALAKE_P) [14:15:40] =============== [PASSED] check_platform_desc =============== [14:15:40] ===================== [PASSED] xe_pci ====================== [14:15:40] ============= xe_rtp_tables_test (5 subtests) ============== [14:15:40] ================== xe_rtp_table_gt_test =================== [14:15:40] [PASSED] gt_was/14011060649 [14:15:40] [PASSED] gt_was/14011059788 [14:15:40] [PASSED] gt_was/14015795083 [14:15:40] [PASSED] gt_was/16021867713 [14:15:40] [PASSED] gt_was/14019449301 [14:15:40] [PASSED] gt_was/16028005424 [14:15:40] [PASSED] gt_was/14026578760 [14:15:40] [PASSED] gt_was/1409420604 [14:15:40] [PASSED] gt_was/1408615072 [14:15:40] [PASSED] gt_was/22010523718 [14:15:40] [PASSED] gt_was/14011006942 [14:15:40] [PASSED] gt_was/14014830051 [14:15:40] [PASSED] gt_was/18018781329 [14:15:40] [PASSED] gt_was/1509235366 [14:15:40] [PASSED] gt_was/18018781329 [14:15:40] [PASSED] gt_was/16016694945 [14:15:40] [PASSED] gt_was/14018575942 [14:15:40] [PASSED] gt_was/22016670082 [14:15:40] [PASSED] gt_was/22016670082 [14:15:40] [PASSED] gt_was/14017421178 [14:15:40] [PASSED] gt_was/16025250150 [14:15:40] [PASSED] gt_was/14021871409 [14:15:40] [PASSED] gt_was/16021865536 [14:15:40] [PASSED] gt_was/14021486841 [14:15:40] [PASSED] gt_was/14025160223 [14:15:40] [PASSED] gt_was/14026144927, 16029437861, 14026127056 [14:15:40] [PASSED] gt_was/14025635424 [14:15:40] [PASSED] gt_was/16028005424 [14:15:40] ============== [PASSED] xe_rtp_table_gt_test =============== [14:15:40] ================== xe_rtp_table_gt_test =================== [14:15:40] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable [14:15:40] [PASSED] gt_tunings/Tuning: 32B Access Enable [14:15:40] [PASSED] gt_tunings/Tuning: L3 cache [14:15:40] [PASSED] gt_tunings/Tuning: L3 cache - media [14:15:40] [PASSED] gt_tunings/Tuning: Compression Overfetch [14:15:40] [PASSED] gt_tunings/Tuning: Compression Overfetch - media [14:15:40] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 [14:15:40] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media [14:15:40] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only [14:15:40] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media [14:15:40] [PASSED] gt_tunings/Tuning: Stateless compression control [14:15:40] [PASSED] gt_tunings/Tuning: Stateless compression control - media [14:15:40] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache [14:15:40] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media [14:15:40] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB [14:15:40] [PASSED] gt_tunings/Tuning: Force All Non-Compressible Memory Reads to be 256B Overfetches [14:15:40] ============== [PASSED] xe_rtp_table_gt_test =============== [14:15:40] ================== xe_rtp_table_oob_test ================== [14:15:40] [PASSED] oob_was/1607983814 [14:15:40] [PASSED] oob_was/16010904313 [14:15:40] [PASSED] oob_was/18022495364 [14:15:40] [PASSED] oob_was/22012773006 [14:15:40] [PASSED] oob_was/14014475959 [14:15:40] [PASSED] oob_was/22011391025 [14:15:40] [PASSED] oob_was/22012727170 [14:15:40] [PASSED] oob_was/22012727685 [14:15:40] [PASSED] oob_was/22016596838 [14:15:40] [PASSED] oob_was/18020744125 [14:15:40] [PASSED] oob_was/1409600907 [14:15:40] [PASSED] oob_was/22014953428 [14:15:40] [PASSED] oob_was/16017236439 [14:15:40] [PASSED] oob_was/14019821291 [14:15:40] [PASSED] oob_was/14015076503 [14:15:40] [PASSED] oob_was/22016122933 [14:15:40] [PASSED] oob_was/14018913170 [14:15:40] [PASSED] oob_was/14018094691 [14:15:40] [PASSED] oob_was/18024947630 [14:15:40] [PASSED] oob_was/16022287689 [14:15:40] [PASSED] oob_was/13011645652 [14:15:40] [PASSED] oob_was/14022293748 [14:15:40] [PASSED] oob_was/22019794406 [14:15:40] [PASSED] oob_was/22019338487 [14:15:40] [PASSED] oob_was/16023588340 [14:15:40] [PASSED] oob_was/14019789679 [14:15:40] [PASSED] oob_was/14022866841 [14:15:40] [PASSED] oob_was/16021333562 [14:15:40] [PASSED] oob_was/14016712196 [14:15:40] [PASSED] oob_was/14015568240 [14:15:40] [PASSED] oob_was/18013179988 [14:15:40] [PASSED] oob_was/1508761755 [14:15:40] [PASSED] oob_was/16023105232 [14:15:40] [PASSED] oob_was/16026508708 [14:15:40] [PASSED] oob_was/14020001231 [14:15:40] [PASSED] oob_was/16023683509 [14:15:40] [PASSED] oob_was/14025515070 [14:15:40] [PASSED] oob_was/15015404425_disable [14:15:40] [PASSED] oob_was/16026007364 [14:15:40] [PASSED] oob_was/14020316580 [14:15:40] [PASSED] oob_was/14025883347 [14:15:40] [PASSED] oob_was/16029380221 [14:15:40] [PASSED] oob_was/22022079272 [14:15:40] [PASSED] oob_was/16029897822 [14:15:40] [PASSED] oob_was/14026539277 [14:15:40] [PASSED] oob_was/14027054324 [14:15:40] [PASSED] oob_was/14025941587 [14:15:40] [PASSED] oob_was/16030224309 [14:15:40] [PASSED] oob_was/14028709524 [14:15:40] ============== [PASSED] xe_rtp_table_oob_test ============== [14:15:40] ================ xe_rtp_table_dev_oob_test ================ [14:15:40] [PASSED] device_oob_was/22010954014 [14:15:40] [PASSED] device_oob_was/15015404425 [14:15:40] [PASSED] device_oob_was/22019338487_display [14:15:40] [PASSED] device_oob_was/14022085890 [14:15:40] [PASSED] device_oob_was/14026633728 [14:15:40] [PASSED] device_oob_was/14026746987 [14:15:40] [PASSED] device_oob_was/14026779378 [14:15:40] ============ [PASSED] xe_rtp_table_dev_oob_test ============ [14:15:40] ========== xe_rtp_table_missing_upper_bound_test ========== [14:15:40] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865 [14:15:40] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037 [14:15:40] [PASSED] register_whitelist/1806527549 [14:15:40] [PASSED] register_whitelist/allow_read_ctx_timestamp [14:15:40] [PASSED] register_whitelist/allow_read_queue_timestamp [14:15:40] [PASSED] register_whitelist/16014440446 [14:15:40] [PASSED] register_whitelist/16017236439 [14:15:40] [PASSED] register_whitelist/16020183090 [14:15:40] [PASSED] register_whitelist/14024997852 [14:15:40] [PASSED] register_whitelist/14024997852 [14:15:40] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ====== [14:15:40] =============== [PASSED] xe_rtp_tables_test ================ [14:15:40] =================== xe_rtp (3 subtests) ==================== [14:15:40] =================== xe_rtp_rules_tests ==================== [14:15:40] [PASSED] no [14:15:40] [PASSED] yes [14:15:40] [PASSED] no-and-no [14:15:40] [PASSED] no-and-yes [14:15:40] [PASSED] yes-and-no [14:15:40] [PASSED] yes-and-yes [14:15:40] [PASSED] no-or-no [14:15:40] [PASSED] no-or-yes [14:15:40] [PASSED] yes-or-no [14:15:40] [PASSED] yes-or-yes [14:15:40] [PASSED] no-yes-or-yes-no [14:15:40] [PASSED] no-yes-or-yes-yes [14:15:40] [PASSED] yes-yes-or-no-yes [14:15:40] [PASSED] yes-yes-or-yes-yes [14:15:40] [PASSED] no-no-or-yes-or-no [14:15:40] [PASSED] or [14:15:40] [PASSED] or-yes [14:15:40] [PASSED] or-no [14:15:40] [PASSED] yes-or [14:15:40] [PASSED] no-or [14:15:40] [PASSED] no-or-or-yes [14:15:40] [PASSED] yes-or-or-no [14:15:40] [PASSED] no-or-or-no [14:15:40] [PASSED] missing-context-engine-class [14:15:40] [PASSED] missing-context-engine-class-or-yes [14:15:40] [PASSED] missing-context-engine-class-or-or-yes [14:15:40] =============== [PASSED] xe_rtp_rules_tests ================ [14:15:40] =============== xe_rtp_process_to_sr_tests ================ [14:15:40] [PASSED] coalesce-same-reg [14:15:40] [PASSED] coalesce-same-reg-literal-and-func [14:15:40] [PASSED] no-match-no-add [14:15:40] [PASSED] two-regs-two-entries [14:15:40] [PASSED] clr-one-set-other [14:15:40] [PASSED] set-field [14:15:40] [PASSED] conflict-duplicate [14:15:40] [PASSED] conflict-not-disjoint [14:15:40] [PASSED] conflict-not-disjoint-literal-and-func [14:15:40] [PASSED] conflict-reg-type [14:15:40] [PASSED] bad-mcr-reg-forced-to-regular [14:15:40] [PASSED] bad-regular-reg-forced-to-mcr [14:15:40] =========== [PASSED] xe_rtp_process_to_sr_tests ============ [14:15:40] ================== xe_rtp_process_tests =================== [14:15:40] [PASSED] active1 [14:15:40] [PASSED] active2 [14:15:40] [PASSED] active-inactive [14:15:40] [PASSED] inactive-active [14:15:40] [PASSED] inactive-active-inactive [14:15:40] [PASSED] inactive-inactive-inactive [14:15:40] ============== [PASSED] xe_rtp_process_tests =============== [14:15:40] ===================== [PASSED] xe_rtp ====================== [14:15:40] ==================== xe_wa (1 subtest) ===================== [14:15:40] ======================== xe_wa_gt ========================= [14:15:40] [PASSED] TIGERLAKE B0 [14:15:40] [PASSED] DG1 A0 [14:15:40] [PASSED] DG1 B0 [14:15:40] [PASSED] ALDERLAKE_S A0 [14:15:40] [PASSED] ALDERLAKE_S B0 [14:15:40] [PASSED] ALDERLAKE_S C0 [14:15:40] [PASSED] ALDERLAKE_S D0 [14:15:40] [PASSED] ALDERLAKE_P A0 [14:15:40] [PASSED] ALDERLAKE_P B0 [14:15:40] [PASSED] ALDERLAKE_P C0 [14:15:40] [PASSED] ALDERLAKE_S RPLS D0 [14:15:40] [PASSED] ALDERLAKE_P RPLU E0 [14:15:40] [PASSED] DG2 G10 C0 [14:15:40] [PASSED] DG2 G11 B1 [14:15:40] [PASSED] DG2 G12 A1 [14:15:40] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0 [14:15:40] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0 [14:15:40] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0 [14:15:40] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0 [14:15:40] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0 [14:15:40] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1 [14:15:40] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0 [14:15:40] ==================== [PASSED] xe_wa_gt ===================== [14:15:40] ====================== [PASSED] xe_wa ====================== [14:15:40] ============================================================ [14:15:40] Testing complete. Ran 840 tests: passed: 811, skipped: 29 [14:15:40] Elapsed time: 41.533s total, 2.546s configuring, 38.221s building, 0.716s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig [14:15:40] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig [14:15:43] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [14:16:08] Starting KUnit Kernel (1/1)... [14:16:08] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [14:16:08] ============ drm_test_pick_cmdline (2 subtests) ============ [14:16:08] [PASSED] drm_test_pick_cmdline_res_1920_1080_60 [14:16:08] =============== drm_test_pick_cmdline_named =============== [14:16:08] [PASSED] NTSC [14:16:08] [PASSED] NTSC-J [14:16:08] [PASSED] PAL [14:16:08] [PASSED] PAL-M [14:16:08] =========== [PASSED] drm_test_pick_cmdline_named =========== [14:16:08] ============== [PASSED] drm_test_pick_cmdline ============== [14:16:08] == drm_test_atomic_get_connector_for_encoder (1 subtest) === [14:16:08] [PASSED] drm_test_drm_atomic_get_connector_for_encoder [14:16:08] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ==== [14:16:08] =========== drm_validate_clone_mode (2 subtests) =========== [14:16:08] ============== drm_test_check_in_clone_mode =============== [14:16:08] [PASSED] in_clone_mode [14:16:08] [PASSED] not_in_clone_mode [14:16:08] ========== [PASSED] drm_test_check_in_clone_mode =========== [14:16:08] =============== drm_test_check_valid_clones =============== [14:16:08] [PASSED] not_in_clone_mode [14:16:08] [PASSED] valid_clone [14:16:08] [PASSED] invalid_clone [14:16:08] =========== [PASSED] drm_test_check_valid_clones =========== [14:16:08] ============= [PASSED] drm_validate_clone_mode ============= [14:16:08] ============= drm_validate_modeset (1 subtest) ============= [14:16:08] [PASSED] drm_test_check_connector_changed_modeset [14:16:08] ============== [PASSED] drm_validate_modeset =============== [14:16:08] ====== drm_test_bridge_get_current_state (1 subtest) ======= [14:16:08] [PASSED] drm_test_drm_bridge_get_current_state_atomic [14:16:08] ======== [PASSED] drm_test_bridge_get_current_state ======== [14:16:08] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ====== [14:16:08] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic [14:16:08] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled [14:16:08] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts [14:16:08] ======== [PASSED] drm_test_bridge_helper_reset_crtc ======== [14:16:08] ============== drm_bridge_alloc (2 subtests) =============== [14:16:08] [PASSED] drm_test_drm_bridge_alloc_basic [14:16:08] [PASSED] drm_test_drm_bridge_alloc_get_put [14:16:08] ================ [PASSED] drm_bridge_alloc ================= [14:16:08] ============= drm_bridge_bus_fmt (5 subtests) ============== [14:16:08] [PASSED] drm_test_bridge_rgb_yuv_rgb [14:16:08] [PASSED] drm_test_bridge_must_convert_to_yuv444 [14:16:08] [PASSED] drm_test_bridge_hdmi_auto_rgb [14:16:08] [PASSED] drm_test_bridge_auto_first [14:16:08] [PASSED] drm_test_bridge_rgb_yuv_no_path [14:16:08] =============== [PASSED] drm_bridge_bus_fmt ================ [14:16:08] ============= drm_cmdline_parser (40 subtests) ============= [14:16:08] [PASSED] drm_test_cmdline_force_d_only [14:16:08] [PASSED] drm_test_cmdline_force_D_only_dvi [14:16:08] [PASSED] drm_test_cmdline_force_D_only_hdmi [14:16:08] [PASSED] drm_test_cmdline_force_D_only_not_digital [14:16:08] [PASSED] drm_test_cmdline_force_e_only [14:16:08] [PASSED] drm_test_cmdline_res [14:16:08] [PASSED] drm_test_cmdline_res_vesa [14:16:08] [PASSED] drm_test_cmdline_res_vesa_rblank [14:16:08] [PASSED] drm_test_cmdline_res_rblank [14:16:08] [PASSED] drm_test_cmdline_res_bpp [14:16:08] [PASSED] drm_test_cmdline_res_refresh [14:16:08] [PASSED] drm_test_cmdline_res_bpp_refresh [14:16:08] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced [14:16:08] [PASSED] drm_test_cmdline_res_bpp_refresh_margins [14:16:08] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off [14:16:08] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on [14:16:08] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog [14:16:08] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital [14:16:08] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on [14:16:08] [PASSED] drm_test_cmdline_res_margins_force_on [14:16:08] [PASSED] drm_test_cmdline_res_vesa_margins [14:16:08] [PASSED] drm_test_cmdline_name [14:16:08] [PASSED] drm_test_cmdline_name_bpp [14:16:08] [PASSED] drm_test_cmdline_name_option [14:16:08] [PASSED] drm_test_cmdline_name_bpp_option [14:16:08] [PASSED] drm_test_cmdline_rotate_0 [14:16:08] [PASSED] drm_test_cmdline_rotate_90 [14:16:08] [PASSED] drm_test_cmdline_rotate_180 [14:16:08] [PASSED] drm_test_cmdline_rotate_270 [14:16:08] [PASSED] drm_test_cmdline_hmirror [14:16:08] [PASSED] drm_test_cmdline_vmirror [14:16:08] [PASSED] drm_test_cmdline_margin_options [14:16:08] [PASSED] drm_test_cmdline_multiple_options [14:16:08] [PASSED] drm_test_cmdline_bpp_extra_and_option [14:16:08] [PASSED] drm_test_cmdline_extra_and_option [14:16:08] [PASSED] drm_test_cmdline_freestanding_options [14:16:08] [PASSED] drm_test_cmdline_freestanding_force_e_and_options [14:16:08] [PASSED] drm_test_cmdline_panel_orientation [14:16:08] ================ drm_test_cmdline_invalid ================= [14:16:08] [PASSED] margin_only [14:16:08] [PASSED] interlace_only [14:16:08] [PASSED] res_missing_x [14:16:08] [PASSED] res_missing_y [14:16:08] [PASSED] res_bad_y [14:16:08] [PASSED] res_missing_y_bpp [14:16:08] [PASSED] res_bad_bpp [14:16:08] [PASSED] res_bad_refresh [14:16:08] [PASSED] res_bpp_refresh_force_on_off [14:16:08] [PASSED] res_invalid_mode [14:16:08] [PASSED] res_bpp_wrong_place_mode [14:16:08] [PASSED] name_bpp_refresh [14:16:08] [PASSED] name_refresh [14:16:08] [PASSED] name_refresh_wrong_mode [14:16:08] [PASSED] name_refresh_invalid_mode [14:16:08] [PASSED] rotate_multiple [14:16:08] [PASSED] rotate_invalid_val [14:16:08] [PASSED] rotate_truncated [14:16:08] [PASSED] invalid_option [14:16:08] [PASSED] invalid_tv_option [14:16:08] [PASSED] truncated_tv_option [14:16:08] ============ [PASSED] drm_test_cmdline_invalid ============= [14:16:08] =============== drm_test_cmdline_tv_options =============== [14:16:08] [PASSED] NTSC [14:16:08] [PASSED] NTSC_443 [14:16:08] [PASSED] NTSC_J [14:16:08] [PASSED] PAL [14:16:08] [PASSED] PAL_M [14:16:08] [PASSED] PAL_N [14:16:08] [PASSED] SECAM [14:16:08] [PASSED] MONO_525 [14:16:08] [PASSED] MONO_625 [14:16:08] =========== [PASSED] drm_test_cmdline_tv_options =========== [14:16:08] =============== [PASSED] drm_cmdline_parser ================ [14:16:08] ========== drmm_connector_hdmi_init (20 subtests) ========== [14:16:08] [PASSED] drm_test_connector_hdmi_init_valid [14:16:08] [PASSED] drm_test_connector_hdmi_init_bpc_8 [14:16:08] [PASSED] drm_test_connector_hdmi_init_bpc_10 [14:16:08] [PASSED] drm_test_connector_hdmi_init_bpc_12 [14:16:08] [PASSED] drm_test_connector_hdmi_init_bpc_invalid [14:16:08] [PASSED] drm_test_connector_hdmi_init_bpc_null [14:16:08] [PASSED] drm_test_connector_hdmi_init_formats_empty [14:16:08] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb [14:16:08] === drm_test_connector_hdmi_init_formats_yuv420_allowed === [14:16:08] [PASSED] supported_formats=0x9 yuv420_allowed=1 [14:16:08] [PASSED] supported_formats=0x9 yuv420_allowed=0 [14:16:08] [PASSED] supported_formats=0x5 yuv420_allowed=1 [14:16:08] [PASSED] supported_formats=0x5 yuv420_allowed=0 [14:16:08] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed === [14:16:08] [PASSED] drm_test_connector_hdmi_init_null_ddc [14:16:08] [PASSED] drm_test_connector_hdmi_init_null_product [14:16:08] [PASSED] drm_test_connector_hdmi_init_null_vendor [14:16:08] [PASSED] drm_test_connector_hdmi_init_product_length_exact [14:16:08] [PASSED] drm_test_connector_hdmi_init_product_length_too_long [14:16:08] [PASSED] drm_test_connector_hdmi_init_product_valid [14:16:08] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact [14:16:08] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long [14:16:08] [PASSED] drm_test_connector_hdmi_init_vendor_valid [14:16:08] ========= drm_test_connector_hdmi_init_type_valid ========= [14:16:08] [PASSED] HDMI-A [14:16:08] [PASSED] HDMI-B [14:16:08] ===== [PASSED] drm_test_connector_hdmi_init_type_valid ===== [14:16:08] ======== drm_test_connector_hdmi_init_type_invalid ======== [14:16:08] [PASSED] Unknown [14:16:08] [PASSED] VGA [14:16:08] [PASSED] DVI-I [14:16:08] [PASSED] DVI-D [14:16:08] [PASSED] DVI-A [14:16:08] [PASSED] Composite [14:16:08] [PASSED] SVIDEO [14:16:08] [PASSED] LVDS [14:16:08] [PASSED] Component [14:16:08] [PASSED] DIN [14:16:08] [PASSED] DP [14:16:08] [PASSED] TV [14:16:08] [PASSED] eDP [14:16:08] [PASSED] Virtual [14:16:08] [PASSED] DSI [14:16:08] [PASSED] DPI [14:16:08] [PASSED] Writeback [14:16:08] [PASSED] SPI [14:16:08] [PASSED] USB [14:16:08] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ==== [14:16:08] ============ [PASSED] drmm_connector_hdmi_init ============= [14:16:08] ============= drmm_connector_init (3 subtests) ============= [14:16:08] [PASSED] drm_test_drmm_connector_init [14:16:08] [PASSED] drm_test_drmm_connector_init_null_ddc [14:16:08] ========= drm_test_drmm_connector_init_type_valid ========= [14:16:08] [PASSED] Unknown [14:16:08] [PASSED] VGA [14:16:08] [PASSED] DVI-I [14:16:08] [PASSED] DVI-D [14:16:08] [PASSED] DVI-A [14:16:08] [PASSED] Composite [14:16:08] [PASSED] SVIDEO [14:16:08] [PASSED] LVDS [14:16:08] [PASSED] Component [14:16:08] [PASSED] DIN [14:16:08] [PASSED] DP [14:16:08] [PASSED] HDMI-A [14:16:08] [PASSED] HDMI-B [14:16:08] [PASSED] TV [14:16:08] [PASSED] eDP [14:16:08] [PASSED] Virtual [14:16:08] [PASSED] DSI [14:16:08] [PASSED] DPI [14:16:08] [PASSED] Writeback [14:16:08] [PASSED] SPI [14:16:08] [PASSED] USB [14:16:08] ===== [PASSED] drm_test_drmm_connector_init_type_valid ===== [14:16:08] =============== [PASSED] drmm_connector_init =============== [14:16:08] ========= drm_connector_dynamic_init (6 subtests) ========== [14:16:08] [PASSED] drm_test_drm_connector_dynamic_init [14:16:08] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc [14:16:08] [PASSED] drm_test_drm_connector_dynamic_init_not_added [14:16:08] [PASSED] drm_test_drm_connector_dynamic_init_properties [14:16:08] ===== drm_test_drm_connector_dynamic_init_type_valid ====== [14:16:08] [PASSED] Unknown [14:16:08] [PASSED] VGA [14:16:08] [PASSED] DVI-I [14:16:08] [PASSED] DVI-D [14:16:08] [PASSED] DVI-A [14:16:08] [PASSED] Composite [14:16:08] [PASSED] SVIDEO [14:16:08] [PASSED] LVDS [14:16:08] [PASSED] Component [14:16:08] [PASSED] DIN [14:16:08] [PASSED] DP [14:16:08] [PASSED] HDMI-A [14:16:08] [PASSED] HDMI-B [14:16:08] [PASSED] TV [14:16:08] [PASSED] eDP [14:16:08] [PASSED] Virtual [14:16:08] [PASSED] DSI [14:16:08] [PASSED] DPI [14:16:08] [PASSED] Writeback [14:16:08] [PASSED] SPI [14:16:08] [PASSED] USB [14:16:08] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid == [14:16:08] ======== drm_test_drm_connector_dynamic_init_name ========= [14:16:08] [PASSED] Unknown [14:16:08] [PASSED] VGA [14:16:08] [PASSED] DVI-I [14:16:08] [PASSED] DVI-D [14:16:08] [PASSED] DVI-A [14:16:08] [PASSED] Composite [14:16:08] [PASSED] SVIDEO [14:16:08] [PASSED] LVDS [14:16:08] [PASSED] Component [14:16:08] [PASSED] DIN [14:16:08] [PASSED] DP [14:16:08] [PASSED] HDMI-A [14:16:08] [PASSED] HDMI-B [14:16:08] [PASSED] TV [14:16:08] [PASSED] eDP [14:16:08] [PASSED] Virtual [14:16:08] [PASSED] DSI [14:16:08] [PASSED] DPI [14:16:08] [PASSED] Writeback [14:16:08] [PASSED] SPI [14:16:08] [PASSED] USB [14:16:08] ==== [PASSED] drm_test_drm_connector_dynamic_init_name ===== [14:16:08] =========== [PASSED] drm_connector_dynamic_init ============ [14:16:08] ==== drm_connector_dynamic_register_early (4 subtests) ===== [14:16:08] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list [14:16:08] [PASSED] drm_test_drm_connector_dynamic_register_early_defer [14:16:08] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init [14:16:08] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object [14:16:08] ====== [PASSED] drm_connector_dynamic_register_early ======= [14:16:08] ======= drm_connector_dynamic_register (7 subtests) ======== [14:16:08] [PASSED] drm_test_drm_connector_dynamic_register_on_list [14:16:08] [PASSED] drm_test_drm_connector_dynamic_register_no_defer [14:16:08] [PASSED] drm_test_drm_connector_dynamic_register_no_init [14:16:08] [PASSED] drm_test_drm_connector_dynamic_register_mode_object [14:16:08] [PASSED] drm_test_drm_connector_dynamic_register_sysfs [14:16:08] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name [14:16:08] [PASSED] drm_test_drm_connector_dynamic_register_debugfs [14:16:08] ========= [PASSED] drm_connector_dynamic_register ========== [14:16:08] = drm_connector_attach_broadcast_rgb_property (2 subtests) = [14:16:08] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property [14:16:08] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector [14:16:08] === [PASSED] drm_connector_attach_broadcast_rgb_property === [14:16:08] ========== drm_get_tv_mode_from_name (2 subtests) ========== [14:16:08] ========== drm_test_get_tv_mode_from_name_valid =========== [14:16:08] [PASSED] NTSC [14:16:08] [PASSED] NTSC-443 [14:16:08] [PASSED] NTSC-J [14:16:08] [PASSED] PAL [14:16:08] [PASSED] PAL-M [14:16:08] [PASSED] PAL-N [14:16:08] [PASSED] SECAM [14:16:08] [PASSED] Mono [14:16:08] ====== [PASSED] drm_test_get_tv_mode_from_name_valid ======= [14:16:08] [PASSED] drm_test_get_tv_mode_from_name_truncated [14:16:08] ============ [PASSED] drm_get_tv_mode_from_name ============ [14:16:08] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) = [14:16:08] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb [14:16:08] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc [14:16:08] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1 [14:16:08] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc [14:16:08] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1 [14:16:08] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double [14:16:08] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid = [14:16:08] [PASSED] VIC 96 [14:16:08] [PASSED] VIC 97 [14:16:08] [PASSED] VIC 101 [14:16:08] [PASSED] VIC 102 [14:16:08] [PASSED] VIC 106 [14:16:08] [PASSED] VIC 107 [14:16:08] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid === [14:16:08] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc [14:16:08] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc [14:16:08] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc [14:16:08] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc [14:16:08] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc [14:16:08] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ==== [14:16:08] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) == [14:16:08] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ==== [14:16:08] [PASSED] Automatic [14:16:08] [PASSED] Full [14:16:08] [PASSED] Limited 16:235 [14:16:08] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name === [14:16:08] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid [14:16:08] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ==== [14:16:08] == drm_hdmi_connector_get_output_format_name (2 subtests) == [14:16:08] === drm_test_drm_hdmi_connector_get_output_format_name ==== [14:16:08] [PASSED] RGB [14:16:08] [PASSED] YUV 4:2:0 [14:16:08] [PASSED] YUV 4:2:2 [14:16:08] [PASSED] YUV 4:4:4 [14:16:08] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name === [14:16:08] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid [14:16:08] ==== [PASSED] drm_hdmi_connector_get_output_format_name ==== [14:16:08] ============= drm_damage_helper (21 subtests) ============== [14:16:08] [PASSED] drm_test_damage_iter_no_damage [14:16:08] [PASSED] drm_test_damage_iter_no_damage_fractional_src [14:16:08] [PASSED] drm_test_damage_iter_no_damage_src_moved [14:16:08] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved [14:16:08] [PASSED] drm_test_damage_iter_no_damage_not_visible [14:16:08] [PASSED] drm_test_damage_iter_no_damage_no_crtc [14:16:08] [PASSED] drm_test_damage_iter_no_damage_no_fb [14:16:08] [PASSED] drm_test_damage_iter_simple_damage [14:16:08] [PASSED] drm_test_damage_iter_single_damage [14:16:08] [PASSED] drm_test_damage_iter_single_damage_intersect_src [14:16:08] [PASSED] drm_test_damage_iter_single_damage_outside_src [14:16:08] [PASSED] drm_test_damage_iter_single_damage_fractional_src [14:16:08] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src [14:16:08] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src [14:16:08] [PASSED] drm_test_damage_iter_single_damage_src_moved [14:16:08] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved [14:16:08] [PASSED] drm_test_damage_iter_damage [14:16:08] [PASSED] drm_test_damage_iter_damage_one_intersect [14:16:08] [PASSED] drm_test_damage_iter_damage_one_outside [14:16:08] [PASSED] drm_test_damage_iter_damage_src_moved [14:16:08] [PASSED] drm_test_damage_iter_damage_not_visible [14:16:08] ================ [PASSED] drm_damage_helper ================ [14:16:08] ============== drm_dp_mst_helper (3 subtests) ============== [14:16:08] ============== drm_test_dp_mst_calc_pbn_mode ============== [14:16:08] [PASSED] Clock 154000 BPP 30 DSC disabled [14:16:08] [PASSED] Clock 234000 BPP 30 DSC disabled [14:16:08] [PASSED] Clock 297000 BPP 24 DSC disabled [14:16:08] [PASSED] Clock 332880 BPP 24 DSC enabled [14:16:08] [PASSED] Clock 324540 BPP 24 DSC enabled [14:16:08] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ========== [14:16:08] ============== drm_test_dp_mst_calc_pbn_div =============== [14:16:08] [PASSED] Link rate 2000000 lane count 4 [14:16:08] [PASSED] Link rate 2000000 lane count 2 [14:16:08] [PASSED] Link rate 2000000 lane count 1 [14:16:08] [PASSED] Link rate 1350000 lane count 4 [14:16:08] [PASSED] Link rate 1350000 lane count 2 [14:16:08] [PASSED] Link rate 1350000 lane count 1 [14:16:08] [PASSED] Link rate 1000000 lane count 4 [14:16:08] [PASSED] Link rate 1000000 lane count 2 [14:16:08] [PASSED] Link rate 1000000 lane count 1 [14:16:08] [PASSED] Link rate 810000 lane count 4 [14:16:08] [PASSED] Link rate 810000 lane count 2 [14:16:08] [PASSED] Link rate 810000 lane count 1 [14:16:08] [PASSED] Link rate 540000 lane count 4 [14:16:08] [PASSED] Link rate 540000 lane count 2 [14:16:08] [PASSED] Link rate 540000 lane count 1 [14:16:08] [PASSED] Link rate 270000 lane count 4 [14:16:08] [PASSED] Link rate 270000 lane count 2 [14:16:08] [PASSED] Link rate 270000 lane count 1 [14:16:08] [PASSED] Link rate 162000 lane count 4 [14:16:08] [PASSED] Link rate 162000 lane count 2 [14:16:08] [PASSED] Link rate 162000 lane count 1 [14:16:08] ========== [PASSED] drm_test_dp_mst_calc_pbn_div =========== [14:16:08] ========= drm_test_dp_mst_sideband_msg_req_decode ========= [14:16:08] [PASSED] DP_ENUM_PATH_RESOURCES with port number [14:16:08] [PASSED] DP_POWER_UP_PHY with port number [14:16:08] [PASSED] DP_POWER_DOWN_PHY with port number [14:16:08] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks [14:16:08] [PASSED] DP_ALLOCATE_PAYLOAD with port number [14:16:08] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI [14:16:08] [PASSED] DP_ALLOCATE_PAYLOAD with PBN [14:16:08] [PASSED] DP_QUERY_PAYLOAD with port number [14:16:08] [PASSED] DP_QUERY_PAYLOAD with VCPI [14:16:08] [PASSED] DP_REMOTE_DPCD_READ with port number [14:16:08] [PASSED] DP_REMOTE_DPCD_READ with DPCD address [14:16:08] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes [14:16:08] [PASSED] DP_REMOTE_DPCD_WRITE with port number [14:16:08] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address [14:16:08] [PASSED] DP_REMOTE_DPCD_WRITE with data array [14:16:08] [PASSED] DP_REMOTE_I2C_READ with port number [14:16:08] [PASSED] DP_REMOTE_I2C_READ with I2C device ID [14:16:08] [PASSED] DP_REMOTE_I2C_READ with transactions array [14:16:08] [PASSED] DP_REMOTE_I2C_WRITE with port number [14:16:08] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID [14:16:08] [PASSED] DP_REMOTE_I2C_WRITE with data array [14:16:08] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID [14:16:08] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID [14:16:08] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event [14:16:08] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event [14:16:08] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior [14:16:08] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior [14:16:08] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode ===== [14:16:08] ================ [PASSED] drm_dp_mst_helper ================ [14:16:08] ================== drm_exec (7 subtests) =================== [14:16:08] [PASSED] sanitycheck [14:16:08] [PASSED] test_lock [14:16:08] [PASSED] test_lock_unlock [14:16:08] [PASSED] test_duplicates [14:16:08] [PASSED] test_prepare [14:16:08] [PASSED] test_prepare_array [14:16:08] [PASSED] test_multiple_loops [14:16:08] ==================== [PASSED] drm_exec ===================== [14:16:08] =========== drm_format_helper_test (17 subtests) =========== [14:16:08] ============== drm_test_fb_xrgb8888_to_gray8 ============== [14:16:08] [PASSED] single_pixel_source_buffer [14:16:08] [PASSED] single_pixel_clip_rectangle [14:16:08] [PASSED] well_known_colors [14:16:08] [PASSED] destination_pitch [14:16:08] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ========== [14:16:08] ============= drm_test_fb_xrgb8888_to_rgb332 ============== [14:16:08] [PASSED] single_pixel_source_buffer [14:16:08] [PASSED] single_pixel_clip_rectangle [14:16:08] [PASSED] well_known_colors [14:16:08] [PASSED] destination_pitch [14:16:08] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ========== [14:16:08] ============= drm_test_fb_xrgb8888_to_rgb565 ============== [14:16:08] [PASSED] single_pixel_source_buffer [14:16:08] [PASSED] single_pixel_clip_rectangle [14:16:08] [PASSED] well_known_colors [14:16:08] [PASSED] destination_pitch [14:16:08] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ========== [14:16:08] ============ drm_test_fb_xrgb8888_to_xrgb1555 ============= [14:16:08] [PASSED] single_pixel_source_buffer [14:16:08] [PASSED] single_pixel_clip_rectangle [14:16:08] [PASSED] well_known_colors [14:16:08] [PASSED] destination_pitch [14:16:08] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 ========= [14:16:08] ============ drm_test_fb_xrgb8888_to_argb1555 ============= [14:16:08] [PASSED] single_pixel_source_buffer [14:16:08] [PASSED] single_pixel_clip_rectangle [14:16:08] [PASSED] well_known_colors [14:16:08] [PASSED] destination_pitch [14:16:08] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 ========= [14:16:08] ============ drm_test_fb_xrgb8888_to_rgba5551 ============= [14:16:08] [PASSED] single_pixel_source_buffer [14:16:08] [PASSED] single_pixel_clip_rectangle [14:16:08] [PASSED] well_known_colors [14:16:08] [PASSED] destination_pitch [14:16:08] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 ========= [14:16:08] ============= drm_test_fb_xrgb8888_to_rgb888 ============== [14:16:08] [PASSED] single_pixel_source_buffer [14:16:08] [PASSED] single_pixel_clip_rectangle [14:16:08] [PASSED] well_known_colors [14:16:08] [PASSED] destination_pitch [14:16:08] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ========== [14:16:08] ============= drm_test_fb_xrgb8888_to_bgr888 ============== [14:16:08] [PASSED] single_pixel_source_buffer [14:16:08] [PASSED] single_pixel_clip_rectangle [14:16:08] [PASSED] well_known_colors [14:16:08] [PASSED] destination_pitch [14:16:08] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ========== [14:16:08] ============ drm_test_fb_xrgb8888_to_argb8888 ============= [14:16:08] [PASSED] single_pixel_source_buffer [14:16:08] [PASSED] single_pixel_clip_rectangle [14:16:08] [PASSED] well_known_colors [14:16:08] [PASSED] destination_pitch [14:16:08] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 ========= [14:16:08] =========== drm_test_fb_xrgb8888_to_xrgb2101010 =========== [14:16:08] [PASSED] single_pixel_source_buffer [14:16:08] [PASSED] single_pixel_clip_rectangle [14:16:08] [PASSED] well_known_colors [14:16:08] [PASSED] destination_pitch [14:16:08] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 ======= [14:16:08] =========== drm_test_fb_xrgb8888_to_argb2101010 =========== [14:16:08] [PASSED] single_pixel_source_buffer [14:16:08] [PASSED] single_pixel_clip_rectangle [14:16:08] [PASSED] well_known_colors [14:16:08] [PASSED] destination_pitch [14:16:08] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 ======= [14:16:08] ============== drm_test_fb_xrgb8888_to_mono =============== [14:16:08] [PASSED] single_pixel_source_buffer [14:16:08] [PASSED] single_pixel_clip_rectangle [14:16:08] [PASSED] well_known_colors [14:16:08] [PASSED] destination_pitch [14:16:08] ========== [PASSED] drm_test_fb_xrgb8888_to_mono =========== [14:16:08] ==================== drm_test_fb_swab ===================== [14:16:08] [PASSED] single_pixel_source_buffer [14:16:08] [PASSED] single_pixel_clip_rectangle [14:16:08] [PASSED] well_known_colors [14:16:08] [PASSED] destination_pitch [14:16:08] ================ [PASSED] drm_test_fb_swab ================= [14:16:08] ============ drm_test_fb_xrgb8888_to_xbgr8888 ============= [14:16:08] [PASSED] single_pixel_source_buffer [14:16:08] [PASSED] single_pixel_clip_rectangle [14:16:08] [PASSED] well_known_colors [14:16:08] [PASSED] destination_pitch [14:16:08] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 ========= [14:16:08] ============ drm_test_fb_xrgb8888_to_abgr8888 ============= [14:16:08] [PASSED] single_pixel_source_buffer [14:16:08] [PASSED] single_pixel_clip_rectangle [14:16:08] [PASSED] well_known_colors [14:16:08] [PASSED] destination_pitch [14:16:08] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 ========= [14:16:08] ================= drm_test_fb_clip_offset ================= [14:16:08] [PASSED] pass through [14:16:08] [PASSED] horizontal offset [14:16:08] [PASSED] vertical offset [14:16:08] [PASSED] horizontal and vertical offset [14:16:08] [PASSED] horizontal offset (custom pitch) [14:16:08] [PASSED] vertical offset (custom pitch) [14:16:08] [PASSED] horizontal and vertical offset (custom pitch) [14:16:08] ============= [PASSED] drm_test_fb_clip_offset ============= [14:16:08] =================== drm_test_fb_memcpy ==================== [14:16:08] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258) [14:16:08] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258) [14:16:08] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559) [14:16:08] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258) [14:16:08] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258) [14:16:08] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559) [14:16:08] [PASSED] well_known_colors: XB24 little-endian (0x34324258) [14:16:08] [PASSED] well_known_colors: XRA8 little-endian (0x38415258) [14:16:08] [PASSED] well_known_colors: YU24 little-endian (0x34325559) [14:16:08] [PASSED] destination_pitch: XB24 little-endian (0x34324258) [14:16:08] [PASSED] destination_pitch: XRA8 little-endian (0x38415258) [14:16:08] [PASSED] destination_pitch: YU24 little-endian (0x34325559) [14:16:08] =============== [PASSED] drm_test_fb_memcpy ================ [14:16:08] ============= [PASSED] drm_format_helper_test ============== [14:16:08] ================= drm_format (18 subtests) ================= [14:16:08] [PASSED] drm_test_format_block_width_invalid [14:16:08] [PASSED] drm_test_format_block_width_one_plane [14:16:08] [PASSED] drm_test_format_block_width_two_plane [14:16:08] [PASSED] drm_test_format_block_width_three_plane [14:16:08] [PASSED] drm_test_format_block_width_tiled [14:16:08] [PASSED] drm_test_format_block_height_invalid [14:16:08] [PASSED] drm_test_format_block_height_one_plane [14:16:08] [PASSED] drm_test_format_block_height_two_plane [14:16:08] [PASSED] drm_test_format_block_height_three_plane [14:16:08] [PASSED] drm_test_format_block_height_tiled [14:16:08] [PASSED] drm_test_format_min_pitch_invalid [14:16:08] [PASSED] drm_test_format_min_pitch_one_plane_8bpp [14:16:08] [PASSED] drm_test_format_min_pitch_one_plane_16bpp [14:16:08] [PASSED] drm_test_format_min_pitch_one_plane_24bpp [14:16:08] [PASSED] drm_test_format_min_pitch_one_plane_32bpp [14:16:08] [PASSED] drm_test_format_min_pitch_two_plane [14:16:08] [PASSED] drm_test_format_min_pitch_three_plane_8bpp [14:16:08] [PASSED] drm_test_format_min_pitch_tiled [14:16:08] =================== [PASSED] drm_format ==================== [14:16:08] ============== drm_framebuffer (10 subtests) =============== [14:16:08] ========== drm_test_framebuffer_check_src_coords ========== [14:16:08] [PASSED] Success: source fits into fb [14:16:08] [PASSED] Fail: overflowing fb with x-axis coordinate [14:16:08] [PASSED] Fail: overflowing fb with y-axis coordinate [14:16:08] [PASSED] Fail: overflowing fb with source width [14:16:08] [PASSED] Fail: overflowing fb with source height [14:16:08] ====== [PASSED] drm_test_framebuffer_check_src_coords ====== [14:16:08] [PASSED] drm_test_framebuffer_cleanup [14:16:08] =============== drm_test_framebuffer_create =============== [14:16:08] [PASSED] ABGR8888 normal sizes [14:16:08] [PASSED] ABGR8888 max sizes [14:16:08] [PASSED] ABGR8888 pitch greater than min required [14:16:08] [PASSED] ABGR8888 pitch less than min required [14:16:08] [PASSED] ABGR8888 Invalid width [14:16:08] [PASSED] ABGR8888 Invalid buffer handle [14:16:08] [PASSED] No pixel format [14:16:08] [PASSED] ABGR8888 Width 0 [14:16:08] [PASSED] ABGR8888 Height 0 [14:16:08] [PASSED] ABGR8888 Out of bound height * pitch combination [14:16:08] [PASSED] ABGR8888 Large buffer offset [14:16:08] [PASSED] ABGR8888 Buffer offset for inexistent plane [14:16:08] [PASSED] ABGR8888 Invalid flag [14:16:08] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers [14:16:08] [PASSED] ABGR8888 Valid buffer modifier [14:16:08] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE) [14:16:08] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS [14:16:08] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS [14:16:08] [PASSED] NV12 Normal sizes [14:16:08] [PASSED] NV12 Max sizes [14:16:08] [PASSED] NV12 Invalid pitch [14:16:08] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag [14:16:08] [PASSED] NV12 different modifier per-plane [14:16:08] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE [14:16:08] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS [14:16:08] [PASSED] NV12 Modifier for inexistent plane [14:16:08] [PASSED] NV12 Handle for inexistent plane [14:16:08] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS [14:16:08] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier [14:16:08] [PASSED] YVU420 Normal sizes [14:16:08] [PASSED] YVU420 Max sizes [14:16:08] [PASSED] YVU420 Invalid pitch [14:16:08] [PASSED] YVU420 Different pitches [14:16:08] [PASSED] YVU420 Different buffer offsets/pitches [14:16:08] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS [14:16:08] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS [14:16:08] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS [14:16:08] [PASSED] YVU420 Valid modifier [14:16:08] [PASSED] YVU420 Different modifiers per plane [14:16:08] [PASSED] YVU420 Modifier for inexistent plane [14:16:08] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR) [14:16:08] [PASSED] X0L2 Normal sizes [14:16:08] [PASSED] X0L2 Max sizes [14:16:08] [PASSED] X0L2 Invalid pitch [14:16:08] [PASSED] X0L2 Pitch greater than minimum required [14:16:08] [PASSED] X0L2 Handle for inexistent plane [14:16:08] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set [14:16:08] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set [14:16:08] [PASSED] X0L2 Valid modifier [14:16:08] [PASSED] X0L2 Modifier for inexistent plane [14:16:08] =========== [PASSED] drm_test_framebuffer_create =========== [14:16:08] [PASSED] drm_test_framebuffer_free [14:16:08] [PASSED] drm_test_framebuffer_init [14:16:08] [PASSED] drm_test_framebuffer_init_bad_format [14:16:08] [PASSED] drm_test_framebuffer_init_dev_mismatch [14:16:08] [PASSED] drm_test_framebuffer_lookup [14:16:08] [PASSED] drm_test_framebuffer_lookup_inexistent [14:16:08] [PASSED] drm_test_framebuffer_modifiers_not_supported [14:16:08] ================= [PASSED] drm_framebuffer ================= [14:16:08] ================ drm_gem_shmem (8 subtests) ================ [14:16:08] [PASSED] drm_gem_shmem_test_obj_create [14:16:08] [PASSED] drm_gem_shmem_test_obj_create_private [14:16:08] [PASSED] drm_gem_shmem_test_pin_pages [14:16:08] [PASSED] drm_gem_shmem_test_vmap [14:16:08] [PASSED] drm_gem_shmem_test_get_sg_table [14:16:08] [PASSED] drm_gem_shmem_test_get_pages_sgt [14:16:08] [PASSED] drm_gem_shmem_test_madvise [14:16:08] [PASSED] drm_gem_shmem_test_purge [14:16:08] ================== [PASSED] drm_gem_shmem ================== [14:16:08] === drm_atomic_helper_connector_hdmi_check (29 subtests) === [14:16:08] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode [14:16:08] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1 [14:16:08] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode [14:16:08] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1 [14:16:08] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode [14:16:08] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1 [14:16:08] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 ======= [14:16:08] [PASSED] Automatic [14:16:08] [PASSED] Full [14:16:08] [PASSED] Limited 16:235 [14:16:08] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 === [14:16:08] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed [14:16:08] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed [14:16:08] [PASSED] drm_test_check_disable_connector [14:16:08] [PASSED] drm_test_check_hdmi_funcs_reject_rate [14:16:08] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb [14:16:08] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420 [14:16:08] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422 [14:16:08] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420 [14:16:08] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420 [14:16:08] [PASSED] drm_test_check_output_bpc_crtc_mode_changed [14:16:08] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed [14:16:08] [PASSED] drm_test_check_output_bpc_dvi [14:16:08] [PASSED] drm_test_check_output_bpc_format_vic_1 [14:16:08] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only [14:16:08] [PASSED] drm_test_check_output_bpc_format_display_rgb_only [14:16:08] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only [14:16:08] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only [14:16:08] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc [14:16:08] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc [14:16:08] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc [14:16:08] ============ drm_test_check_hdmi_color_format ============= [14:16:08] [PASSED] AUTO -> RGB [14:16:08] [PASSED] YCBCR422 -> YUV422 [14:16:08] [PASSED] YCBCR420 -> YUV420 [14:16:08] [PASSED] YCBCR444 -> YUV444 [14:16:08] [PASSED] RGB -> RGB [14:16:08] ======== [PASSED] drm_test_check_hdmi_color_format ========= [14:16:08] ======== drm_test_check_hdmi_color_format_420_only ======== [14:16:08] [PASSED] RGB should fail [14:16:08] [PASSED] YUV444 should fail [14:16:08] [PASSED] YUV422 should fail [14:16:08] [PASSED] YUV420 should work [14:16:08] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ==== [14:16:08] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ====== [14:16:08] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ==== [14:16:08] [PASSED] drm_test_check_broadcast_rgb_value [14:16:08] [PASSED] drm_test_check_bpc_8_value [14:16:08] [PASSED] drm_test_check_bpc_10_value [14:16:08] [PASSED] drm_test_check_bpc_12_value [14:16:08] [PASSED] drm_test_check_format_value [14:16:08] [PASSED] drm_test_check_tmds_char_value [14:16:08] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ====== [14:16:08] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) = [14:16:08] [PASSED] drm_test_check_mode_valid [14:16:08] [PASSED] drm_test_check_mode_valid_reject [14:16:08] [PASSED] drm_test_check_mode_valid_reject_rate [14:16:08] [PASSED] drm_test_check_mode_valid_reject_max_clock [14:16:08] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock [14:16:08] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector [14:16:08] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb [14:16:08] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid === [14:16:08] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) = [14:16:08] [PASSED] drm_test_check_infoframes [14:16:08] [PASSED] drm_test_check_reject_avi_infoframe [14:16:08] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8 [14:16:08] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10 [14:16:08] [PASSED] drm_test_check_reject_audio_infoframe [14:16:08] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes === [14:16:08] ================= drm_managed (2 subtests) ================= [14:16:08] [PASSED] drm_test_managed_release_action [14:16:08] [PASSED] drm_test_managed_run_action [14:16:08] =================== [PASSED] drm_managed =================== [14:16:08] =================== drm_mm (6 subtests) ==================== [14:16:08] [PASSED] drm_test_mm_init [14:16:08] [PASSED] drm_test_mm_debug [14:16:08] [PASSED] drm_test_mm_align32 [14:16:08] [PASSED] drm_test_mm_align64 [14:16:08] [PASSED] drm_test_mm_lowest [14:16:08] [PASSED] drm_test_mm_highest [14:16:08] ===================== [PASSED] drm_mm ====================== [14:16:08] ============= drm_modes_analog_tv (5 subtests) ============= [14:16:08] [PASSED] drm_test_modes_analog_tv_mono_576i [14:16:08] [PASSED] drm_test_modes_analog_tv_ntsc_480i [14:16:08] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined [14:16:08] [PASSED] drm_test_modes_analog_tv_pal_576i [14:16:08] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined [14:16:08] =============== [PASSED] drm_modes_analog_tv =============== [14:16:08] ============== drm_panic_helper (3 subtests) =============== [14:16:08] ============= drm_test_panic_screen_user_map ============== [14:16:08] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258) [14:16:08] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258) [14:16:08] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258) [14:16:08] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752) [14:16:08] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752) [14:16:08] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258) [14:16:08] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258) [14:16:08] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258) [14:16:08] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752) [14:16:08] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752) [14:16:08] ========= [PASSED] drm_test_panic_screen_user_map ========== [14:16:08] ============= drm_test_panic_screen_user_page ============= [14:16:08] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258) [14:16:08] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258) [14:16:08] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258) [14:16:08] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752) [14:16:08] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752) [14:16:08] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258) [14:16:08] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258) [14:16:08] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258) [14:16:08] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752) [14:16:08] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752) [14:16:08] ========= [PASSED] drm_test_panic_screen_user_page ========= [14:16:08] ========== drm_test_panic_screen_user_set_pixel =========== [14:16:08] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258) [14:16:08] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258) [14:16:08] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258) [14:16:08] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752) [14:16:08] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752) [14:16:08] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258) [14:16:08] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258) [14:16:08] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258) [14:16:08] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752) [14:16:08] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752) [14:16:08] ====== [PASSED] drm_test_panic_screen_user_set_pixel ======= [14:16:08] ================ [PASSED] drm_panic_helper ================= [14:16:08] ============== drm_plane_helper (2 subtests) =============== [14:16:08] =============== drm_test_check_plane_state ================ [14:16:08] [PASSED] clipping_simple [14:16:08] [PASSED] clipping_rotate_reflect [14:16:08] [PASSED] positioning_simple [14:16:08] [PASSED] upscaling [14:16:08] [PASSED] downscaling [14:16:08] [PASSED] rounding1 [14:16:08] [PASSED] rounding2 [14:16:08] [PASSED] rounding3 [14:16:08] [PASSED] rounding4 [14:16:08] =========== [PASSED] drm_test_check_plane_state ============ [14:16:08] =========== drm_test_check_invalid_plane_state ============ [14:16:08] [PASSED] positioning_invalid [14:16:08] [PASSED] upscaling_invalid [14:16:08] [PASSED] downscaling_invalid [14:16:08] ======= [PASSED] drm_test_check_invalid_plane_state ======== [14:16:08] ================ [PASSED] drm_plane_helper ================= [14:16:08] ====== drm_connector_helper_tv_get_modes (1 subtest) ======= [14:16:08] ====== drm_test_connector_helper_tv_get_modes_check ======= [14:16:08] [PASSED] None [14:16:08] [PASSED] PAL [14:16:08] [PASSED] NTSC [14:16:08] [PASSED] Both, NTSC Default [14:16:08] [PASSED] Both, PAL Default [14:16:08] [PASSED] Both, NTSC Default, with PAL on command-line [14:16:08] [PASSED] Both, PAL Default, with NTSC on command-line [14:16:08] == [PASSED] drm_test_connector_helper_tv_get_modes_check === [14:16:08] ======== [PASSED] drm_connector_helper_tv_get_modes ======== [14:16:08] ================== drm_rect (9 subtests) =================== [14:16:08] [PASSED] drm_test_rect_clip_scaled_div_by_zero [14:16:08] [PASSED] drm_test_rect_clip_scaled_not_clipped [14:16:08] [PASSED] drm_test_rect_clip_scaled_clipped [14:16:08] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned [14:16:08] ================= drm_test_rect_intersect ================= [14:16:08] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0 [14:16:08] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1 [14:16:08] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0 [14:16:08] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1 [14:16:08] [PASSED] right x left: 2x1+0+0 x 3x1+1+0 [14:16:08] [PASSED] left x right: 3x1+1+0 x 2x1+0+0 [14:16:08] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1 [14:16:08] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0 [14:16:08] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1 [14:16:08] [PASSED] touching side: 1x1+0+0 x 1x1+1+0 [14:16:08] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0 [14:16:08] [PASSED] inside another: 2x2+0+0 x 1x1+1+1 [14:16:08] [PASSED] far away: 1x1+0+0 x 1x1+3+6 [14:16:08] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10 [14:16:08] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10 [14:16:08] ============= [PASSED] drm_test_rect_intersect ============= [14:16:08] ================ drm_test_rect_calc_hscale ================ [14:16:08] [PASSED] normal use [14:16:08] [PASSED] out of max range [14:16:08] [PASSED] out of min range [14:16:08] [PASSED] zero dst [14:16:08] [PASSED] negative src [14:16:08] [PASSED] negative dst [14:16:08] ============ [PASSED] drm_test_rect_calc_hscale ============ [14:16:08] ================ drm_test_rect_calc_vscale ================ [14:16:08] [PASSED] normal use [14:16:08] [PASSED] out of max range [14:16:08] [PASSED] out of min range [14:16:08] [PASSED] zero dst [14:16:08] [PASSED] negative src [14:16:08] [PASSED] negative dst [14:16:08] ============ [PASSED] drm_test_rect_calc_vscale ============ [14:16:08] ================== drm_test_rect_rotate =================== [14:16:08] [PASSED] reflect-x [14:16:08] [PASSED] reflect-y [14:16:08] [PASSED] rotate-0 [14:16:08] [PASSED] rotate-90 [14:16:08] [PASSED] rotate-180 [14:16:08] [PASSED] rotate-270 [14:16:08] ============== [PASSED] drm_test_rect_rotate =============== [14:16:08] ================ drm_test_rect_rotate_inv ================= [14:16:08] [PASSED] reflect-x [14:16:08] [PASSED] reflect-y [14:16:08] [PASSED] rotate-0 [14:16:08] [PASSED] rotate-90 [14:16:08] [PASSED] rotate-180 [14:16:08] [PASSED] rotate-270 [14:16:08] ============ [PASSED] drm_test_rect_rotate_inv ============= [14:16:08] ==================== [PASSED] drm_rect ===================== [14:16:08] ============ drm_sysfb_modeset_test (1 subtest) ============ [14:16:08] ============ drm_test_sysfb_build_fourcc_list ============= [14:16:08] [PASSED] no native formats [14:16:08] [PASSED] XRGB8888 as native format [14:16:08] [PASSED] remove duplicates [14:16:08] [PASSED] convert alpha formats [14:16:08] [PASSED] random formats [14:16:08] ======== [PASSED] drm_test_sysfb_build_fourcc_list ========= [14:16:08] ============= [PASSED] drm_sysfb_modeset_test ============== [14:16:08] ================== drm_fixp (2 subtests) =================== [14:16:08] [PASSED] drm_test_int2fixp [14:16:08] [PASSED] drm_test_sm2fixp [14:16:08] ==================== [PASSED] drm_fixp ===================== [14:16:08] ============================================================ [14:16:08] Testing complete. Ran 667 tests: passed: 667 [14:16:08] Elapsed time: 27.813s total, 2.465s configuring, 24.927s building, 0.412s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig [14:16:08] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig [14:16:11] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [14:16:21] Starting KUnit Kernel (1/1)... [14:16:21] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [14:16:21] ================= ttm_device (5 subtests) ================== [14:16:21] [PASSED] ttm_device_init_basic [14:16:21] [PASSED] ttm_device_init_multiple [14:16:21] [PASSED] ttm_device_fini_basic [14:16:21] [PASSED] ttm_device_init_no_vma_man [14:16:21] ================== ttm_device_init_pools ================== [14:16:21] [PASSED] No DMA allocations, no DMA32 required [14:16:21] [PASSED] DMA allocations, DMA32 required [14:16:21] [PASSED] No DMA allocations, DMA32 required [14:16:21] [PASSED] DMA allocations, no DMA32 required [14:16:21] ============== [PASSED] ttm_device_init_pools ============== [14:16:21] =================== [PASSED] ttm_device ==================== [14:16:21] ================== ttm_pool (8 subtests) =================== [14:16:21] ================== ttm_pool_alloc_basic =================== [14:16:21] [PASSED] One page [14:16:21] [PASSED] More than one page [14:16:21] [PASSED] Above the allocation limit [14:16:21] [PASSED] One page, with coherent DMA mappings enabled [14:16:21] [PASSED] Above the allocation limit, with coherent DMA mappings enabled [14:16:21] ============== [PASSED] ttm_pool_alloc_basic =============== [14:16:21] ============== ttm_pool_alloc_basic_dma_addr ============== [14:16:21] [PASSED] One page [14:16:21] [PASSED] More than one page [14:16:21] [PASSED] Above the allocation limit [14:16:21] [PASSED] One page, with coherent DMA mappings enabled [14:16:21] [PASSED] Above the allocation limit, with coherent DMA mappings enabled [14:16:21] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ========== [14:16:21] [PASSED] ttm_pool_alloc_order_caching_match [14:16:21] [PASSED] ttm_pool_alloc_caching_mismatch [14:16:21] [PASSED] ttm_pool_alloc_order_mismatch [14:16:21] [PASSED] ttm_pool_free_dma_alloc [14:16:21] [PASSED] ttm_pool_free_no_dma_alloc [14:16:21] [PASSED] ttm_pool_fini_basic [14:16:21] ==================== [PASSED] ttm_pool ===================== [14:16:21] ================ ttm_resource (8 subtests) ================= [14:16:21] ================= ttm_resource_init_basic ================= [14:16:21] [PASSED] Init resource in TTM_PL_SYSTEM [14:16:21] [PASSED] Init resource in TTM_PL_VRAM [14:16:21] [PASSED] Init resource in a private placement [14:16:21] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags [14:16:21] ============= [PASSED] ttm_resource_init_basic ============= [14:16:21] [PASSED] ttm_resource_init_pinned [14:16:21] [PASSED] ttm_resource_fini_basic [14:16:21] [PASSED] ttm_resource_manager_init_basic [14:16:21] [PASSED] ttm_resource_manager_usage_basic [14:16:21] [PASSED] ttm_resource_manager_set_used_basic [14:16:21] [PASSED] ttm_sys_man_alloc_basic [14:16:21] [PASSED] ttm_sys_man_free_basic [14:16:21] ================== [PASSED] ttm_resource =================== [14:16:21] =================== ttm_tt (15 subtests) =================== [14:16:21] ==================== ttm_tt_init_basic ==================== [14:16:21] [PASSED] Page-aligned size [14:16:21] [PASSED] Extra pages requested [14:16:21] ================ [PASSED] ttm_tt_init_basic ================ [14:16:21] [PASSED] ttm_tt_init_misaligned [14:16:21] [PASSED] ttm_tt_fini_basic [14:16:21] [PASSED] ttm_tt_fini_sg [14:16:21] [PASSED] ttm_tt_fini_shmem [14:16:21] [PASSED] ttm_tt_create_basic [14:16:21] [PASSED] ttm_tt_create_invalid_bo_type [14:16:21] [PASSED] ttm_tt_create_ttm_exists [14:16:21] [PASSED] ttm_tt_create_failed [14:16:21] [PASSED] ttm_tt_destroy_basic [14:16:21] [PASSED] ttm_tt_populate_null_ttm [14:16:21] [PASSED] ttm_tt_populate_populated_ttm [14:16:21] [PASSED] ttm_tt_unpopulate_basic [14:16:21] [PASSED] ttm_tt_unpopulate_empty_ttm [14:16:21] [PASSED] ttm_tt_swapin_basic [14:16:21] ===================== [PASSED] ttm_tt ====================== [14:16:21] =================== ttm_bo (14 subtests) =================== [14:16:21] =========== ttm_bo_reserve_optimistic_no_ticket =========== [14:16:21] [PASSED] Cannot be interrupted and sleeps [14:16:21] [PASSED] Cannot be interrupted, locks straight away [14:16:21] [PASSED] Can be interrupted, sleeps [14:16:21] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket ======= [14:16:21] [PASSED] ttm_bo_reserve_locked_no_sleep [14:16:21] [PASSED] ttm_bo_reserve_no_wait_ticket [14:16:21] [PASSED] ttm_bo_reserve_double_resv [14:16:21] [PASSED] ttm_bo_reserve_interrupted [14:16:21] [PASSED] ttm_bo_reserve_deadlock [14:16:21] [PASSED] ttm_bo_unreserve_basic [14:16:21] [PASSED] ttm_bo_unreserve_pinned [14:16:21] [PASSED] ttm_bo_unreserve_bulk [14:16:21] [PASSED] ttm_bo_fini_basic [14:16:21] [PASSED] ttm_bo_fini_shared_resv [14:16:21] [PASSED] ttm_bo_pin_basic [14:16:21] [PASSED] ttm_bo_pin_unpin_resource [14:16:21] [PASSED] ttm_bo_multiple_pin_one_unpin [14:16:21] ===================== [PASSED] ttm_bo ====================== [14:16:21] ============== ttm_bo_validate (22 subtests) =============== [14:16:21] ============== ttm_bo_init_reserved_sys_man =============== [14:16:21] [PASSED] Buffer object for userspace [14:16:21] [PASSED] Kernel buffer object [14:16:21] [PASSED] Shared buffer object [14:16:21] ========== [PASSED] ttm_bo_init_reserved_sys_man =========== [14:16:21] ============== ttm_bo_init_reserved_mock_man ============== [14:16:21] [PASSED] Buffer object for userspace [14:16:21] [PASSED] Kernel buffer object [14:16:21] [PASSED] Shared buffer object [14:16:21] ========== [PASSED] ttm_bo_init_reserved_mock_man ========== [14:16:21] [PASSED] ttm_bo_init_reserved_resv [14:16:21] ================== ttm_bo_validate_basic ================== [14:16:21] [PASSED] Buffer object for userspace [14:16:21] [PASSED] Kernel buffer object [14:16:21] [PASSED] Shared buffer object [14:16:21] ============== [PASSED] ttm_bo_validate_basic ============== [14:16:21] [PASSED] ttm_bo_validate_invalid_placement [14:16:21] ============= ttm_bo_validate_same_placement ============== [14:16:21] [PASSED] System manager [14:16:21] [PASSED] VRAM manager [14:16:21] ========= [PASSED] ttm_bo_validate_same_placement ========== [14:16:21] [PASSED] ttm_bo_validate_failed_alloc [14:16:21] [PASSED] ttm_bo_validate_pinned [14:16:21] [PASSED] ttm_bo_validate_busy_placement [14:16:21] ================ ttm_bo_validate_multihop ================= [14:16:21] [PASSED] Buffer object for userspace [14:16:21] [PASSED] Kernel buffer object [14:16:21] [PASSED] Shared buffer object [14:16:21] ============ [PASSED] ttm_bo_validate_multihop ============= [14:16:21] ========== ttm_bo_validate_no_placement_signaled ========== [14:16:21] [PASSED] Buffer object in system domain, no page vector [14:16:21] [PASSED] Buffer object in system domain with an existing page vector [14:16:21] ====== [PASSED] ttm_bo_validate_no_placement_signaled ====== [14:16:21] ======== ttm_bo_validate_no_placement_not_signaled ======== [14:16:21] [PASSED] Buffer object for userspace [14:16:21] [PASSED] Kernel buffer object [14:16:21] [PASSED] Shared buffer object [14:16:21] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ==== [14:16:21] [PASSED] ttm_bo_validate_move_fence_signaled [14:16:21] ========= ttm_bo_validate_move_fence_not_signaled ========= [14:16:21] [PASSED] Waits for GPU [14:16:21] [PASSED] Tries to lock straight away [14:16:21] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled ===== [14:16:21] [PASSED] ttm_bo_validate_swapout [14:16:21] [PASSED] ttm_bo_validate_happy_evict [14:16:21] [PASSED] ttm_bo_validate_all_pinned_evict [14:16:21] [PASSED] ttm_bo_validate_allowed_only_evict [14:16:21] [PASSED] ttm_bo_validate_deleted_evict [14:16:21] [PASSED] ttm_bo_validate_busy_domain_evict [14:16:21] [PASSED] ttm_bo_validate_evict_gutting [14:16:21] [PASSED] ttm_bo_validate_recrusive_evict [14:16:21] ================= [PASSED] ttm_bo_validate ================= [14:16:21] ============================================================ [14:16:21] Testing complete. Ran 102 tests: passed: 102 [14:16:21] Elapsed time: 12.674s total, 2.468s configuring, 9.991s building, 0.184s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig [14:16:21] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig [14:16:24] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [14:16:32] Starting KUnit Kernel (1/1)... [14:16:32] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [14:16:32] =============== dma-buf-fence (12 subtests) ================ [14:16:32] [PASSED] test_sanitycheck [14:16:32] [PASSED] test_signaling [14:16:32] [PASSED] test_add_callback [14:16:32] [PASSED] test_late_add_callback [14:16:32] [PASSED] test_rm_callback [14:16:32] [PASSED] test_late_rm_callback [14:16:32] [PASSED] test_status [14:16:32] [PASSED] test_error [14:16:32] [PASSED] test_wait [14:16:32] [PASSED] test_wait_timeout [14:16:32] [PASSED] test_stub [14:16:32] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs) [14:16:32] ================== [PASSED] dma-buf-fence ================== [14:16:32] ============ dma-buf-fence-chain (11 subtests) ============= [14:16:32] [PASSED] test_sanitycheck [14:16:32] [PASSED] test_find_seqno [14:16:32] [PASSED] test_find_signaled [14:16:32] [PASSED] test_find_out_of_order [14:16:38] [PASSED] test_find_gap [14:16:38] [PASSED] test_find_race [14:16:38] [PASSED] test_signal_forward [14:16:38] [PASSED] test_signal_backward [14:16:38] [PASSED] test_wait_forward [14:16:38] [PASSED] test_wait_backward [14:16:38] [PASSED] test_wait_random [14:16:38] =============== [PASSED] dma-buf-fence-chain =============== [14:16:38] ============ dma-buf-fence-unwrap (11 subtests) ============ [14:16:38] [PASSED] test_sanitycheck [14:16:38] [PASSED] test_unwrap_array [14:16:38] [PASSED] test_unwrap_chain [14:16:38] [PASSED] test_unwrap_chain_array [14:16:38] [PASSED] test_unwrap_merge [14:16:38] [PASSED] test_unwrap_merge_duplicate [14:16:38] [PASSED] test_unwrap_merge_seqno [14:16:38] [PASSED] test_unwrap_merge_order [14:16:38] [PASSED] test_unwrap_merge_complex [14:16:38] [PASSED] test_unwrap_merge_complex_seqno [14:16:38] [PASSED] test_dedup_empty [14:16:38] ============== [PASSED] dma-buf-fence-unwrap =============== [14:16:38] ================ dma-buf-resv (5 subtests) ================= [14:16:38] [PASSED] test_sanitycheck [14:16:38] ===================== test_signaling ====================== [14:16:38] [PASSED] kernel [14:16:38] [PASSED] write [14:16:38] [PASSED] read [14:16:38] [PASSED] bookkeep [14:16:38] ================= [PASSED] test_signaling ================== [14:16:38] ====================== test_for_each ====================== [14:16:38] [PASSED] kernel [14:16:38] [PASSED] write [14:16:38] [PASSED] read [14:16:38] [PASSED] bookkeep [14:16:38] ================== [PASSED] test_for_each ================== [14:16:38] ================= test_for_each_unlocked ================== [14:16:38] [PASSED] kernel [14:16:38] [PASSED] write [14:16:38] [PASSED] read [14:16:38] [PASSED] bookkeep [14:16:38] ============= [PASSED] test_for_each_unlocked ============== [14:16:38] ===================== test_get_fences ===================== [14:16:38] [PASSED] kernel [14:16:38] [PASSED] write [14:16:38] [PASSED] read [14:16:38] [PASSED] bookkeep [14:16:38] ================= [PASSED] test_get_fences ================= [14:16:38] ================== [PASSED] dma-buf-resv =================== [14:16:38] ============================================================ [14:16:38] Testing complete. Ran 51 tests: passed: 50, skipped: 1 [14:16:38] Elapsed time: 16.542s total, 2.389s configuring, 8.831s building, 5.277s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
Patchwork
CI✓ Xe.CI.BAT: success for dma-buf: dma-fence: Remove dma_fence_init64()
In reply to Philipp Stanner== Series Details ==
== Series Details ==
Series: dma-buf: dma-fence: Remove dma_fence_init64()
URL : https://patchwork.freedesktop.org/series/177858/
State : success
== Summary ==
CI Bug Log - changes from xe-6070-0e8b43b5a5ef2dd52c454158e7fd8a927d796eb4_BAT -> xe-pw-177858v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (15 -> 15)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-6070-0e8b43b5a5ef2dd52c454158e7fd8a927d796eb4 -> xe-pw-177858v1
IGT_9177: 9177
xe-6070-0e8b43b5a5ef2dd52c454158e7fd8a927d796eb4: 0e8b43b5a5ef2dd52c454158e7fd8a927d796eb4
xe-pw-177858v1: 177858v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/index.html
Quoted 19 lines · Philipp Stanner
We recently had a discussion about reworking
dma_fenceinit to close a
race-window [1].The community agreement seems to have been that we can get rid of
dma_fence_init64(), so let's do that already. In the meantime we can continue our discussions regarding the race in [1].This also touches the Rust
dma_fence, which actually should use 64- bit
seqnos (was forgotten so far). Rust fence has no users currently, so needs no backporting, so I would like to address that in a distinct patch.Tested on Nouveau with and without the SEQNO64 flag. Nouveau also uses
the USER flag, so I hope we're fine.
Quoted 4 lines
P.
Makes good sense to me.
For the entire series:
(ps. I had to remove some recipients from this email because the original had more than 100 recipients and gmail wouldn't let me reply to all of them. Apologies for that.)
Quoted 64 lines
Philipp Stanner (3):
dma-buf: dma-fence: Add flags parameter todma_fence_init()
dma-buf: Port users ofdma_fence_init64()
dma-buf: dma-fence: Removedma_fence_init64()drivers/accel/amdxdna/amdxdna_ctx.c | 2 +- drivers/accel/ethosu/ethosu_job.c | 2 +- drivers/accel/ivpu/ivpu_job.c | 2 +-
drivers/accel/rocket/rocket_job.c | 2 +- drivers/dma-buf/dma-fence-array.c | 2 +- drivers/dma-buf/dma-fence-chain.c | 4 +-drivers/dma-buf/dma-fence.c | 58 +++++++++-------- --
drivers/dma-buf/st-dma-fence-chain.c | 2 +- drivers/dma-buf/st-dma-fence-unwrap.c | 2 +- drivers/dma-buf/st-dma-fence.c | 2 +- drivers/dma-buf/st-dma-resv.c | 2 +- drivers/dma-buf/sw_sync.c | 2 +- .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c | 2 +- .../drm/amd/amdgpu/amdgpu_eviction_fence.c | 7 ++- drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 2 +- .../gpu/drm/amd/amdgpu/amdgpu_userq_fence.c | 5 +- .../gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c | 5 +- drivers/gpu/drm/drm_crtc.c | 2 +- drivers/gpu/drm/drm_writeback.c | 2 +- drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 2 +- drivers/gpu/drm/i915/i915_request.c | 2 +- drivers/gpu/drm/i915/i915_sw_fence_work.c | 2 +- drivers/gpu/drm/i915/i915_vma_resource.c | 2 +- .../gpu/drm/i915/selftests/i915_sw_fence.c | 2 +- drivers/gpu/drm/imagination/pvr_ccb.c | 2 +- drivers/gpu/drm/imagination/pvr_queue.c | 2 +- drivers/gpu/drm/lima/lima_sched.c | 2 +- drivers/gpu/drm/msm/msm_fence.c | 2 +-drivers/gpu/drm/nouveau/nouveau_fence.c | 4 +- drivers/gpu/drm/panfrost/panfrost_job.c | 2 +- drivers/gpu/drm/panthor/panthor_sched.c | 2 +-drivers/gpu/drm/qxl/qxl_release.c | 2 +- drivers/gpu/drm/radeon/radeon_fence.c | 2 +- drivers/gpu/drm/scheduler/sched_fence.c | 4 +- .../gpu/drm/scheduler/tests/mock_scheduler.c | 2 +- drivers/gpu/drm/ttm/tests/ttm_bo_test.c | 2 +- .../gpu/drm/ttm/tests/ttm_bo_validate_test.c | 2 +- drivers/gpu/drm/v3d/v3d_fence.c | 2 +- drivers/gpu/drm/vc4/vc4_gem.c | 2 +- drivers/gpu/drm/vgem/vgem_fence.c | 2 +- drivers/gpu/drm/virtio/virtgpu_fence.c | 2 +- drivers/gpu/drm/vmwgfx/vmwgfx_fence.c | 2 +- drivers/gpu/drm/xe/xe_hw_fence.c | 2 +- drivers/gpu/drm/xe/xe_oa.c | 2 +- drivers/gpu/drm/xe/xe_preempt_fence.c | 2 +- drivers/gpu/drm/xe/xe_tlb_inval.c | 2 +- drivers/gpu/host1x/fence.c | 2 +- drivers/iio/industrialio-buffer.c | 2 +- drivers/usb/gadget/function/f_fs.c | 2 +- include/linux/dma-fence.h | 14 +++-- rust/kernel/dma_buf/dma_fence.rs | 2 +-
52 files changed, 95 insertions(+), 94 deletions(-)base-commit:
8258a37702b9b9cf27f5c0ea07625e3e6bd74f5a
Patchwork
CI✗ i915.CI.BAT: failure for dma-buf: dma-fence: Remove dma_fence_init64()
In reply to Philipp Stanner== Series Details ==
== Series Details ==
Series: dma-buf: dma-fence: Remove dma_fence_init64()
URL : https://patchwork.freedesktop.org/series/177862/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_19454 -> Patchwork_177862v1
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_177862v1 absolutely need to be verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_177862v1, please notify your bug team ([email protected]) to allow them to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_177862v1/index.html
Participating hosts (40 -> 39)
------------------------------
Missing (1): bat-dg2-13
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_177862v1:
### IGT changes ###
#### Possible regressions ####
* igt@kms_cursor_legacy@basic-flip-after-cursor-varying-size:
- fi-bsw-n3050: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19454/fi-bsw-n3050/igt@[email protected]
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_177862v1/fi-bsw-n3050/igt@[email protected]
Known issues
------------
Here are the changes found in Patchwork_177862v1 that come from known issues:
### IGT changes ###
#### Possible fixes ####
* igt@kms_pm_rpm@basic-rte:
- bat-rpls-4: [DMESG-WARN][3] ([i915#13400]) -> [PASS][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19454/bat-rpls-4/igt@[email protected]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_177862v1/bat-rpls-4/igt@[email protected]
[i915#13400]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13400
Build changes
-------------
* Linux: CI_DRM_19454 -> Patchwork_177862v1
CI-20190529: 20190529
CI_DRM_19454: 0e8b43b5a5ef2dd52c454158e7fd8a927d796eb4 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_9177: 9177
Patchwork_177862v1: 0e8b43b5a5ef2dd52c454158e7fd8a927d796eb4 @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_177862v1/index.html
Patchwork
CI✓ Xe.CI.FULL: success for dma-buf: dma-fence: Remove dma_fence_init64()
In reply to Philipp Stanner== Series Details ==
== Series Details ==
Series: dma-buf: dma-fence: Remove dma_fence_init64()
URL : https://patchwork.freedesktop.org/series/177858/
State : success
== Summary ==
CI Bug Log - changes from xe-6070-0e8b43b5a5ef2dd52c454158e7fd8a927d796eb4_FULL -> xe-pw-177858v1_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (3 -> 3)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-177858v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_big_fb@4-tiled-16bpp-rotate-270:
- shard-bmg: NOTRUN -> [SKIP][1] ([Intel XE#2327])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@[email protected]
* igt@kms_big_fb@linear-8bpp-rotate-90:
- shard-ptl: NOTRUN -> [SKIP][2] ([Intel XE#5901])
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-ptl-6/igt@[email protected]
* igt@kms_big_fb@y-tiled-16bpp-rotate-90:
- shard-ptl: NOTRUN -> [SKIP][3] ([Intel XE#5808]) +1 other test skip
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-ptl-6/igt@[email protected]
* igt@kms_big_fb@y-tiled-64bpp-rotate-90:
- shard-bmg: NOTRUN -> [SKIP][4] ([Intel XE#1124]) +4 other tests skip
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-2/igt@[email protected]
* igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-mc-ccs:
- shard-bmg: NOTRUN -> [SKIP][5] ([Intel XE#2887]) +4 other tests skip
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@[email protected]
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-d-hdmi-a-3:
- shard-bmg: NOTRUN -> [INCOMPLETE][6] ([Intel XE#7084] / [Intel XE#8150])
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-5/igt@kms_ccs@[email protected]
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs@pipe-a-edp-1:
- shard-ptl: NOTRUN -> [SKIP][7] ([Intel XE#5823] / [Intel XE#6918]) +4 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-ptl-6/igt@kms_ccs@[email protected]
* igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2:
- shard-bmg: NOTRUN -> [SKIP][8] ([Intel XE#2652]) +11 other tests skip
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-2/igt@kms_ccs@[email protected]
* igt@kms_cdclk@plane-scaling:
- shard-bmg: NOTRUN -> [SKIP][9] ([Intel XE#2724] / [Intel XE#7449])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@[email protected]
* igt@kms_chamelium_color_pipeline@plane-lut3d-green-only:
- shard-bmg: NOTRUN -> [SKIP][10] ([Intel XE#7358])
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-2/igt@[email protected]
* igt@kms_chamelium_hpd@dp-hpd:
- shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#2252]) +2 other tests skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@[email protected]
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-b-plane-4:
- shard-bmg: NOTRUN -> [SKIP][12] ([Intel XE#6969]) +7 other tests skip
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@kms_color_pipeline@[email protected]
* igt@kms_content_protection@legacy-hdcp14@pipe-a-dp-1:
- shard-bmg: NOTRUN -> [FAIL][13] ([Intel XE#3304] / [Intel XE#7374])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@kms_content_protection@[email protected]
* igt@kms_content_protection@suspend-resume:
- shard-bmg: NOTRUN -> [FAIL][14] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +1 other test fail
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@[email protected]
* igt@kms_content_protection@suspend-resume@pipe-a-dp-1:
- shard-bmg: NOTRUN -> [FAIL][15] ([Intel XE#3304])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@kms_content_protection@[email protected]
* igt@kms_cursor_crc@cursor-rapid-movement-max-size:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#2320])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@[email protected]
* igt@kms_cursor_crc@cursor-sliding-128x42:
- shard-ptl: NOTRUN -> [SKIP][17] ([Intel XE#5900])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-ptl-6/igt@[email protected]
* igt@kms_dirtyfb@drrs-dirtyfb-ioctl:
- shard-ptl: NOTRUN -> [SKIP][18] ([Intel XE#5958])
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-ptl-6/igt@[email protected]
* igt@kms_dp_linktrain_fallback@dsc-fallback:
- shard-bmg: NOTRUN -> [SKIP][19] ([Intel XE#4331] / [Intel XE#7227])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@[email protected]
* igt@kms_dsc@dsc-with-output-formats-bigjoiner:
- shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#8265])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@[email protected]
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-lnl: [PASS][21] -> [FAIL][22] ([Intel XE#301] / [Intel XE#3149])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6070-0e8b43b5a5ef2dd52c454158e7fd8a927d796eb4/shard-lnl-3/igt@kms_flip@[email protected]
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-lnl-3/igt@kms_flip@[email protected]
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling:
- shard-bmg: NOTRUN -> [SKIP][23] ([Intel XE#7178] / [Intel XE#7351])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling.html
* igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-move:
- shard-ptl: NOTRUN -> [SKIP][24] ([Intel XE#5800] / [Intel XE#6312]) +1 other test skip
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-ptl-6/igt@[email protected]
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][25] ([Intel XE#2311]) +14 other tests skip
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@drrshdr-1p-primscrn-shrfb-pgflip-blt:
- shard-ptl: NOTRUN -> [SKIP][26] ([Intel XE#6312])
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-ptl-6/igt@kms_frontbuffer_tracking@drrshdr-1p-primscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-render:
- shard-bmg: NOTRUN -> [SKIP][27] ([Intel XE#4141]) +5 other tests skip
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-spr-indfb-move:
- shard-ptl: NOTRUN -> [SKIP][28] ([Intel XE#5812]) +9 other tests skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-ptl-6/igt@[email protected]
* igt@kms_frontbuffer_tracking@hdr-abgr161616f-draw-render:
- shard-bmg: NOTRUN -> [SKIP][29] ([Intel XE#7061])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@[email protected]
* igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-pri-indfb-draw-blt:
- shard-ptl: NOTRUN -> [SKIP][30] ([Intel XE#7865]) +4 other tests skip
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-ptl-6/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-pri-shrfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][31] ([Intel XE#2313]) +15 other tests skip
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psrhdr-argb161616f-draw-blt:
- shard-ptl: NOTRUN -> [SKIP][32] ([Intel XE#7061]) +1 other test skip
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-ptl-6/igt@[email protected]
* igt@kms_joiner@basic-max-non-joiner:
- shard-ptl: NOTRUN -> [SKIP][33] ([Intel XE#5873])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-ptl-6/igt@[email protected]
* igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier-source-clamping:
- shard-bmg: NOTRUN -> [SKIP][34] ([Intel XE#7283])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier-source-clamping.html
* igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-formats@pipe-a:
- shard-ptl: NOTRUN -> [SKIP][35] ([Intel XE#6886]) +1 other test skip
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-ptl-6/igt@kms_plane_scaling@[email protected]
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75:
- shard-bmg: NOTRUN -> [SKIP][36] ([Intel XE#2763] / [Intel XE#6886]) +4 other tests skip
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75.html
* igt@kms_pm_dc@dc5-psr-suspend-resume:
- shard-lnl: [PASS][37] -> [FAIL][38] ([Intel XE#8399])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6070-0e8b43b5a5ef2dd52c454158e7fd8a927d796eb4/shard-lnl-3/igt@[email protected]
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-lnl-4/igt@[email protected]
* igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
- shard-bmg: NOTRUN -> [SKIP][39] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383] / [Intel XE#836])
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@[email protected]
* igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf:
- shard-bmg: NOTRUN -> [SKIP][40] ([Intel XE#1489]) +1 other test skip
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr@fbc-psr2-sprite-blt@edp-1:
- shard-ptl: NOTRUN -> [SKIP][41] ([Intel XE#1406] / [Intel XE#5835]) +1 other test skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-ptl-6/igt@kms_psr@[email protected]
* igt@kms_psr@psr-cursor-plane-move:
- shard-bmg: NOTRUN -> [SKIP][42] ([Intel XE#2234] / [Intel XE#2850]) +3 other tests skip
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@[email protected]
* igt@kms_rotation_crc@primary-rotation-270:
- shard-bmg: NOTRUN -> [SKIP][43] ([Intel XE#3904] / [Intel XE#7342])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@[email protected]
* igt@kms_sharpness_filter@invalid-filter-with-plane:
- shard-bmg: NOTRUN -> [SKIP][44] ([Intel XE#6503])
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@[email protected]
* igt@kms_vrr@flip-basic-fastset:
- shard-bmg: NOTRUN -> [SKIP][45] ([Intel XE#1499] / [Intel XE#9271])
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@[email protected]
* igt@xe_compute@ccs-mode-compute-kernel:
- shard-ptl: NOTRUN -> [SKIP][46] ([Intel XE#6599])
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-ptl-6/igt@[email protected]
* igt@xe_evict@evict-beng-threads-large-multi-vm:
- shard-ptl: NOTRUN -> [SKIP][47] ([Intel XE#5764])
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-ptl-6/igt@[email protected]
* igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate-race:
- shard-ptl: NOTRUN -> [SKIP][48] ([Intel XE#5575] / [Intel XE#7484])
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-ptl-6/igt@[email protected]
* igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-rebind:
- shard-bmg: NOTRUN -> [SKIP][49] ([Intel XE#2322] / [Intel XE#7372]) +3 other tests skip
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@[email protected]
* igt@xe_exec_fault_mode@many-multi-queue-userptr-invalidate-race-imm:
- shard-ptl: NOTRUN -> [SKIP][50] ([Intel XE#8374]) +1 other test skip
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-ptl-6/igt@xe_exec_fault_mode@many-multi-queue-userptr-invalidate-race-imm.html
* igt@xe_exec_fault_mode@twice-multi-queue:
- shard-bmg: NOTRUN -> [SKIP][51] ([Intel XE#8374]) +2 other tests skip
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@[email protected]
* igt@xe_exec_multi_queue@few-execs-preempt-mode-basic:
- shard-bmg: NOTRUN -> [SKIP][52] ([Intel XE#8364]) +6 other tests skip
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@[email protected]
* igt@xe_exec_multi_queue@many-execs-basic:
- shard-ptl: NOTRUN -> [SKIP][53] ([Intel XE#8364])
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-ptl-6/igt@[email protected]
* igt@xe_exec_reset@cm-multi-queue-close-execqueues:
- shard-bmg: NOTRUN -> [SKIP][54] ([Intel XE#8369]) +1 other test skip
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@[email protected]
* igt@xe_exec_threads@threads-multi-queue-mixed-basic:
- shard-ptl: NOTRUN -> [SKIP][55] ([Intel XE#8378])
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-ptl-6/igt@[email protected]
* igt@xe_exec_threads@threads-multi-queue-mixed-userptr-invalidate:
- shard-bmg: NOTRUN -> [SKIP][56] ([Intel XE#8378]) +1 other test skip
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@xe_exec_threads@threads-multi-queue-mixed-userptr-invalidate.html
* igt@xe_mempage_offline@inject-duplicate-page:
- shard-bmg: NOTRUN -> [SKIP][57] ([Intel XE#9203])
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@[email protected]
* igt@xe_mmap@pci-membarrier:
- shard-ptl: NOTRUN -> [SKIP][58] ([Intel XE#5100] / [Intel XE#7408])
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-ptl-6/igt@[email protected]
* igt@xe_multigpu_svm@mgpu-concurrent-access-prefetch:
- shard-ptl: NOTRUN -> [SKIP][59] ([Intel XE#6964])
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-ptl-6/igt@[email protected]
* igt@xe_page_reclaim@prl-invalidate-full:
- shard-ptl: NOTRUN -> [SKIP][60] ([Intel XE#7793])
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-ptl-6/igt@[email protected]
* igt@xe_peer2peer@read:
- shard-bmg: NOTRUN -> [SKIP][61] ([Intel XE#2427] / [Intel XE#6953] / [Intel XE#7326] / [Intel XE#7353])
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-2/igt@[email protected]
* igt@xe_pm@s4-basic-exec:
- shard-lnl: [PASS][62] -> [ABORT][63] ([Intel XE#9362])
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6070-0e8b43b5a5ef2dd52c454158e7fd8a927d796eb4/shard-lnl-4/igt@[email protected]
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-lnl-5/igt@[email protected]
* igt@xe_pm@s4-multiple-execs:
- shard-ptl: [PASS][64] -> [ABORT][65] ([Intel XE#9362])
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6070-0e8b43b5a5ef2dd52c454158e7fd8a927d796eb4/shard-ptl-5/igt@[email protected]
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-ptl-1/igt@[email protected]
* igt@xe_query@multigpu-query-pxp-status:
- shard-bmg: NOTRUN -> [SKIP][66] ([Intel XE#944])
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@[email protected]
* igt@xe_survivability@runtime-survivability:
- shard-bmg: [PASS][67] -> [DMESG-WARN][68] ([Intel XE#9365])
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6070-0e8b43b5a5ef2dd52c454158e7fd8a927d796eb4/shard-bmg-6/igt@[email protected]
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-9/igt@[email protected]
#### Possible fixes ####
* igt@kms_bw@linear-tiling-1-displays-target-2160x1440p:
- shard-bmg: [SKIP][69] ([Intel XE#367]) -> [PASS][70]
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6070-0e8b43b5a5ef2dd52c454158e7fd8a927d796eb4/shard-bmg-1/igt@[email protected]
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@[email protected]
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-d-dp-2:
- shard-bmg: [INCOMPLETE][71] ([Intel XE#7084] / [Intel XE#8150]) -> [PASS][72]
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6070-0e8b43b5a5ef2dd52c454158e7fd8a927d796eb4/shard-bmg-10/igt@kms_ccs@[email protected]
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-5/igt@kms_ccs@[email protected]
* igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
- shard-lnl: [FAIL][73] ([Intel XE#301] / [Intel XE#3149]) -> [PASS][74] +1 other test pass
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6070-0e8b43b5a5ef2dd52c454158e7fd8a927d796eb4/shard-lnl-1/igt@kms_flip@[email protected]
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-lnl-3/igt@kms_flip@[email protected]
* igt@kms_flip@flip-vs-expired-vblank@a-edp1:
- shard-lnl: [FAIL][75] ([Intel XE#301]) -> [PASS][76]
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6070-0e8b43b5a5ef2dd52c454158e7fd8a927d796eb4/shard-lnl-3/igt@kms_flip@[email protected]
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-lnl-3/igt@kms_flip@[email protected]
* igt@kms_hdr@static-toggle-suspend:
- shard-bmg: [ABORT][77] ([Intel XE#9362] / [Intel XE#9438]) -> [PASS][78]
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6070-0e8b43b5a5ef2dd52c454158e7fd8a927d796eb4/shard-bmg-5/igt@[email protected]
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-7/igt@[email protected]
* igt@xe_ccs@suspend-resume:
- shard-bmg: [INCOMPLETE][79] ([Intel XE#9410]) -> [PASS][80] +1 other test pass
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6070-0e8b43b5a5ef2dd52c454158e7fd8a927d796eb4/shard-bmg-7/igt@[email protected]
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-2/igt@[email protected]
* igt@xe_exec_reset@gt-stress-reset-bo-invalidation:
- shard-ptl: [DMESG-WARN][81] ([Intel XE#8652]) -> [PASS][82]
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6070-0e8b43b5a5ef2dd52c454158e7fd8a927d796eb4/shard-ptl-4/igt@[email protected]
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-ptl-5/igt@[email protected]
* igt@xe_pm@s4-mocs:
- shard-ptl: [ABORT][83] ([Intel XE#9362]) -> [PASS][84]
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6070-0e8b43b5a5ef2dd52c454158e7fd8a927d796eb4/shard-ptl-5/igt@[email protected]
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-ptl-6/igt@[email protected]
- shard-lnl: [DMESG-WARN][85] ([Intel XE#7727]) -> [PASS][86]
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6070-0e8b43b5a5ef2dd52c454158e7fd8a927d796eb4/shard-lnl-8/igt@[email protected]
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-lnl-5/igt@[email protected]
* igt@xe_pm_residency@idle-residency:
- shard-bmg: [FAIL][87] ([Intel XE#9254]) -> [PASS][88]
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6070-0e8b43b5a5ef2dd52c454158e7fd8a927d796eb4/shard-bmg-2/igt@[email protected]
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-3/igt@[email protected]
* igt@xe_pm_residency@idle-residency@gt0:
- shard-bmg: [FAIL][89] ([Intel XE#9725]) -> [PASS][90]
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6070-0e8b43b5a5ef2dd52c454158e7fd8a927d796eb4/shard-bmg-2/igt@xe_pm_residency@[email protected]
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-3/igt@xe_pm_residency@[email protected]
#### Warnings ####
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
- shard-lnl: [SKIP][91] ([Intel XE#309] / [Intel XE#7343]) -> [SKIP][92] ([Intel XE#309] / [Intel XE#7343] / [Intel XE#7935])
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6070-0e8b43b5a5ef2dd52c454158e7fd8a927d796eb4/shard-lnl-4/igt@[email protected]
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-lnl-8/igt@[email protected]
* igt@kms_flip@flip-vs-expired-vblank:
- shard-lnl: [FAIL][93] ([Intel XE#301]) -> [FAIL][94] ([Intel XE#301] / [Intel XE#3149])
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6070-0e8b43b5a5ef2dd52c454158e7fd8a927d796eb4/shard-lnl-3/igt@[email protected]
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-lnl-3/igt@[email protected]
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: [SKIP][95] ([Intel XE#2426] / [Intel XE#5848]) -> [SKIP][96] ([Intel XE#2509] / [Intel XE#7437])
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6070-0e8b43b5a5ef2dd52c454158e7fd8a927d796eb4/shard-bmg-2/igt@[email protected]
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/shard-bmg-3/igt@[email protected]
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2427
[Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
[Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
[Intel XE#5100]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5100
[Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
[Intel XE#5764]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5764
[Intel XE#5800]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5800
[Intel XE#5808]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5808
[Intel XE#5812]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5812
[Intel XE#5823]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5823
[Intel XE#5835]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5835
[Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
[Intel XE#5873]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5873
[Intel XE#5900]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5900
[Intel XE#5901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5901
[Intel XE#5958]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5958
[Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
[Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
[Intel XE#6599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6599
[Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
[Intel XE#6918]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6918
[Intel XE#6953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6953
[Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
[Intel XE#6969]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6969
[Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
[Intel XE#7084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7084
[Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
[Intel XE#7227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7227
[Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
[Intel XE#7326]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7326
[Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
[Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
[Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
[Intel XE#7353]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7353
[Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
[Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
[Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
[Intel XE#7383]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7383
[Intel XE#7408]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7408
[Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
[Intel XE#7449]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7449
[Intel XE#7484]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7484
[Intel XE#7727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7727
[Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
[Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
[Intel XE#7935]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7935
[Intel XE#8150]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8150
[Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
[Intel XE#8369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8369
[Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
[Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
[Intel XE#8399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8399
[Intel XE#8652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8652
[Intel XE#9203]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9203
[Intel XE#9254]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9254
[Intel XE#9271]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9271
[Intel XE#9362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9362
[Intel XE#9365]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9365
[Intel XE#9410]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9410
[Intel XE#9438]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9438
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
[Intel XE#9725]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9725
Build changes
-------------
* Linux: xe-6070-0e8b43b5a5ef2dd52c454158e7fd8a927d796eb4 -> xe-pw-177858v1
IGT_9177: 9177
xe-6070-0e8b43b5a5ef2dd52c454158e7fd8a927d796eb4: 0e8b43b5a5ef2dd52c454158e7fd8a927d796eb4
xe-pw-177858v1: 177858v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177858v1/index.html
Quoted 18 lines · Philipp Stanner
We recently had a discussion about reworking
dma_fenceinit to close a race-window [1].The community agreement seems to have been that we can get rid of
dma_fence_init64(), so let's do that already. In the meantime we can continue our discussions regarding the race in [1].This also touches the Rust
dma_fence, which actually should use 64-bit seqnos (was forgotten so far). Rust fence has no users currently, so needs no backporting, so I would like to address that in a distinct patch.Tested on Nouveau with and without the SEQNO64 flag. Nouveau also uses the USER flag, so I hope we're fine.
P.
Quoted 7 lines
[1] https://lore.kernel.org/dri-devel/[email protected]/
Philipp Stanner (3):
dma-buf: dma-fence: Add flags parameter todma_fence_init()
dma-buf: Port users ofdma_fence_init64()
dma-buf: dma-fence: Removedma_fence_init64()
@Christian, what do you think, shall we go on with this one?
P.