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perf/x86/intel: Add Knights Mill CPUID

PATCH New Piotr Luc 2 participants 3 messages Oct 12, 2016 – Oct 17, 2016

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Piotr Luc

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#0 lore raw

PATCH 1/1 perf/x86/intel: Add Knights Mill CPUID

Add Knights Mill (KNM) to the list of CPUIDs supported by PMU.

Signed-off-by Piotr Luc <[email protected]>
Reviewed-by Dave Hansen <[email protected]>
Cc Thomas Gleixner <[email protected]>
Cc Ingo Molnar <[email protected]>
Cc "H. Peter Anvin" <[email protected]>
Cc [email protected]
Cc [email protected]

---
Depends-on: x86/cpu/intel: Add Knights Mill to Intel family
https://lkml.kernel.org/r/20161012180520.30976-1-piotr.luc () intel ! com

 arch/x86/events/intel/core.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
arch/x86/events/intel/core.c +2 -1
index 4c9a79b..327dc2d 100644
@@ -3893,6 +3893,7 @@ __init int intel_pmu_init(void)
 		break;
 
 	case INTEL_FAM6_XEON_PHI_KNL:
+	case INTEL_FAM6_XEON_PHI_KNM:
 		memcpy(hw_cache_event_ids,
 		       slm_hw_cache_event_ids, sizeof(hw_cache_event_ids));
 		memcpy(hw_cache_extra_regs,

@@ -3907,7 +3908,7 @@ __init int intel_pmu_init(void)
 		x86_pmu.flags |= PMU_FL_HAS_RSP_1;
 		x86_pmu.flags |= PMU_FL_NO_HT_SHARING;
 
-		pr_cont("Knights Landing events, ");
+		pr_cont("Knights Landing/Mill events, ");
 		break;
 
 	case INTEL_FAM6_SKYLAKE_MOBILE:
Signature · 1 line
2.10.1
merge bot
#1 lore raw
perf/x86/intel: Add Knights Mill CPUID
Commit-ID:  d673b8340cac02d02de30197d6fe66c22a1df6e4
Gitweb:     http://git.kernel.org/tip/d673b8340cac02d02de30197d6fe66c22a1df6e4
Author:     Piotr Luc <[email protected]>
AuthorDate: Wed, 12 Oct 2016 20:26:34 +0200
Committer:  Ingo Molnar <[email protected]>
CommitDate: Sun, 16 Oct 2016 11:32:11 +0200

perf/x86/intel: Add Knights Mill CPUID

Add Knights Mill (KNM) to the list of CPUIDs supported by PMU.

Signed-off-by Piotr Luc <[email protected]>
Reviewed-by Dave Hansen <[email protected]>
Cc Andy Lutomirski <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Brian Gerst <[email protected]>
Cc Denys Vlasenko <[email protected]>
Cc H. Peter Anvin <[email protected]>
Cc Josh Poimboeuf <[email protected]>
Cc Linus Torvalds <[email protected]>
Cc Peter Zijlstra <[email protected]>
Cc Thomas Gleixner <[email protected]>
Link http://lkml.kernel.org/r/[email protected] open here
Signed-off-by Ingo Molnar <[email protected]>
---
 arch/x86/events/intel/core.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
arch/x86/events/intel/core.c +2 -1
index a3a9eb8..eab0915 100644
@@ -3898,6 +3898,7 @@ __init int intel_pmu_init(void)
 		break;
 
 	case INTEL_FAM6_XEON_PHI_KNL:
+	case INTEL_FAM6_XEON_PHI_KNM:
 		memcpy(hw_cache_event_ids,
 		       slm_hw_cache_event_ids, sizeof(hw_cache_event_ids));
 		memcpy(hw_cache_extra_regs,

@@ -3912,7 +3913,7 @@ __init int intel_pmu_init(void)
 		x86_pmu.flags |= PMU_FL_HAS_RSP_1;
 		x86_pmu.flags |= PMU_FL_NO_HT_SHARING;
 
-		pr_cont("Knights Landing events, ");
+		pr_cont("Knights Landing/Mill events, ");
 		break;
 
 	case INTEL_FAM6_SKYLAKE_MOBILE:
merge bot
#2 lore raw
In reply to Piotr Luc
perf/x86/intel: Add Knights Mill CPUID
Commit-ID:  608284bf0def3ca5e6936920fcd84294101ef12d
Gitweb:     http://git.kernel.org/tip/608284bf0def3ca5e6936920fcd84294101ef12d
Author:     Piotr Luc <[email protected]>
AuthorDate: Wed, 12 Oct 2016 20:26:34 +0200
Committer:  Ingo Molnar <[email protected]>
CommitDate: Mon, 17 Oct 2016 10:45:08 +0200

perf/x86/intel: Add Knights Mill CPUID

Add Knights Mill (KNM) to the list of CPUIDs supported by PMU.

Signed-off-by Piotr Luc <[email protected]>
Reviewed-by Dave Hansen <[email protected]>
Cc Andy Lutomirski <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Brian Gerst <[email protected]>
Cc Denys Vlasenko <[email protected]>
Cc H. Peter Anvin <[email protected]>
Cc Josh Poimboeuf <[email protected]>
Cc Linus Torvalds <[email protected]>
Cc Peter Zijlstra <[email protected]>
Cc Thomas Gleixner <[email protected]>
Link http://lkml.kernel.org/r/[email protected] open here
Signed-off-by Ingo Molnar <[email protected]>
---
 arch/x86/events/intel/core.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
arch/x86/events/intel/core.c +2 -1
index a3a9eb8..eab0915 100644
@@ -3898,6 +3898,7 @@ __init int intel_pmu_init(void)
 		break;
 
 	case INTEL_FAM6_XEON_PHI_KNL:
+	case INTEL_FAM6_XEON_PHI_KNM:
 		memcpy(hw_cache_event_ids,
 		       slm_hw_cache_event_ids, sizeof(hw_cache_event_ids));
 		memcpy(hw_cache_extra_regs,

@@ -3912,7 +3913,7 @@ __init int intel_pmu_init(void)
 		x86_pmu.flags |= PMU_FL_HAS_RSP_1;
 		x86_pmu.flags |= PMU_FL_NO_HT_SHARING;
 
-		pr_cont("Knights Landing events, ");
+		pr_cont("Knights Landing/Mill events, ");
 		break;
 
 	case INTEL_FAM6_SKYLAKE_MOBILE: