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x86: simpify direct_gbpages setting, add early_param_on_off()

RFC In review Luis R. Rodriguez 5 participants 19 messages Mar 5, 2015

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#0 lore raw

cover x86: simpify direct_gbpages setting, add early_param_on_off()

From: "Luis R. Rodriguez" <[email protected]>

While reviewing DIRECT_GBPAGES I noticed some inconsistancies on when its cached "enable" variable is set and when in reality its full feature is enabled. There's also some code simplification possible by simply using Kconfig, so decided to take advantage of that and then generalize this a bit under a new early_param_on_off() which makes it easier to associate featureas with respective cached values and their own feature related Kconfig entries.

In this case in order to use early_param_on_off() given that init.o is shared with both 32-bit and 64-bit and before the early parameters were only exposed on 64-bit it does mean we're exposing this kernel parameter to 32-bit as well now but its not possible to enable it on 32-bit as its real setting is guarded by ENABLE_DIRECT_GBPAGES.

I was tempted to grep around for this sort of grammar use but couldn't easily find all uses with Coccinelle / grep due to the #ifder'y and the code being outside of routines. If the generalization is not desired we can drop the last two, but would ask that the first two patches to be considered and reviewed.

Luis R. Rodriguez (4):
x86: mm: use IS_ENABLED() for direct_gbpages
x86: mm: simplify enabling direct_gbpages init.h: add early_param_on_off()
x86: mm: use early_param_on_off() for direct_gbpages

 arch/x86/Kconfig       | 18 +++++++++++++-----
 arch/x86/mm/init.c     | 24 +++++++++++-------------
 arch/x86/mm/init_64.c  | 14 --------------
 arch/x86/mm/pageattr.c |  2 --
 include/linux/init.h   | 15 +++++++++++++++
 5 files changed, 39 insertions(+), 34 deletions(-)
Signature · 1 line
2.2.2
#1 lore raw

RFC 1/4 x86: mm: use IS_ENABLED() for direct_gbpages

From: "Luis R. Rodriguez" <[email protected]>

Replace #ifdef eyesore with IS_ENABLED() use.

Cc Greg Kroah-Hartman <[email protected]>
Cc Tony Lindgren <[email protected]>
Cc Thomas Gleixner <[email protected]>
Cc Ingo Molnar <[email protected]>
Cc "H. Peter Anvin" <[email protected]>
Cc Juergen Gross <[email protected]>
Cc Andy Lutomirski <[email protected]>
Cc Toshi Kani <[email protected]>
Cc Dave Hansen <[email protected]>
Cc Jan Beulich <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Xishi Qiu <[email protected]>
Cc Andrew Morton <[email protected]>
Cc David Vrabel <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Vlastimil Babka <[email protected]>
Cc Joonsoo Kim <[email protected]>
Cc Dexuan Cui <[email protected]>
---
 arch/x86/mm/init.c | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)
arch/x86/mm/init.c +1 -5
index 52417e7..b880d06 100644
@@ -131,11 +131,7 @@ void  __init early_alloc_pgt_buf(void)
 
 int after_bootmem;
 
-int direct_gbpages
-#ifdef CONFIG_DIRECT_GBPAGES
-				= 1
-#endif
-;
+int direct_gbpages = IS_ENABLED(CONFIG_DIRECT_GBPAGES);
 
 static void __init init_gbpages(void)
 {
Signature · 1 line
2.2.2
#2 lore raw

[tip:x86/mm] x86/mm: Use IS_ENABLED() for direct_gbpages

x86/mm: Use IS_ENABLED() for direct_gbpages
Commit-ID:  d9fd579c218e22c897f0f1b9e132af9b436cf445
Gitweb:     http://git.kernel.org/tip/d9fd579c218e22c897f0f1b9e132af9b436cf445
Author:     Luis R. Rodriguez <[email protected]>
AuthorDate: Wed, 4 Mar 2015 17:24:11 -0800
Committer:  Ingo Molnar <[email protected]>
CommitDate: Thu, 5 Mar 2015 08:02:11 +0100

x86/mm: Use IS_ENABLED() for direct_gbpages

Replace #ifdef eyesore with IS_ENABLED() use.

Cc Andrew Morton <[email protected]>
Cc Andy Lutomirski <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Dave Hansen <[email protected]>
Cc David Vrabel <[email protected]>
Cc Dexuan Cui <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc H. Peter Anvin <[email protected]>
Cc Jan Beulich <[email protected]>
Cc Joonsoo Kim <[email protected]>
Cc Juergen Gross <[email protected]>
Cc Linus Torvalds <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Thomas Gleixner <[email protected]>
Cc Tony Lindgren <[email protected]>
Cc Toshi Kani <[email protected]>
Cc Vlastimil Babka <[email protected]>
Cc Xishi Qiu <[email protected]>
---
 arch/x86/mm/init.c | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)
arch/x86/mm/init.c +1 -5
index a110efc..74f2b37 100644
@@ -131,11 +131,7 @@ void  __init early_alloc_pgt_buf(void)
 
 int after_bootmem;
 
-int direct_gbpages
-#ifdef CONFIG_DIRECT_GBPAGES
-				= 1
-#endif
-;
+int direct_gbpages = IS_ENABLED(CONFIG_DIRECT_GBPAGES);
 
 static void __init init_gbpages(void)
 {
#3 lore raw

RFC 2/4 x86: mm: simplify enabling direct_gbpages

In reply to Luis R. Rodriguez

From: "Luis R. Rodriguez" <[email protected]>

direct_gbpages can be force enabled as an early parameter but not really have taken effect when DEBUG_PAGEALLOC or KMEMCHECK is enabled. You can also enable direct_gbpages right now if you have an x86_64 architecture but your CPU doesn't really have support for this feature. In both cases PG_LEVEL_1G won't actually be enabled but direct_gbpages is used in other areas under the assumptions that PG_LEVEL_1G was set. Fix this by putting together all requirements which make this feature sensible to enable under, and only enable both finally flipping on PG_LEVEL_1G and leaving PG_LEVEL_1G set when this is true.

We only enable this feature then to be possible on sensible builds defined by the new ENABLE_DIRECT_GBPAGES. If the CPU has support for it you can either enable this by using the DIRECT_GBPAGES option or using the early kernel parameter. If a platform had support for this you can always force disable it as well.

Cc Greg Kroah-Hartman <[email protected]>
Cc Tony Lindgren <[email protected]>
Cc Thomas Gleixner <[email protected]>
Cc Ingo Molnar <[email protected]>
Cc "H. Peter Anvin" <[email protected]>
Cc Juergen Gross <[email protected]>
Cc Andy Lutomirski <[email protected]>
Cc Toshi Kani <[email protected]>
Cc Dave Hansen <[email protected]>
Cc Jan Beulich <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Xishi Qiu <[email protected]>
Cc Andrew Morton <[email protected]>
Cc David Vrabel <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Vlastimil Babka <[email protected]>
Cc Joonsoo Kim <[email protected]>
Cc Dexuan Cui <[email protected]>
---
 arch/x86/Kconfig       | 18 +++++++++++++-----
 arch/x86/mm/init.c     | 17 +++++++++--------
 arch/x86/mm/pageattr.c |  2 --
 3 files changed, 22 insertions(+), 15 deletions(-)
arch/x86/Kconfig +13 -5
index fb8e8cd..f3fd260 100644
@@ -1300,14 +1300,22 @@ config ARCH_DMA_ADDR_T_64BIT
 	def_bool y
 	depends on X86_64 || HIGHMEM64G
 
+config ENABLE_DIRECT_GBPAGES
+	def_bool y
+	depends on X86_64 && !DEBUG_PAGEALLOC && !KMEMCHECK
+
 config DIRECT_GBPAGES
 	bool "Enable 1GB pages for kernel pagetables" if EXPERT
 	default y
-	depends on X86_64
-	---help---
-	  Allow the kernel linear mapping to use 1GB pages on CPUs that
-	  support it. This can improve the kernel's performance a tiny bit by
-	  reducing TLB pressure. If in doubt, say "Y".
+	depends on ENABLE_DIRECT_GBPAGES
+	---help---
+	  Enable by default the kernel linear mapping to use 1GB pages on CPUs
+	  that support it. This can improve the kernel's performance a tiny bit
+	  by reducing TLB pressure. If in doubt, say "Y". If you've disabled
+	  option but your platform is capable of handling support for this
+	  you can use the gbpages kernel parameter. Likewise if you've enabled
+	  this but you'd like to force disable this option you can use the
+	  nogbpages kernel parameter.
 
 # Common NUMA Features
 config NUMA
arch/x86/mm/init.c +9 -8
index b880d06..8d375ba 100644
@@ -131,16 +131,21 @@ void  __init early_alloc_pgt_buf(void)
 
 int after_bootmem;
 
+static int page_size_mask;
+
 int direct_gbpages = IS_ENABLED(CONFIG_DIRECT_GBPAGES);
 
 static void __init init_gbpages(void)
 {
-#ifdef CONFIG_X86_64
-	if (direct_gbpages && cpu_has_gbpages)
+	if (!IS_ENABLED(CONFIG_ENABLE_DIRECT_GBPAGES)) {
+		direct_gbpages = 0;
+		return;
+	}
+	if (direct_gbpages && cpu_has_gbpages) {
 		printk(KERN_INFO "Using GB pages for direct mapping\n");
-	else
+		page_size_mask |= 1 << PG_LEVEL_1G;
+	} else
 		direct_gbpages = 0;
-#endif
 }
 
 struct map_range {
@@ -149,8 +154,6 @@ struct map_range {
 	unsigned page_size_mask;
 };
 
-static int page_size_mask;
-
 static void __init probe_page_size_mask(void)
 {
 	init_gbpages();
@@ -161,8 +164,6 @@ static void __init probe_page_size_mask(void)
 	 * This will simplify cpa(), which otherwise needs to support splitting
 	 * large pages into small in interrupt context, etc.
 	 */
-	if (direct_gbpages)
-		page_size_mask |= 1 << PG_LEVEL_1G;
 	if (cpu_has_pse)
 		page_size_mask |= 1 << PG_LEVEL_2M;
 #endif
arch/x86/mm/pageattr.c +0 -2
index 536ea2f..070b7c2 100644
@@ -81,11 +81,9 @@ void arch_report_meminfo(struct seq_file *m)
 	seq_printf(m, "DirectMap4M:    %8lu kB\n",
 			direct_pages_count[PG_LEVEL_2M] << 12);
 #endif
-#ifdef CONFIG_X86_64
 	if (direct_gbpages)
 		seq_printf(m, "DirectMap1G:    %8lu kB\n",
 			direct_pages_count[PG_LEVEL_1G] << 20);
-#endif
 }
 #else
 static inline void split_page_count(int level) { }
Signature · 1 line
2.2.2
#4 lore raw

[tip:x86/mm] x86/mm: Simplify enabling direct_gbpages

x86/mm: Simplify enabling direct_gbpages
Commit-ID:  e5008abe929c160d36e44b8c2b644d4330d2e389
Gitweb:     http://git.kernel.org/tip/e5008abe929c160d36e44b8c2b644d4330d2e389
Author:     Luis R. Rodriguez <[email protected]>
AuthorDate: Wed, 4 Mar 2015 17:24:12 -0800
Committer:  Ingo Molnar <[email protected]>
CommitDate: Thu, 5 Mar 2015 08:02:12 +0100

x86/mm: Simplify enabling direct_gbpages

direct_gbpages can be force enabled as an early parameter but not really have taken effect when DEBUG_PAGEALLOC or KMEMCHECK is enabled. You can also enable direct_gbpages right now if you have an x86_64 architecture but your CPU doesn't really have support for this feature. In both cases PG_LEVEL_1G won't actually be enabled but direct_gbpages is used in other areas under the assumptions that PG_LEVEL_1G was set. Fix this by putting together all requirements which make this feature sensible to enable under, and only enable both finally flipping on PG_LEVEL_1G and leaving PG_LEVEL_1G set when this is true.

We only enable this feature then to be possible on sensible builds defined by the new ENABLE_DIRECT_GBPAGES. If the CPU has support for it you can either enable this by using the DIRECT_GBPAGES option or using the early kernel parameter. If a platform had support for this you can always force disable it as well.

Cc Andrew Morton <[email protected]>
Cc Andy Lutomirski <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Dave Hansen <[email protected]>
Cc David Vrabel <[email protected]>
Cc Dexuan Cui <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc H. Peter Anvin <[email protected]>
Cc Jan Beulich <[email protected]>
Cc Joonsoo Kim <[email protected]>
Cc Juergen Gross <[email protected]>
Cc Linus Torvalds <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Thomas Gleixner <[email protected]>
Cc Tony Lindgren <[email protected]>
Cc Toshi Kani <[email protected]>
Cc Vlastimil Babka <[email protected]>
Cc Xishi Qiu <[email protected]>
---
 arch/x86/Kconfig       | 18 +++++++++++++-----
 arch/x86/mm/init.c     | 17 +++++++++--------
 arch/x86/mm/pageattr.c |  2 --
 3 files changed, 22 insertions(+), 15 deletions(-)
arch/x86/Kconfig +13 -5
index c2fb8a8..4d06e1c 100644
@@ -1299,14 +1299,22 @@ config ARCH_DMA_ADDR_T_64BIT
 	def_bool y
 	depends on X86_64 || HIGHMEM64G
 
+config ENABLE_DIRECT_GBPAGES
+	def_bool y
+	depends on X86_64 && !DEBUG_PAGEALLOC && !KMEMCHECK
+
 config DIRECT_GBPAGES
 	bool "Enable 1GB pages for kernel pagetables" if EXPERT
 	default y
-	depends on X86_64
-	---help---
-	  Allow the kernel linear mapping to use 1GB pages on CPUs that
-	  support it. This can improve the kernel's performance a tiny bit by
-	  reducing TLB pressure. If in doubt, say "Y".
+	depends on ENABLE_DIRECT_GBPAGES
+	---help---
+	  Enable by default the kernel linear mapping to use 1GB pages on CPUs
+	  that support it. This can improve the kernel's performance a tiny bit
+	  by reducing TLB pressure. If in doubt, say "Y". If you've disabled
+	  option but your platform is capable of handling support for this
+	  you can use the gbpages kernel parameter. Likewise if you've enabled
+	  this but you'd like to force disable this option you can use the
+	  nogbpages kernel parameter.
 
 # Common NUMA Features
 config NUMA
arch/x86/mm/init.c +9 -8
index 74f2b37..2ce2c8e 100644
@@ -131,16 +131,21 @@ void  __init early_alloc_pgt_buf(void)
 
 int after_bootmem;
 
+static int page_size_mask;
+
 int direct_gbpages = IS_ENABLED(CONFIG_DIRECT_GBPAGES);
 
 static void __init init_gbpages(void)
 {
-#ifdef CONFIG_X86_64
-	if (direct_gbpages && cpu_has_gbpages)
+	if (!IS_ENABLED(CONFIG_ENABLE_DIRECT_GBPAGES)) {
+		direct_gbpages = 0;
+		return;
+	}
+	if (direct_gbpages && cpu_has_gbpages) {
 		printk(KERN_INFO "Using GB pages for direct mapping\n");
-	else
+		page_size_mask |= 1 << PG_LEVEL_1G;
+	} else
 		direct_gbpages = 0;
-#endif
 }
 
 struct map_range {
@@ -149,8 +154,6 @@ struct map_range {
 	unsigned page_size_mask;
 };
 
-static int page_size_mask;
-
 static void __init probe_page_size_mask(void)
 {
 	init_gbpages();
@@ -161,8 +164,6 @@ static void __init probe_page_size_mask(void)
 	 * This will simplify cpa(), which otherwise needs to support splitting
 	 * large pages into small in interrupt context, etc.
 	 */
-	if (direct_gbpages)
-		page_size_mask |= 1 << PG_LEVEL_1G;
 	if (cpu_has_pse)
 		page_size_mask |= 1 << PG_LEVEL_2M;
 #endif
arch/x86/mm/pageattr.c +0 -2
index 81e8282..89af288 100644
@@ -81,11 +81,9 @@ void arch_report_meminfo(struct seq_file *m)
 	seq_printf(m, "DirectMap4M:    %8lu kB\n",
 			direct_pages_count[PG_LEVEL_2M] << 12);
 #endif
-#ifdef CONFIG_X86_64
 	if (direct_gbpages)
 		seq_printf(m, "DirectMap1G:    %8lu kB\n",
 			direct_pages_count[PG_LEVEL_1G] << 20);
-#endif
 }
 #else
 static inline void split_page_count(int level) { }
#5 lore raw

RFC 3/4 init.h: add early_param_on_off()

In reply to Luis R. Rodriguez

From: "Luis R. Rodriguez" <[email protected]>

At times all you need is a kconfig variable to enable a feature, by default but you may want to also enable / disable it through a kernel parameter. In such cases the parameter routines to turn the thing on / off are really simple. Just use a wrapper for this, it lets us generalize the code and makes it easier to associate parameters with related kernel configuration options.

Cc Greg Kroah-Hartman <[email protected]>
Cc Tony Lindgren <[email protected]>
Cc Thomas Gleixner <[email protected]>
Cc Ingo Molnar <[email protected]>
Cc "H. Peter Anvin" <[email protected]>
Cc Juergen Gross <[email protected]>
Cc Andy Lutomirski <[email protected]>
Cc Toshi Kani <[email protected]>
Cc Dave Hansen <[email protected]>
Cc Jan Beulich <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Xishi Qiu <[email protected]>
Cc Andrew Morton <[email protected]>
Cc David Vrabel <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Vlastimil Babka <[email protected]>
Cc Joonsoo Kim <[email protected]>
Cc Dexuan Cui <[email protected]>
---
 include/linux/init.h | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
include/linux/init.h +15 -0
index 2df8e8d..bc11ff9 100644
@@ -268,6 +268,21 @@ struct obs_kernel_param {
 #define early_param(str, fn)					\
 	__setup_param(str, fn, fn, 1)
 
+#define early_param_on_off(str_on, str_off, var, config)			\
+	int var = IS_ENABLED(config);				\
+	static int __init parse_##var##_on(char *arg)		\
+	{							\
+		var = 1;					\
+		return 0;					\
+	}							\
+	static int __init parse_##var##_off(char *arg)		\
+	{							\
+		var = 0;					\
+		return 0;					\
+	}							\
+	__setup_param(str_on, parse_##var##_on, parse_##var##_on, 1); \
+	__setup_param(str_off, parse_##var##_off, parse_##var##_off, 1)
+
 /* Relies on boot_command_line being set */
 void __init parse_early_param(void);
 void __init parse_early_options(char *cmdline);
Signature · 1 line
2.2.2
#6 lore raw

[tip:x86/mm] init.h: Add early_param_on_off()

init.h: Add early_param_on_off()
Commit-ID:  bfb33bad83f650f265ed65cbfe8352b7c3ce8c76
Gitweb:     http://git.kernel.org/tip/bfb33bad83f650f265ed65cbfe8352b7c3ce8c76
Author:     Luis R. Rodriguez <[email protected]>
AuthorDate: Wed, 4 Mar 2015 17:24:13 -0800
Committer:  Ingo Molnar <[email protected]>
CommitDate: Thu, 5 Mar 2015 08:02:12 +0100

init.h: Add early_param_on_off()

At times all you need is a kconfig variable to enable a feature, by default but you may want to also enable / disable it through a kernel parameter. In such cases the parameter routines to turn the thing on / off are really simple. Just use a wrapper for this, it lets us generalize the code and makes it easier to associate parameters with related kernel configuration options.

Cc Andrew Morton <[email protected]>
Cc Andy Lutomirski <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Dave Hansen <[email protected]>
Cc David Vrabel <[email protected]>
Cc Dexuan Cui <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc H. Peter Anvin <[email protected]>
Cc Jan Beulich <[email protected]>
Cc Joonsoo Kim <[email protected]>
Cc Juergen Gross <[email protected]>
Cc Linus Torvalds <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Thomas Gleixner <[email protected]>
Cc Tony Lindgren <[email protected]>
Cc Toshi Kani <[email protected]>
Cc Vlastimil Babka <[email protected]>
Cc Xishi Qiu <[email protected]>
---
 include/linux/init.h | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
include/linux/init.h +15 -0
index 2df8e8d..bc11ff9 100644
@@ -268,6 +268,21 @@ struct obs_kernel_param {
 #define early_param(str, fn)					\
 	__setup_param(str, fn, fn, 1)
 
+#define early_param_on_off(str_on, str_off, var, config)			\
+	int var = IS_ENABLED(config);				\
+	static int __init parse_##var##_on(char *arg)		\
+	{							\
+		var = 1;					\
+		return 0;					\
+	}							\
+	static int __init parse_##var##_off(char *arg)		\
+	{							\
+		var = 0;					\
+		return 0;					\
+	}							\
+	__setup_param(str_on, parse_##var##_on, parse_##var##_on, 1); \
+	__setup_param(str_off, parse_##var##_off, parse_##var##_off, 1)
+
 /* Relies on boot_command_line being set */
 void __init parse_early_param(void);
 void __init parse_early_options(char *cmdline);
#7 lore raw

RFC 4/4 x86: mm: use early_param_on_off() for direct_gbpages

In reply to Luis R. Rodriguez

From: "Luis R. Rodriguez" <[email protected]>

The enabler / disabler is pretty simple, just use the provided wrappers, this lets us easily relate the variable to the associated Kconfig entry.

Cc Greg Kroah-Hartman <[email protected]>
Cc Tony Lindgren <[email protected]>
Cc Thomas Gleixner <[email protected]>
Cc Ingo Molnar <[email protected]>
Cc "H. Peter Anvin" <[email protected]>
Cc Juergen Gross <[email protected]>
Cc Andy Lutomirski <[email protected]>
Cc Toshi Kani <[email protected]>
Cc Dave Hansen <[email protected]>
Cc Jan Beulich <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Xishi Qiu <[email protected]>
Cc Andrew Morton <[email protected]>
Cc David Vrabel <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Vlastimil Babka <[email protected]>
Cc Joonsoo Kim <[email protected]>
Cc Dexuan Cui <[email protected]>
---
 arch/x86/mm/init.c    |  3 ++-
 arch/x86/mm/init_64.c | 14 --------------
 2 files changed, 2 insertions(+), 15 deletions(-)
arch/x86/mm/init.c +2 -1
index 8d375ba..ce5db80 100644
@@ -133,7 +133,8 @@ int after_bootmem;
 
 static int page_size_mask;
 
-int direct_gbpages = IS_ENABLED(CONFIG_DIRECT_GBPAGES);
+early_param_on_off("gbpages", "nogbpages",
+		   direct_gbpages, CONFIG_DIRECT_GBPAGES);
 
 static void __init init_gbpages(void)
 {
arch/x86/mm/init_64.c +0 -14
index 30eb05a..3fba623 100644
@@ -130,20 +130,6 @@ int kernel_ident_mapping_init(struct x86_mapping_info *info, pgd_t *pgd_page,
 	return 0;
 }
 
-static int __init parse_direct_gbpages_off(char *arg)
-{
-	direct_gbpages = 0;
-	return 0;
-}
-early_param("nogbpages", parse_direct_gbpages_off);
-
-static int __init parse_direct_gbpages_on(char *arg)
-{
-	direct_gbpages = 1;
-	return 0;
-}
-early_param("gbpages", parse_direct_gbpages_on);
-
 /*
  * NOTE: pagetable_init alloc all the fixmap pagetables contiguous on the
  * physical space so we can cache the place of the first one and move
Signature · 1 line
2.2.2
#8 lore raw

[tip:x86/mm] x86/mm: Use early_param_on_off() for direct_gbpages

x86/mm: Use early_param_on_off() for direct_gbpages
Commit-ID:  73c8c861dc5bddf1b24c6aeffee2292c96cf8db2
Gitweb:     http://git.kernel.org/tip/73c8c861dc5bddf1b24c6aeffee2292c96cf8db2
Author:     Luis R. Rodriguez <[email protected]>
AuthorDate: Wed, 4 Mar 2015 17:24:14 -0800
Committer:  Ingo Molnar <[email protected]>
CommitDate: Thu, 5 Mar 2015 08:02:12 +0100

x86/mm: Use early_param_on_off() for direct_gbpages

The enabler / disabler is pretty simple, just use the provided wrappers, this lets us easily relate the variable to the associated Kconfig entry.

Cc Andrew Morton <[email protected]>
Cc Andy Lutomirski <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Dave Hansen <[email protected]>
Cc David Vrabel <[email protected]>
Cc Dexuan Cui <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc H. Peter Anvin <[email protected]>
Cc Jan Beulich <[email protected]>
Cc Joonsoo Kim <[email protected]>
Cc Juergen Gross <[email protected]>
Cc Linus Torvalds <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Thomas Gleixner <[email protected]>
Cc Tony Lindgren <[email protected]>
Cc Toshi Kani <[email protected]>
Cc Vlastimil Babka <[email protected]>
Cc Xishi Qiu <[email protected]>
---
 arch/x86/mm/init.c    |  3 ++-
 arch/x86/mm/init_64.c | 14 --------------
 2 files changed, 2 insertions(+), 15 deletions(-)
arch/x86/mm/init.c +2 -1
index 2ce2c8e..c35ba8b 100644
@@ -133,7 +133,8 @@ int after_bootmem;
 
 static int page_size_mask;
 
-int direct_gbpages = IS_ENABLED(CONFIG_DIRECT_GBPAGES);
+early_param_on_off("gbpages", "nogbpages",
+		   direct_gbpages, CONFIG_DIRECT_GBPAGES);
 
 static void __init init_gbpages(void)
 {
arch/x86/mm/init_64.c +0 -14
index 30eb05a..3fba623 100644
@@ -130,20 +130,6 @@ int kernel_ident_mapping_init(struct x86_mapping_info *info, pgd_t *pgd_page,
 	return 0;
 }
 
-static int __init parse_direct_gbpages_off(char *arg)
-{
-	direct_gbpages = 0;
-	return 0;
-}
-early_param("nogbpages", parse_direct_gbpages_off);
-
-static int __init parse_direct_gbpages_on(char *arg)
-{
-	direct_gbpages = 1;
-	return 0;
-}
-early_param("gbpages", parse_direct_gbpages_on);
-
 /*
  * NOTE: pagetable_init alloc all the fixmap pagetables contiguous on the
  * physical space so we can cache the place of the first one and move
#9 lore raw

[PATCH 5/4] x86/mm: Further simplify 1 GB kernel linear mappings handling

In reply to Luis R. Rodriguez

It's a bit pointless to allow Kconfig configuration for 1GB kernel mappings, it's already hidden behind a 'default y' and CONFIG_EXPERT.

Remove this complication and simplify the code by renaming CONFIG_ENABLE_DIRECT_GBPAGES to CONFIG_X86_DIRECT_GBPAGES and document the DEBUG_PAGE_ALLOC and KMEMCHECK quirks.

Cc Luis R. Rodriguez <[email protected]>
Cc Andrew Morton <[email protected]>
Cc Andy Lutomirski <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Dave Hansen <[email protected]>
Cc David Vrabel <[email protected]>
Cc Dexuan Cui <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc H. Peter Anvin <[email protected]>
Cc Jan Beulich <[email protected]>
Cc Joonsoo Kim <[email protected]>
Cc Juergen Gross <[email protected]>
Cc Linus Torvalds <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Thomas Gleixner <[email protected]>
Cc Tony Lindgren <[email protected]>
Cc Toshi Kani <[email protected]>
Cc Vlastimil Babka <[email protected]>
Cc Xishi Qiu <[email protected]>
---
 arch/x86/Kconfig   | 23 +++++++----------------
 arch/x86/mm/init.c |  7 +------
 2 files changed, 8 insertions(+), 22 deletions(-)
arch/x86/Kconfig +7 -16
index 4d06e1c8294a..54d528a37ff4 100644
@@ -1299,22 +1299,13 @@ config ARCH_DMA_ADDR_T_64BIT
 	def_bool y
 	depends on X86_64 || HIGHMEM64G
 
-config ENABLE_DIRECT_GBPAGES
-	def_bool y
-	depends on X86_64 && !DEBUG_PAGEALLOC && !KMEMCHECK
-
-config DIRECT_GBPAGES
-	bool "Enable 1GB pages for kernel pagetables" if EXPERT
-	default y
-	depends on ENABLE_DIRECT_GBPAGES
-	---help---
-	  Enable by default the kernel linear mapping to use 1GB pages on CPUs
-	  that support it. This can improve the kernel's performance a tiny bit
-	  by reducing TLB pressure. If in doubt, say "Y". If you've disabled
-	  option but your platform is capable of handling support for this
-	  you can use the gbpages kernel parameter. Likewise if you've enabled
-	  this but you'd like to force disable this option you can use the
-	  nogbpages kernel parameter.
+config X86_DIRECT_GBPAGES
+	def_bool (X86_64 && !DEBUG_PAGEALLOC && !KMEMCHECK)
+	---help---
+	  Certain kernel features effectively disable kernel
+	  linear 1 GB mappings (even if the CPU otherwise
+	  supports them), so don't confuse the user by printing
+	  that we have them enabled.
 
 # Common NUMA Features
 config NUMA
arch/x86/mm/init.c +1 -6
index c35ba8bce7cb..8704153f2675 100644
@@ -133,15 +133,10 @@ int after_bootmem;
 
 static int page_size_mask;
 
-early_param_on_off("gbpages", "nogbpages",
-		   direct_gbpages, CONFIG_DIRECT_GBPAGES);
+early_param_on_off("gbpages", "nogbpages", direct_gbpages, CONFIG_X86_DIRECT_GBPAGES);
 
 static void __init init_gbpages(void)
 {
-	if (!IS_ENABLED(CONFIG_ENABLE_DIRECT_GBPAGES)) {
-		direct_gbpages = 0;
-		return;
-	}
 	if (direct_gbpages && cpu_has_gbpages) {
 		printk(KERN_INFO "Using GB pages for direct mapping\n");
 		page_size_mask |= 1 << PG_LEVEL_1G;
#10 lore raw

Re: [PATCH 5/4] x86/mm: Further simplify 1 GB kernel linear mappings handling

Quoted 53 lines
Quoted 1 line
Quoted 1 line · On 05.03.15 at 08:23, <[email protected]> wrote:

It's a bit pointless to allow Kconfig configuration for 1GB kernel mappings, it's already hidden behind a 'default y' and CONFIG_EXPERT.

Remove this complication and simplify the code by renaming CONFIG_ENABLE_DIRECT_GBPAGES to CONFIG_X86_DIRECT_GBPAGES and document the DEBUG_PAGE_ALLOC and KMEMCHECK quirks.

Cc Luis R. Rodriguez <[email protected]>
Cc Andrew Morton <[email protected]>
Cc Andy Lutomirski <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Dave Hansen <[email protected]>
Cc David Vrabel <[email protected]>
Cc Dexuan Cui <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc H. Peter Anvin <[email protected]>
Cc Jan Beulich <[email protected]>
Cc Joonsoo Kim <[email protected]>
Cc Juergen Gross <[email protected]>
Cc Linus Torvalds <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Thomas Gleixner <[email protected]>
Cc Tony Lindgren <[email protected]>
Cc Toshi Kani <[email protected]>
Cc Vlastimil Babka <[email protected]>
Cc Xishi Qiu <[email protected]>
---
 arch/x86/Kconfig   | 23 +++++++----------------
 arch/x86/mm/init.c |  7 +------
 2 files changed, 8 insertions(+), 22 deletions(-)
arch/x86/Kconfig +0 -8
index 4d06e1c8294a..54d528a37ff4 100644
@@ -1299,22 +1299,13 @@ config ARCH_DMA_ADDR_T_64BIT
 	def_bool y
 	depends on X86_64 || HIGHMEM64G
 
-config ENABLE_DIRECT_GBPAGES
-	def_bool y
-	depends on X86_64 && !DEBUG_PAGEALLOC && !KMEMCHECK
-
-config DIRECT_GBPAGES
-	bool "Enable 1GB pages for kernel pagetables" if EXPERT
-	default y
-	depends on ENABLE_DIRECT_GBPAGES

arch/x86/Kconfig config ARCH_DMA_ADDR_T_64BIT · line 1303

Quoted 10 lines
arch/x86/Kconfig +2 -8
-	---help---
-	  Enable by default the kernel linear mapping to use 1GB pages on CPUs
-	  that support it. This can improve the kernel's performance a tiny bit
-	  by reducing TLB pressure. If in doubt, say "Y". If you've disabled
-	  option but your platform is capable of handling support for this
-	  you can use the gbpages kernel parameter. Likewise if you've enabled
-	  this but you'd like to force disable this option you can use the
-	  nogbpages kernel parameter.
+config X86_DIRECT_GBPAGES
+	def_bool (X86_64 && !DEBUG_PAGEALLOC && !KMEMCHECK)

config X86_DIRECT_GBPAGES

	def_bool y
	depends on X86_64 && !DEBUG_PAGEALLOC && !KMEMCHECK

or else it'll leave a pointless

# CONFIG_X86_DIRECT_GBPAGES is not set

in .config-s where the dependencies are not met.

Jan

#11 lore raw

Re: [PATCH 5/4] x86/mm: Further simplify 1 GB kernel linear mappings handling

Quoted 4 lines · Jan Beulich

arch/x86/Kconfig config ARCH_DMA_ADDR_T_64BIT · line 1303

Quoted 2 lines
arch/x86/Kconfig +2 -0
+config X86_DIRECT_GBPAGES
+	def_bool (X86_64 && !DEBUG_PAGEALLOC && !KMEMCHECK)

config X86_DIRECT_GBPAGES

Quoted 8 lines
	def_bool y
	depends on X86_64 && !DEBUG_PAGEALLOC && !KMEMCHECK

or else it'll leave a pointless

# CONFIG_X86_DIRECT_GBPAGES is not set

in .config-s where the dependencies are not met.

Ok, fixed - thanks!

Ingo

#12 lore raw

[PATCH 6/4] x86/mm: Simplify probe_page_size_mask()

In reply to Luis R. Rodriguez

Now that we've simplified the gbpages config space, move the 'page_size_mask' initialization into probe_page_size_mask(), right next to the PSE and PGE enablement lines.

Cc Luis R. Rodriguez <[email protected]>
Cc Andrew Morton <[email protected]>
Cc Andy Lutomirski <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Dave Hansen <[email protected]>
Cc David Vrabel <[email protected]>
Cc Dexuan Cui <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc H. Peter Anvin <[email protected]>
Cc Jan Beulich <[email protected]>
Cc Joonsoo Kim <[email protected]>
Cc Juergen Gross <[email protected]>
Cc Linus Torvalds <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Thomas Gleixner <[email protected]>
Cc Tony Lindgren <[email protected]>
Cc Toshi Kani <[email protected]>
Cc Vlastimil Babka <[email protected]>
Cc Xishi Qiu <[email protected]>
---
 arch/x86/mm/init.c | 23 ++++++++++-------------
 1 file changed, 10 insertions(+), 13 deletions(-)
arch/x86/mm/init.c +10 -13
index 8704153f2675..6dc85d51cd98 100644
@@ -131,29 +131,18 @@ void  __init early_alloc_pgt_buf(void)
 
 int after_bootmem;
 
-static int page_size_mask;
-
 early_param_on_off("gbpages", "nogbpages", direct_gbpages, CONFIG_X86_DIRECT_GBPAGES);
 
-static void __init init_gbpages(void)
-{
-	if (direct_gbpages && cpu_has_gbpages) {
-		printk(KERN_INFO "Using GB pages for direct mapping\n");
-		page_size_mask |= 1 << PG_LEVEL_1G;
-	} else
-		direct_gbpages = 0;
-}
-
 struct map_range {
 	unsigned long start;
 	unsigned long end;
 	unsigned page_size_mask;
 };
 
+static int page_size_mask;
+
 static void __init probe_page_size_mask(void)
 {
-	init_gbpages();
-
 #if !defined(CONFIG_DEBUG_PAGEALLOC) && !defined(CONFIG_KMEMCHECK)
 	/*
 	 * For CONFIG_DEBUG_PAGEALLOC, identity mapping will use small pages.
@@ -173,6 +162,14 @@ static void __init probe_page_size_mask(void)
 		cr4_set_bits_and_update_boot(X86_CR4_PGE);
 		__supported_pte_mask |= _PAGE_GLOBAL;
 	}
+
+	/* Enable 1 GB linear kernel mappings if available: */
+	if (direct_gbpages && cpu_has_gbpages) {
+		printk(KERN_INFO "Using GB pages for direct mapping\n");
+		page_size_mask |= 1 << PG_LEVEL_1G;
+	} else {
+		direct_gbpages = 0;
+	}
 }
 
 #ifdef CONFIG_X86_32
#13 lore raw

Re: [PATCH 6/4] x86/mm: Simplify probe_page_size_mask()

Quoted 69 lines · Ingo Molnar

Now that we've simplified the gbpages config space, move the 'page_size_mask' initialization into probe_page_size_mask(), right next to the PSE and PGE enablement lines.

Cc Luis R. Rodriguez <[email protected]>
Cc Andrew Morton <[email protected]>
Cc Andy Lutomirski <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Dave Hansen <[email protected]>
Cc David Vrabel <[email protected]>
Cc Dexuan Cui <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc H. Peter Anvin <[email protected]>
Cc Jan Beulich <[email protected]>
Cc Joonsoo Kim <[email protected]>
Cc Juergen Gross <[email protected]>
Cc Linus Torvalds <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Thomas Gleixner <[email protected]>
Cc Tony Lindgren <[email protected]>
Cc Toshi Kani <[email protected]>
Cc Vlastimil Babka <[email protected]>
Cc Xishi Qiu <[email protected]>
---
  arch/x86/mm/init.c | 23 ++++++++++-------------
  1 file changed, 10 insertions(+), 13 deletions(-)
arch/x86/mm/init.c +2 -13
index 8704153f2675..6dc85d51cd98 100644
@@ -131,29 +131,18 @@ void  __init early_alloc_pgt_buf(void)
 
  int after_bootmem;
 
-static int page_size_mask;
-
  early_param_on_off("gbpages", "nogbpages", direct_gbpages, CONFIG_X86_DIRECT_GBPAGES);
 
-static void __init init_gbpages(void)
-{
-	if (direct_gbpages && cpu_has_gbpages) {
-		printk(KERN_INFO "Using GB pages for direct mapping\n");
-		page_size_mask |= 1 << PG_LEVEL_1G;
-	} else
-		direct_gbpages = 0;
-}
-
  struct map_range {
  	unsigned long start;
  	unsigned long end;
  	unsigned page_size_mask;
  };
 
+static int page_size_mask;
+
  static void __init probe_page_size_mask(void)
  {
-	init_gbpages();
-
  #if !defined(CONFIG_DEBUG_PAGEALLOC) && !defined(CONFIG_KMEMCHECK)
  	/*
  	 * For CONFIG_DEBUG_PAGEALLOC, identity mapping will use small pages.

arch/x86/mm/init.c static void __init probe_page_size_mask(void) · line 168

Quoted 7 lines
arch/x86/mm/init.c +4 -0
@@ -173,6 +162,14 @@ static void __init probe_page_size_mask(void)
  		cr4_set_bits_and_update_boot(X86_CR4_PGE);
  		__supported_pte_mask |= _PAGE_GLOBAL;
  	}
+
+	/* Enable 1 GB linear kernel mappings if available: */
+	if (direct_gbpages && cpu_has_gbpages) {
+		printk(KERN_INFO "Using GB pages for direct mapping\n");

pr_info()?

Quoted 13 lines
arch/x86/mm/init.c +4 -1
+		page_size_mask |= 1 << PG_LEVEL_1G;
+	} else {
+		direct_gbpages = 0;
+	}
  }
 
  #ifdef CONFIG_X86_32
--

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#14 lore raw

Re: [PATCH 6/4] x86/mm: Simplify probe_page_size_mask()

Quoted 71 lines · Juergen Gross
Quoted 70 lines · Ingo Molnar

Now that we've simplified the gbpages config space, move the 'page_size_mask' initialization into probe_page_size_mask(), right next to the PSE and PGE enablement lines.

Cc Luis R. Rodriguez <[email protected]>
Cc Andrew Morton <[email protected]>
Cc Andy Lutomirski <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Dave Hansen <[email protected]>
Cc David Vrabel <[email protected]>
Cc Dexuan Cui <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc H. Peter Anvin <[email protected]>
Cc Jan Beulich <[email protected]>
Cc Joonsoo Kim <[email protected]>
Cc Juergen Gross <[email protected]>
Cc Linus Torvalds <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Thomas Gleixner <[email protected]>
Cc Tony Lindgren <[email protected]>
Cc Toshi Kani <[email protected]>
Cc Vlastimil Babka <[email protected]>
Cc Xishi Qiu <[email protected]>
---
 arch/x86/mm/init.c | 23 ++++++++++-------------
 1 file changed, 10 insertions(+), 13 deletions(-)
arch/x86/mm/init.c +2 -13
index 8704153f2675..6dc85d51cd98 100644
@@ -131,29 +131,18 @@ void  __init early_alloc_pgt_buf(void)
 
 int after_bootmem;
 
-static int page_size_mask;
-
 early_param_on_off("gbpages", "nogbpages", direct_gbpages, CONFIG_X86_DIRECT_GBPAGES);
 
-static void __init init_gbpages(void)
-{
-	if (direct_gbpages && cpu_has_gbpages) {
-		printk(KERN_INFO "Using GB pages for direct mapping\n");
-		page_size_mask |= 1 << PG_LEVEL_1G;
-	} else
-		direct_gbpages = 0;
-}
-
 struct map_range {
 	unsigned long start;
 	unsigned long end;
 	unsigned page_size_mask;
 };
 
+static int page_size_mask;
+
 static void __init probe_page_size_mask(void)
 {
-	init_gbpages();
-
 #if !defined(CONFIG_DEBUG_PAGEALLOC) && !defined(CONFIG_KMEMCHECK)
 	/*
 	 * For CONFIG_DEBUG_PAGEALLOC, identity mapping will use small pages.
@@ -173,6 +162,14 @@ static void __init probe_page_size_mask(void)
 		cr4_set_bits_and_update_boot(X86_CR4_PGE);
Quoted 8 lines

arch/x86/mm/init.c static void __init probe_page_size_mask(void) · line 168

Quoted 6 lines
arch/x86/mm/init.c +4 -0
 		__supported_pte_mask |= _PAGE_GLOBAL;
 	}
+
+	/* Enable 1 GB linear kernel mappings if available: */
+	if (direct_gbpages && cpu_has_gbpages) {
+		printk(KERN_INFO "Using GB pages for direct mapping\n");

pr_info()?

Yeah - probably in a separate patch, as there's three other KERN_ users in arch/x86/mm/init.c.

Thanks,

Ingo

#15 lore raw

[PATCH 7/4] init.h: Clean up the __setup()/early_param() macros

In reply to Luis R. Rodriguez

Make it all a bit easier on the eyes:

- Move the __setup_param() lines right after their init functions
- Use consistent vertical spacing
- Use more horizontal spacing to make it look like regular C code
- Use standard comment style

Cc Luis R. Rodriguez <[email protected]>
Cc Andrew Morton <[email protected]>
Cc Andy Lutomirski <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Dave Hansen <[email protected]>
Cc David Vrabel <[email protected]>
Cc Dexuan Cui <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc H. Peter Anvin <[email protected]>
Cc Jan Beulich <[email protected]>
Cc Joonsoo Kim <[email protected]>
Cc Juergen Gross <[email protected]>
Cc Linus Torvalds <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Thomas Gleixner <[email protected]>
Cc Tony Lindgren <[email protected]>
Cc Toshi Kani <[email protected]>
Cc Vlastimil Babka <[email protected]>
Cc Xishi Qiu <[email protected]>
---
 include/linux/init.h | 49 +++++++++++++++++++++++++++----------------------
 1 file changed, 27 insertions(+), 22 deletions(-)
include/linux/init.h +27 -22
index bc11ff96f336..21b6d768edd7 100644
@@ -253,34 +253,39 @@ struct obs_kernel_param {
  * obs_kernel_param "array" too far apart in .init.setup.
  */
 #define __setup_param(str, unique_id, fn, early)			\
-	static const char __setup_str_##unique_id[] __initconst	\
-		__aligned(1) = str; \
-	static struct obs_kernel_param __setup_##unique_id	\
-		__used __section(.init.setup)			\
-		__attribute__((aligned((sizeof(long)))))	\
+	static const char __setup_str_##unique_id[] __initconst		\
+		__aligned(1) = str; 					\
+	static struct obs_kernel_param __setup_##unique_id		\
+		__used __section(.init.setup)				\
+		__attribute__((aligned((sizeof(long)))))		\
 		= { __setup_str_##unique_id, fn, early }
 
-#define __setup(str, fn)					\
+#define __setup(str, fn)						\
 	__setup_param(str, fn, fn, 0)
 
-/* NOTE: fn is as per module_param, not __setup!  Emits warning if fn
- * returns non-zero. */
-#define early_param(str, fn)					\
+/*
+ * NOTE: fn is as per module_param, not __setup!
+ * Emits warning if fn returns non-zero.
+ */
+#define early_param(str, fn)						\
 	__setup_param(str, fn, fn, 1)
 
-#define early_param_on_off(str_on, str_off, var, config)			\
-	int var = IS_ENABLED(config);				\
-	static int __init parse_##var##_on(char *arg)		\
-	{							\
-		var = 1;					\
-		return 0;					\
-	}							\
-	static int __init parse_##var##_off(char *arg)		\
-	{							\
-		var = 0;					\
-		return 0;					\
-	}							\
-	__setup_param(str_on, parse_##var##_on, parse_##var##_on, 1); \
+#define early_param_on_off(str_on, str_off, var, config)		\
+									\
+	int var = IS_ENABLED(config);					\
+									\
+	static int __init parse_##var##_on(char *arg)			\
+	{								\
+		var = 1;						\
+		return 0;						\
+	}								\
+	__setup_param(str_on, parse_##var##_on, parse_##var##_on, 1);	\
+									\
+	static int __init parse_##var##_off(char *arg)			\
+	{								\
+		var = 0;						\
+		return 0;						\
+	}								\
 	__setup_param(str_off, parse_##var##_off, parse_##var##_off, 1)
 
 /* Relies on boot_command_line being set */
#16 lore raw

PATCH 1/1 x86/mm/pat: Initialize __cachemode2pte_tbl[] and __pte2cachemode_tbl[] in a bit more readable fashion

In reply to Luis R. Rodriguez

( So this patch is not directly related to gbpages, but while reading
arch/x86/mm/init.c I could not resist ... )

=======================>

The initialization of these two arrays is a bit difficult to follow:
restructure it optically so that a 2D structure shows which bit in the PTE is set and which not.

Also improve on comments a bit.

No code or data changed:

# arch/x86/mm/init.o:

text data bss dec hex filename

   4585     424   29776   34785    87e1 init.o.before
   4585     424   29776   34785    87e1 init.o.after

md5:
a82e11ff58bcfd0af3a94662a701f65d init.o.before.asm a82e11ff58bcfd0af3a94662a701f65d init.o.after.asm

Cc Andy Lutomirski <[email protected]>
Cc Dave Hansen <[email protected]>
Cc Jan Beulich <[email protected]>
Cc Juergen Gross <[email protected]>
Cc Linus Torvalds <[email protected]>
Cc Luis R. Rodriguez <[email protected]>
Cc Toshi Kani <[email protected]>
---
 arch/x86/mm/init.c | 40 ++++++++++++++++++++++------------------
 1 file changed, 22 insertions(+), 18 deletions(-)
arch/x86/mm/init.c +22 -18
index 6dc85d51cd98..4469563f8c3b 100644
@@ -29,29 +29,33 @@
 
 /*
  * Tables translating between page_cache_type_t and pte encoding.
- * Minimal supported modes are defined statically, modified if more supported
- * cache modes are available.
- * Index into __cachemode2pte_tbl is the cachemode.
- * Index into __pte2cachemode_tbl are the caching attribute bits of the pte
- * (_PAGE_PWT, _PAGE_PCD, _PAGE_PAT) at index bit positions 0, 1, 2.
+ *
+ * Minimal supported modes are defined statically, they are modified
+ * during bootup if more supported cache modes are available.
+ *
+ *   Index into __cachemode2pte_tbl[] is the cachemode.
+ *
+ *   Index into __pte2cachemode_tbl[] are the caching attribute bits of the pte
+ *   (_PAGE_PWT, _PAGE_PCD, _PAGE_PAT) at index bit positions 0, 1, 2.
  */
 uint16_t __cachemode2pte_tbl[_PAGE_CACHE_MODE_NUM] = {
-	[_PAGE_CACHE_MODE_WB]		= 0,
-	[_PAGE_CACHE_MODE_WC]		= _PAGE_PWT,
-	[_PAGE_CACHE_MODE_UC_MINUS]	= _PAGE_PCD,
-	[_PAGE_CACHE_MODE_UC]		= _PAGE_PCD | _PAGE_PWT,
-	[_PAGE_CACHE_MODE_WT]		= _PAGE_PCD,
-	[_PAGE_CACHE_MODE_WP]		= _PAGE_PCD,
+	[_PAGE_CACHE_MODE_WB      ]	= 0         | 0        ,
+	[_PAGE_CACHE_MODE_WC      ]	= _PAGE_PWT | 0        ,
+	[_PAGE_CACHE_MODE_UC_MINUS]	= 0         | _PAGE_PCD,
+	[_PAGE_CACHE_MODE_UC      ]	= _PAGE_PWT | _PAGE_PCD,
+	[_PAGE_CACHE_MODE_WT      ]	= 0         | _PAGE_PCD,
+	[_PAGE_CACHE_MODE_WP      ]	= 0         | _PAGE_PCD,
 };
 EXPORT_SYMBOL(__cachemode2pte_tbl);
+
 uint8_t __pte2cachemode_tbl[8] = {
-	[__pte2cm_idx(0)] = _PAGE_CACHE_MODE_WB,
-	[__pte2cm_idx(_PAGE_PWT)] = _PAGE_CACHE_MODE_WC,
-	[__pte2cm_idx(_PAGE_PCD)] = _PAGE_CACHE_MODE_UC_MINUS,
-	[__pte2cm_idx(_PAGE_PWT | _PAGE_PCD)] = _PAGE_CACHE_MODE_UC,
-	[__pte2cm_idx(_PAGE_PAT)] = _PAGE_CACHE_MODE_WB,
-	[__pte2cm_idx(_PAGE_PWT | _PAGE_PAT)] = _PAGE_CACHE_MODE_WC,
-	[__pte2cm_idx(_PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,
+	[__pte2cm_idx( 0        | 0         | 0        )] = _PAGE_CACHE_MODE_WB,
+	[__pte2cm_idx(_PAGE_PWT | 0         | 0        )] = _PAGE_CACHE_MODE_WC,
+	[__pte2cm_idx( 0        | _PAGE_PCD | 0        )] = _PAGE_CACHE_MODE_UC_MINUS,
+	[__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | 0        )] = _PAGE_CACHE_MODE_UC,
+	[__pte2cm_idx( 0        | 0         | _PAGE_PAT)] = _PAGE_CACHE_MODE_WB,
+	[__pte2cm_idx(_PAGE_PWT | 0         | _PAGE_PAT)] = _PAGE_CACHE_MODE_WC,
+	[__pte2cm_idx(0         | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,
 	[__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC,
 };
 EXPORT_SYMBOL(__pte2cachemode_tbl);
Reviewed-by on v1 1/1
#17 lore raw

Re: [PATCH] x86/mm/pat: Initialize __cachemode2pte_tbl[] and __pte2cachemode_tbl[] in a bit more readable fashion

Quoted 24 lines · Ingo Molnar

( So this patch is not directly related to gbpages, but while reading
arch/x86/mm/init.c I could not resist ... )

=======================>

The initialization of these two arrays is a bit difficult to follow:
restructure it optically so that a 2D structure shows which bit in the PTE is set and which not.

Also improve on comments a bit.

No code or data changed:

   # arch/x86/mm/init.o:

    text    data     bss     dec     hex filename
    4585     424   29776   34785    87e1 init.o.before
    4585     424   29776   34785    87e1 init.o.after

md5:

    a82e11ff58bcfd0af3a94662a701f65d  init.o.before.asm
    a82e11ff58bcfd0af3a94662a701f65d  init.o.after.asm
Quoted 9 lines
Cc Andy Lutomirski <[email protected]>
Cc Dave Hansen <[email protected]>
Cc Jan Beulich <[email protected]>
Cc Juergen Gross <[email protected]>
Cc Linus Torvalds <[email protected]>
Cc Luis R. Rodriguez <[email protected]>
Cc Toshi Kani <[email protected]>
Quoted 66 lines
---
  arch/x86/mm/init.c | 40 ++++++++++++++++++++++------------------
  1 file changed, 22 insertions(+), 18 deletions(-)
arch/x86/mm/init.c +22 -19
index 6dc85d51cd98..4469563f8c3b 100644
@@ -29,29 +29,33 @@
 
  /*
   * Tables translating between page_cache_type_t and pte encoding.
- * Minimal supported modes are defined statically, modified if more supported
- * cache modes are available.
- * Index into __cachemode2pte_tbl is the cachemode.
- * Index into __pte2cachemode_tbl are the caching attribute bits of the pte
- * (_PAGE_PWT, _PAGE_PCD, _PAGE_PAT) at index bit positions 0, 1, 2.
+ *
+ * Minimal supported modes are defined statically, they are modified
+ * during bootup if more supported cache modes are available.
+ *
+ *   Index into __cachemode2pte_tbl[] is the cachemode.
+ *
+ *   Index into __pte2cachemode_tbl[] are the caching attribute bits of the pte
+ *   (_PAGE_PWT, _PAGE_PCD, _PAGE_PAT) at index bit positions 0, 1, 2.
   */
  uint16_t __cachemode2pte_tbl[_PAGE_CACHE_MODE_NUM] = {
-	[_PAGE_CACHE_MODE_WB]		= 0,
-	[_PAGE_CACHE_MODE_WC]		= _PAGE_PWT,
-	[_PAGE_CACHE_MODE_UC_MINUS]	= _PAGE_PCD,
-	[_PAGE_CACHE_MODE_UC]		= _PAGE_PCD | _PAGE_PWT,
-	[_PAGE_CACHE_MODE_WT]		= _PAGE_PCD,
-	[_PAGE_CACHE_MODE_WP]		= _PAGE_PCD,
+	[_PAGE_CACHE_MODE_WB      ]	= 0         | 0        ,
+	[_PAGE_CACHE_MODE_WC      ]	= _PAGE_PWT | 0        ,
+	[_PAGE_CACHE_MODE_UC_MINUS]	= 0         | _PAGE_PCD,
+	[_PAGE_CACHE_MODE_UC      ]	= _PAGE_PWT | _PAGE_PCD,
+	[_PAGE_CACHE_MODE_WT      ]	= 0         | _PAGE_PCD,
+	[_PAGE_CACHE_MODE_WP      ]	= 0         | _PAGE_PCD,
  };
  EXPORT_SYMBOL(__cachemode2pte_tbl);
+
  uint8_t __pte2cachemode_tbl[8] = {
-	[__pte2cm_idx(0)] = _PAGE_CACHE_MODE_WB,
-	[__pte2cm_idx(_PAGE_PWT)] = _PAGE_CACHE_MODE_WC,
-	[__pte2cm_idx(_PAGE_PCD)] = _PAGE_CACHE_MODE_UC_MINUS,
-	[__pte2cm_idx(_PAGE_PWT | _PAGE_PCD)] = _PAGE_CACHE_MODE_UC,
-	[__pte2cm_idx(_PAGE_PAT)] = _PAGE_CACHE_MODE_WB,
-	[__pte2cm_idx(_PAGE_PWT | _PAGE_PAT)] = _PAGE_CACHE_MODE_WC,
-	[__pte2cm_idx(_PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,
+	[__pte2cm_idx( 0        | 0         | 0        )] = _PAGE_CACHE_MODE_WB,
+	[__pte2cm_idx(_PAGE_PWT | 0         | 0        )] = _PAGE_CACHE_MODE_WC,
+	[__pte2cm_idx( 0        | _PAGE_PCD | 0        )] = _PAGE_CACHE_MODE_UC_MINUS,
+	[__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | 0        )] = _PAGE_CACHE_MODE_UC,
+	[__pte2cm_idx( 0        | 0         | _PAGE_PAT)] = _PAGE_CACHE_MODE_WB,
+	[__pte2cm_idx(_PAGE_PWT | 0         | _PAGE_PAT)] = _PAGE_CACHE_MODE_WC,
+	[__pte2cm_idx(0         | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,
  	[__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC,
  };
  EXPORT_SYMBOL(__pte2cachemode_tbl);
--

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#18 lore raw

[tip:x86/mm] x86/mm/pat: Initialize __cachemode2pte_tbl[] and __pte2cachemode_tbl[] in a bit more readable fashion

In reply to Ingo Molnar
x86/mm/pat: Initialize __cachemode2pte_tbl[] and __pte2cachemode_tbl[] in a bit more readable fashion
Commit-ID:  c709feda56886c38af3116254f84cbe6a78b3a5d
Gitweb:     http://git.kernel.org/tip/c709feda56886c38af3116254f84cbe6a78b3a5d
Author:     Ingo Molnar <[email protected]>
AuthorDate: Thu, 5 Mar 2015 08:58:44 +0100
Committer:  Ingo Molnar <[email protected]>
CommitDate: Thu, 5 Mar 2015 09:48:17 +0100

x86/mm/pat: Initialize __cachemode2pte_tbl[] and __pte2cachemode_tbl[] in a bit more readable fashion

The initialization of these two arrays is a bit difficult to follow:
restructure it optically so that a 2D structure shows which bit in the PTE is set and which not.

Also improve on comments a bit.

No code or data changed:

# arch/x86/mm/init.o:

text data bss dec hex filename

   4585     424   29776   34785    87e1 init.o.before
   4585     424   29776   34785    87e1 init.o.after

md5:
a82e11ff58bcfd0af3a94662a701f65d init.o.before.asm a82e11ff58bcfd0af3a94662a701f65d init.o.after.asm

---
 arch/x86/mm/init.c | 40 ++++++++++++++++++++++------------------
 1 file changed, 22 insertions(+), 18 deletions(-)
arch/x86/mm/init.c +22 -18
index 6dc85d5..4469563 100644
@@ -29,29 +29,33 @@
 
 /*
  * Tables translating between page_cache_type_t and pte encoding.
- * Minimal supported modes are defined statically, modified if more supported
- * cache modes are available.
- * Index into __cachemode2pte_tbl is the cachemode.
- * Index into __pte2cachemode_tbl are the caching attribute bits of the pte
- * (_PAGE_PWT, _PAGE_PCD, _PAGE_PAT) at index bit positions 0, 1, 2.
+ *
+ * Minimal supported modes are defined statically, they are modified
+ * during bootup if more supported cache modes are available.
+ *
+ *   Index into __cachemode2pte_tbl[] is the cachemode.
+ *
+ *   Index into __pte2cachemode_tbl[] are the caching attribute bits of the pte
+ *   (_PAGE_PWT, _PAGE_PCD, _PAGE_PAT) at index bit positions 0, 1, 2.
  */
 uint16_t __cachemode2pte_tbl[_PAGE_CACHE_MODE_NUM] = {
-	[_PAGE_CACHE_MODE_WB]		= 0,
-	[_PAGE_CACHE_MODE_WC]		= _PAGE_PWT,
-	[_PAGE_CACHE_MODE_UC_MINUS]	= _PAGE_PCD,
-	[_PAGE_CACHE_MODE_UC]		= _PAGE_PCD | _PAGE_PWT,
-	[_PAGE_CACHE_MODE_WT]		= _PAGE_PCD,
-	[_PAGE_CACHE_MODE_WP]		= _PAGE_PCD,
+	[_PAGE_CACHE_MODE_WB      ]	= 0         | 0        ,
+	[_PAGE_CACHE_MODE_WC      ]	= _PAGE_PWT | 0        ,
+	[_PAGE_CACHE_MODE_UC_MINUS]	= 0         | _PAGE_PCD,
+	[_PAGE_CACHE_MODE_UC      ]	= _PAGE_PWT | _PAGE_PCD,
+	[_PAGE_CACHE_MODE_WT      ]	= 0         | _PAGE_PCD,
+	[_PAGE_CACHE_MODE_WP      ]	= 0         | _PAGE_PCD,
 };
 EXPORT_SYMBOL(__cachemode2pte_tbl);
+
 uint8_t __pte2cachemode_tbl[8] = {
-	[__pte2cm_idx(0)] = _PAGE_CACHE_MODE_WB,
-	[__pte2cm_idx(_PAGE_PWT)] = _PAGE_CACHE_MODE_WC,
-	[__pte2cm_idx(_PAGE_PCD)] = _PAGE_CACHE_MODE_UC_MINUS,
-	[__pte2cm_idx(_PAGE_PWT | _PAGE_PCD)] = _PAGE_CACHE_MODE_UC,
-	[__pte2cm_idx(_PAGE_PAT)] = _PAGE_CACHE_MODE_WB,
-	[__pte2cm_idx(_PAGE_PWT | _PAGE_PAT)] = _PAGE_CACHE_MODE_WC,
-	[__pte2cm_idx(_PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,
+	[__pte2cm_idx( 0        | 0         | 0        )] = _PAGE_CACHE_MODE_WB,
+	[__pte2cm_idx(_PAGE_PWT | 0         | 0        )] = _PAGE_CACHE_MODE_WC,
+	[__pte2cm_idx( 0        | _PAGE_PCD | 0        )] = _PAGE_CACHE_MODE_UC_MINUS,
+	[__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | 0        )] = _PAGE_CACHE_MODE_UC,
+	[__pte2cm_idx( 0        | 0         | _PAGE_PAT)] = _PAGE_CACHE_MODE_WB,
+	[__pte2cm_idx(_PAGE_PWT | 0         | _PAGE_PAT)] = _PAGE_CACHE_MODE_WC,
+	[__pte2cm_idx(0         | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,
 	[__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC,
 };
 EXPORT_SYMBOL(__pte2cachemode_tbl);