x86/idt: Remove X86_TRAP_BP initialization in idt_setup_traps()
PATCH RESEND 1/1 x86/idt: Remove X86_TRAP_BP initialization in idt_setup_traps()
Commit b70543a0b2b6("x86/idt: Move regular trap init to tables") moves regular trap init for each trap vector into a table based initialization. It introduced the initialization for vector X86_TRAP_BP which was not in the original change and it breaks uprobe functionality for x86_32. A program with uprobe instrumented can have segfault on x86_32 instead of normal finish. Uprobe still works on x86_64 even with this commit.
This patch removes X86_TRAP_BP from the structure def_idts which is used in idt_setup_traps(). It also removes a redundant entry for X86_TRAP_NMI in def_idts. Tested on both x86_64 and x86_32, uprobe works fine.
--- arch/x86/kernel/idt.c | 2 -- 1 file changed, 2 deletions(-)
[RESEND with adding [email protected] as the recipient.]
arch/x86/kernel/idt.c +0 -2
@@ -92,8 +92,6 @@ static const __initdata struct idt_data def_idts[] = { INTG(X86_TRAP_DF, double_fault), #endif INTG(X86_TRAP_DB, debug), -INTG (X86_TRAP_NMI , nmi), -INTG (X86_TRAP_BP , int3),#ifdef CONFIG_X86_MCE INTG(X86_TRAP_MC, &machine_check),
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2.9.5
tip-bot for Yonghong Song
merge botx86/idt: Remove X86_TRAP_BP initialization in idt_setup_traps()
Commit-ID: d0cd64b02aa854d68ce517cb7da1fe4e4fff2653 Gitweb: https://git.kernel.org/tip/d0cd64b02aa854d68ce517cb7da1fe4e4fff2653 Author: Yonghong Song <[email protected]> AuthorDate: Wed, 8 Nov 2017 11:28:45 -0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 8 Nov 2017 21:05:23 +0100
x86/idt: Remove X86_TRAP_BP initialization in idt_setup_traps()
Commit b70543a0b2b6("x86/idt: Move regular trap init to tables") moves regular trap init for each trap vector into a table based initialization. It introduced the initialization for vector X86_TRAP_BP which was not in the code which it replaced. This breaks uprobe functionality for x86_32; the probed program segfaults instead of handling the probe proper.
The reason for this is that TRAP_BP is set up as system interrupt gate (DPL3) in the early IDT and then replaced by a regular interrupt gate (DPL0) in idt_setup_traps(). The DPL0 restriction causes the int3 trap to fail with a #GP resulting in a SIGSEGV of the probed program.
On 64bit this does not cause a problem because the IDT entry is replaced with a system interrupt gate (DPL3) with interrupt stack afterwards.
Remove X86_TRAP_BP from the def_idts table which is used in idt_setup_traps(). Remove a redundant entry for X86_TRAP_NMI in def_idts while at it. Tested on both x86_64 and x86_32.
[ tglx: Amended changelog with a description of the root cause ]
--- arch/x86/kernel/idt.c | 2 -- 1 file changed, 2 deletions(-)
arch/x86/kernel/idt.c +0 -2
@@ -92,8 +92,6 @@ static const __initdata struct idt_data def_idts[] = { INTG(X86_TRAP_DF, double_fault), #endif INTG(X86_TRAP_DB, debug), -INTG (X86_TRAP_NMI , nmi), -INTG (X86_TRAP_BP , int3),#ifdef CONFIG_X86_MCE INTG(X86_TRAP_MC, &machine_check),