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perf_events: update Intel Westmere event constraints

PATCH In review Stephane Eranian 1 participant 2 messages Jun 10, 2010

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#0 lore raw

PATCH 1/1 perf_events: update Intel Westmere event constraints

Based on Intel Vol3b (March 2010), the event SNOOPQ_REQUEST_OUTSTANDING is restricted to counters 0,1 so update the event table for Intel Westmere accordingly.

arch/x86/kernel/cpu/perf_event_intel.c +1 -0
index fdbc652..1f51d7f 100644
@@ -72,6 +72,7 @@ static struct event_constraint intel_westmere_event_constraints[] =
 	INTEL_EVENT_CONSTRAINT(0x51, 0x3), /* L1D */
 	INTEL_EVENT_CONSTRAINT(0x60, 0x1), /* OFFCORE_REQUESTS_OUTSTANDING */
 	INTEL_EVENT_CONSTRAINT(0x63, 0x3), /* CACHE_LOCK_CYCLES */
+        INTEL_EVENT_CONSTRAINT(0xb3, 0x1), /* SNOOPQ_REQUEST_OUTSTANDING */
 	EVENT_CONSTRAINT_END
 };
 
#1 lore raw

[tip:perf/urgent] perf_events: Fix Intel Westmere event constraints

Commit-ID:  d11007703c31db534674ebeeb9eb047bbbe758bd
Gitweb:     http://git.kernel.org/tip/d11007703c31db534674ebeeb9eb047bbbe758bd
Author:     Stephane Eranian <[email protected]>
AuthorDate: Thu, 10 Jun 2010 13:25:01 +0200
Committer:  Ingo Molnar <[email protected]>
CommitDate: Thu, 10 Jun 2010 14:16:32 +0200

perf_events: Fix Intel Westmere event constraints

Based on Intel Vol3b (March 2010), the event SNOOPQ_REQUEST_OUTSTANDING is restricted to counters 0,1 so update the event table for Intel Westmere accordingly.

LKML-Reference: <[email protected]>

---
 arch/x86/kernel/cpu/perf_event_intel.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)
arch/x86/kernel/cpu/perf_event_intel.c +1 -0
index fdbc652..214ac86 100644
@@ -72,6 +72,7 @@ static struct event_constraint intel_westmere_event_constraints[] =
 	INTEL_EVENT_CONSTRAINT(0x51, 0x3), /* L1D */
 	INTEL_EVENT_CONSTRAINT(0x60, 0x1), /* OFFCORE_REQUESTS_OUTSTANDING */
 	INTEL_EVENT_CONSTRAINT(0x63, 0x3), /* CACHE_LOCK_CYCLES */
+	INTEL_EVENT_CONSTRAINT(0xb3, 0x1), /* SNOOPQ_REQUEST_OUTSTANDING */
 	EVENT_CONSTRAINT_END
 };