x86/acpi: remove compress irq trick for 32bit
PATCH 1/7 x86/acpi: remove compress irq trick for 32bit
We already have per cpu vector for 32bit, and don't need this trick any more.
on 3 ioapic system (24 per ioapic) before patch got
ACPI: PCI Interrupt Link [ILSB] enabled at IRQ 71
IOAPIC[2]: Set routing entry (10-23 -> 0xa9 -> IRQ 64 Mode:1 Active:1) pci 0000:80:01.1: PCI INT A -> Link[ILSB] -> GSI 71 (level, low) -> IRQ 64
ACPI: PCI Interrupt Link [LE5B] enabled at IRQ 67
IOAPIC[2]: Set routing entry (10-19 -> 0xb1 -> IRQ 65 Mode:1 Active:1) pci 0000:83:00.0: PCI INT B -> Link[LE5B] -> GSI 67 (level, low) -> IRQ 65
ACPI: PCI Interrupt Link [LE5A] enabled at IRQ 66
IOAPIC[2]: Set routing entry (10-18 -> 0xb9 -> IRQ 66 Mode:1 Active:1) pci 0000:83:00.1: PCI INT A -> Link[LE5A] -> GSI 66 (level, low) -> IRQ 66
ACPI: PCI Interrupt Link [LE5D] enabled at IRQ 65
IOAPIC[2]: Set routing entry (10-17 -> 0xc1 -> IRQ 67 Mode:1 Active:1) pci 0000:84:00.0: PCI INT B -> Link[LE5D] -> GSI 65 (level, low) -> IRQ 67
ACPI: PCI Interrupt Link [LE5C] enabled at IRQ 64
IOAPIC[2]: Set routing entry (10-16 -> 0xc9 -> IRQ 68 Mode:1 Active:1) pci 0000:84:00.1: PCI INT A -> Link[LE5C] -> GSI 64 (level, low) -> IRQ 68 pci 0000:87:00.0: PCI INT B -> Link[LE5A] -> GSI 66 (level, low) -> IRQ 66 pci 0000:87:00.1: PCI INT A -> Link[LE5D] -> GSI 65 (level, low) -> IRQ 67 pci 0000:88:00.0: PCI INT B -> Link[LE5C] -> GSI 64 (level, low) -> IRQ 68 pci 0000:88:00.1: PCI INT A -> Link[LE5B] -> GSI 67 (level, low) -> IRQ 65 pci 0000:8b:00.0: PCI INT B -> Link[LE5A] -> GSI 66 (level, low) -> IRQ 66 pci 0000:8b:00.1: PCI INT A -> Link[LE5D] -> GSI 65 (level, low) -> IRQ 67 pci 0000:8c:00.0: PCI INT B -> Link[LE5C] -> GSI 64 (level, low) -> IRQ 68 pci 0000:8c:00.1: PCI INT A -> Link[LE5B] -> GSI 67 (level, low) -> IRQ 65
after patch will get
ACPI: PCI Interrupt Link [ILSB] enabled at IRQ 71
IOAPIC[2]: Set routing entry (10-23 -> 0xa9 -> IRQ 71 Mode:1 Active:1) pci 0000:80:01.1: PCI INT A -> Link[ILSB] -> GSI 71 (level, low) -> IRQ 71
ACPI: PCI Interrupt Link [LE5B] enabled at IRQ 67
IOAPIC[2]: Set routing entry (10-19 -> 0xb1 -> IRQ 67 Mode:1 Active:1) pci 0000:83:00.0: PCI INT B -> Link[LE5B] -> GSI 67 (level, low) -> IRQ 67
ACPI: PCI Interrupt Link [LE5A] enabled at IRQ 66
IOAPIC[2]: Set routing entry (10-18 -> 0xb9 -> IRQ 66 Mode:1 Active:1) pci 0000:83:00.1: PCI INT A -> Link[LE5A] -> GSI 66 (level, low) -> IRQ 66
ACPI: PCI Interrupt Link [LE5D] enabled at IRQ 65
IOAPIC[2]: Set routing entry (10-17 -> 0xc1 -> IRQ 65 Mode:1 Active:1) pci 0000:84:00.0: PCI INT B -> Link[LE5D] -> GSI 65 (level, low) -> IRQ 65
ACPI: PCI Interrupt Link [LE5C] enabled at IRQ 64
IOAPIC[2]: Set routing entry (10-16 -> 0xc9 -> IRQ 64 Mode:1 Active:1) pci 0000:84:00.1: PCI INT A -> Link[LE5C] -> GSI 64 (level, low) -> IRQ 64 pci 0000:87:00.0: PCI INT B -> Link[LE5A] -> GSI 66 (level, low) -> IRQ 66 pci 0000:87:00.1: PCI INT A -> Link[LE5D] -> GSI 65 (level, low) -> IRQ 65 pci 0000:88:00.0: PCI INT B -> Link[LE5C] -> GSI 64 (level, low) -> IRQ 64 pci 0000:88:00.1: PCI INT A -> Link[LE5B] -> GSI 67 (level, low) -> IRQ 67 pci 0000:8b:00.0: PCI INT B -> Link[LE5A] -> GSI 66 (level, low) -> IRQ 66 pci 0000:8b:00.1: PCI INT A -> Link[LE5D] -> GSI 65 (level, low) -> IRQ 65 pci 0000:8c:00.0: PCI INT B -> Link[LE5C] -> GSI 64 (level, low) -> IRQ 64 pci 0000:8c:00.1: PCI INT A -> Link[LE5B] -> GSI 67 (level, low) -> IRQ 67
[ Impact: make irq = gsi on 32bit system with more ioapics ]
--- arch/x86/kernel/acpi/boot.c | 65 ++++---------------------------------------- 1 file changed, 7 insertions(+), 58 deletions(-)
arch/x86/kernel/acpi/boot.c +7 -58
@@ -1162,22 +1162,9 @@ int mp_register_gsi(struct device *dev, {int ioapic;int ioapic_pin; -#ifdef CONFIG_X86_32 -#define MAX_GSI_NUM 4096 -#define IRQ_COMPRESSION_START 64 - -static int pci_irq =IRQ_COMPRESSION_START ; -/* -* Mapping between Global System Interrupts, which -* represent all possible interrupts, and IRQs -* assigned to actual devices. -*/ -static int gsi_to_irq[MAX_GSI_NUM ]; -#else if (acpi_irq_model !=ACPI_IRQ_MODEL_IOAPIC )return gsi; -#endif /* Don't set up the ACPI SCI because it's already set up */ if (acpi_gbl_FADT.sci_interrupt == gsi)
@@ -1196,66 +1183,28 @@ int mp_register_gsi(struct device *dev, gsi =ioapic_renumber_irq (ioapic, gsi);#endif -/* -* Avoid pin reprogramming. PRTs typically include entries -* with redundant pin->gsi mappings (but unique PCI devices); -* we only program the IOAPIC on the first. -*/ if (ioapic_pin >MP_MAX_IOAPIC_PIN ) {printk (KERN_ERR "Invalid reference to IOAPIC pin " "%d-%d\n" , mp_ioapic_routing[ioapic].apic_id, ioapic_pin);return gsi; } + +/* +* Avoid pin reprogramming. PRTs typically include entries +* with redundant pin->gsi mappings (but unique PCI devices); +* we only program the IOAPIC on the first. +*/ if (test_bit (ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed)) {pr_debug ("Pin %d-%d already programmed\n" , mp_ioapic_routing[ioapic].apic_id, ioapic_pin); -#ifdef CONFIG_X86_32 -return (gsi <IRQ_COMPRESSION_START ? gsi : gsi_to_irq[gsi]); -#else return gsi; -#endif } -set_bit (ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed); -#ifdef CONFIG_X86_32 -/* -* For GSI >= 64, use IRQ compression -*/ -if ((gsi >=IRQ_COMPRESSION_START ) - && (triggering ==ACPI_LEVEL_SENSITIVE )) { -/* -* For PCI devices assign IRQs in order, avoiding gaps -* due to unused I/O APIC pins. -*/ -int irq = gsi; -if (gsi <MAX_GSI_NUM ) { -/* -* Retain the VIA chipset work-around (gsi > 15), but -* avoid a problem where the 8254 timer (IRQ0) is setup -* via an override (so it's not on pin 0 of the ioapic), -* and at the same time, the pin 0 interrupt is a PCI -* type. The gsi > 15 test could cause these two pins -* to be shared as IRQ0, and they are not shareable. -* So test for this condition, and if necessary, avoid -* the pin collision. -*/ - gsi = pci_irq++; -/* -* Don't assign IRQ used by ACPI SCI -*/ -if (gsi == acpi_gbl_FADT.sci_interrupt) - gsi = pci_irq++; - gsi_to_irq[irq] = gsi; - }else { -printk (KERN_ERR "GSI %u is too high\n" , gsi); -return gsi; - } - } -#endif io_apic_set_pci_routing (dev, ioapic, ioapic_pin, gsi, triggering ==ACPI_EDGE_SENSITIVE ?0 :1 , polarity ==ACPI_ACTIVE_HIGH ?0 :1 ); +return gsi; }
PATCH 2/7 x86/acpi: calling mp_config_acpi_gsi in mp_register_gsi -v2
it seems that change about calling mp_config_acpi_gsi in acpi_pci_irq_enable() never get into mainline.
actually we could call that in mp_register_gsi with struct device... also could make mp_config_acpi_gsi to be static
v2: some calling could have to be pci device, need to check that
[Impact: make update_mptable working]
--- arch/x86/include/asm/mpspec.h | 9 ----- arch/x86/kernel/acpi/boot.c | 66 +++++++++++++++++++++++++----------------- 2 files changed, 40 insertions(+), 35 deletions(-)
arch/x86/include/asm/mpspec.h +0 -9
@@ -77,17 +77,8 @@ extern int mp_register_gsi(struct device int active_high_low);extern int acpi_probe_gsi (void );#ifdef CONFIG_X86_IO_APIC -extern int mp_config_acpi_gsi (unsigned char number,unsigned int devfn,u8 pin, -u32 gsi,int triggering,int polarity);extern int mp_find_ioapic (int gsi);extern int mp_find_ioapic_pin (int ioapic,int gsi); -#else -static inline int -mp_config_acpi_gsi (unsigned char number,unsigned int devfn,u8 pin, -u32 gsi,int triggering,int polarity) -{ -return 0 ; -}#endif #else /* !CONFIG_ACPI: */ static inline int acpi_probe_gsi (void )
arch/x86/kernel/acpi/boot.c +40 -26
90 lines not on this page · raw message
[tip:irq/numa] x86/acpi: call mp_config_acpi_gsi() in mp_register_gsi()
Commit-ID: a31f82057ce6f7ced578d64c07a72ccbdc7336e4 Gitweb: http://git.kernel.org/tip/a31f82057ce6f7ced578d64c07a72ccbdc7336e4 Author: Yinghai Lu <[email protected]> AuthorDate: Wed, 6 May 2009 10:06:15 -0700 Committer: Ingo Molnar <[email protected]> CommitDate: Mon, 11 May 2009 10:35:08 +0200
x86/acpi: call mp_config_acpi_gsi() in mp_register_gsi()
The patch to call mp_config_acpi_gsi() from the ACPI IRQ registration code never got mainline because there were open discussions about it.
This call is needed to properly update the kernel's copy of the mptable, when the update_mptable boot parameter is needed.
Now that the dust has settled with the APIC unification, and since there were no objections when the patch was re-submitted, try this again.
[ Impact: fix the update_mptable boot parameter ]
LKML-Reference: <[email protected]>
--- arch/x86/include/asm/mpspec.h | 9 ----- arch/x86/kernel/acpi/boot.c | 66 +++++++++++++++++++++++++---------------- 2 files changed, 40 insertions(+), 35 deletions(-)
arch/x86/include/asm/mpspec.h +0 -9
@@ -77,17 +77,8 @@ extern int mp_register_gsi(struct device *dev, u32 gsi, int edge_level, int active_high_low);extern int acpi_probe_gsi (void );#ifdef CONFIG_X86_IO_APIC -extern int mp_config_acpi_gsi (unsigned char number,unsigned int devfn,u8 pin, -u32 gsi,int triggering,int polarity);extern int mp_find_ioapic (int gsi);extern int mp_find_ioapic_pin (int ioapic,int gsi); -#else -static inline int -mp_config_acpi_gsi (unsigned char number,unsigned int devfn,u8 pin, -u32 gsi,int triggering,int polarity) -{ -return 0 ; -}#endif #else /* !CONFIG_ACPI: */ static inline int acpi_probe_gsi (void )
arch/x86/kernel/acpi/boot.c +40 -26
90 lines not on this page · raw message
Len Brown
reviewerRe: [PATCH 2/7] x86/acpi: calling mp_config_acpi_gsi in mp_register_gsi -v2
In reply to Yinghai Lump_config_acpi_gsi() has been dead code since the day it went into 2.6.27. Rather than repairing that, I'd rather see it removed.
The justification for 2944e16b25e7fb8b5ee0dd9dc7197a0f9e523cfd "x86: update mptable" was:
1. kexec kernel with acpi=off
2. work around BIOSes where acpi routing is working, but mptable is not right, so can use kernel/kexec to start other OSes that don't have good acpi support.
command line: update_mptable
So this is a command line option to allow
MPS code to call into ACPI code to support kexec from an ACPI mode into non-ACPI mode -- all without a single comment in the code.
I'm not convinced that the scenario that this code was intended to address justifies adding unreadable code to
an area of the kernel which is notoriously over-complicated and fragile. Doing so is the opposite of optimizing for maintenance.
No, I don't want to see any MPS code ever call into ACPI code.
thanks,
Len Brown, Intel Open Source Technology Center
Re: [PATCH 2/7] x86/acpi: calling mp_config_acpi_gsi in mp_register_gsi -v2
Quoted 13 lines · Len Brown
mp_config_acpi_gsi()has been dead code since the day it went into 2.6.27. Rather than repairing that, I'd rather see it removed.The justification for
2944e16b25e7fb8b5ee0dd9dc7197a0f9e523cfd"x86: update mptable" was:1. kexec kernel with acpi=off
2. work around BIOSes where acpi routing is working, but mptable is not right, so can use kernel/kexec to start other OSes that don't have good acpi support.command line:
update_mptable
Quoted 8 lines
So this is a command line option to allow
MPS code to call into ACPI code to support kexec from an ACPI mode into non-ACPI mode -- all without a single comment in the code.I'm not convinced that the scenario that this code was intended to address justifies adding unreadable code to
an area of the kernel which is notoriously over-complicated and fragile. Doing so is the opposite of optimizing for maintenance.
also could use it to show BIOS engineers what is correct mptable and that could help them to fix the problem in mptable creating when the system have a lot pci cards with bridge in the card.
Quoted 2 lines
No, I don't want to see any MPS code ever call into ACPI code.
how about:
make enable_update_mptable global, and in mp_register_gsi only call mp_config_acpi_gsi() when enable_update_mptable == 1
YH
PATCH 3/7 x86: fix alloc_mptable
In reply to Yinghai Lufix the condition checking.
[ Impact: make alloc_mptable working ]
--- arch/x86/kernel/mpparse.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-)
arch/x86/kernel/mpparse.c +9 -6
@@ -873,21 +873,24 @@ inline void __init check_irq_src(structstatic int check_slot (unsigned long mpc_new_phys,unsigned long mpc_new_length,int count) { +int ret =0 ; +if (!mpc_new_phys) { -pr_info ("No spare slots, try to append...take your risk, " +pr_warning ("No spare slots, try to append...take your risk, " "new mpc_length %x\n" , count); }else { -if (count <= mpc_new_length) +if (count <= mpc_new_length) {pr_info ("No spare slots, try to append..., " "new mpc_length %x\n" , count); -else { + ret =1 ; + }else {pr_err ("mpc_new_length %lx is too small\n" , mpc_new_length); -return -1 ; + ret =-1 ; } } -return 0 ; +return ret; } static int __init replace_intsrc_all(struct mpc_table *mpc,
@@ -946,7 +949,7 @@ static int __init replace_intsrc_all(st }else {struct mpc_intsrc *m = (struct mpc_intsrc *)mpt; count +=sizeof (struct mpc_intsrc ); -if (!check_slot (mpc_new_phys, mpc_new_length, count)) +if (check_slot (mpc_new_phys, mpc_new_length, count) <0 ) goto out;assign_to_mpc_intsrc (&mp_irqs[i], m); mpc->length = count;
Re: [PATCH 3/7] x86: fix alloc_mptable
Quoted 45 lines · Yinghai Lu
fix the condition checking.
[ Impact: make
alloc_mptableworking ]Signed-off-by Yinghai Lu <[email protected]>--- arch/x86/kernel/mpparse.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-)Index:
linux-2.6/arch/x86/kernel/mpparse.c
===================================================================arch/x86/kernel/mpparse.c +8
-5@@ -873,21 +873,24 @@ inline void __init check_irq_src(structstatic int check_slot (unsigned long mpc_new_phys,unsigned long mpc_new_length,int count) { +int ret =0 ; +if (!mpc_new_phys) { -pr_info ("No spare slots, try to append...take your risk, " +pr_warning ("No spare slots, try to append...take your risk, " "new mpc_length %x\n" , count); }else { -if (count <= mpc_new_length) +if (count <= mpc_new_length) {pr_info ("No spare slots, try to append..., " "new mpc_length %x\n" , count); -else { + ret =1 ; + }else {pr_err ("mpc_new_length %lx is too small\n" , mpc_new_length); -return -1 ; + ret =-1 ; } } -return 0 ; +return ret; } static int __init replace_intsrc_all(struct mpc_table *mpc,
arch/x86/kernel/mpparse.c static int __init replace_intsrc_all(st · line 955
Quoted 8 lines
arch/x86/kernel/mpparse.c +1
-1@@ -946,7 +949,7 @@ static int __init replace_intsrc_all(st }else {struct mpc_intsrc *m = (struct mpc_intsrc *)mpt; count +=sizeof (struct mpc_intsrc ); -if (!check_slot (mpc_new_phys, mpc_new_length, count)) +if (check_slot (mpc_new_phys, mpc_new_length, count) <0 ) goto out;assign_to_mpc_intsrc (&mp_irqs[i], m); mpc->length = count;
hm, i modified this to the code attached below instead. Things like:
arch/x86/kernel/mpparse.c
Quoted 3 lines
arch/x86/kernel/mpparse.c +1
-1-pr_info ("No spare slots, try to append...take your risk, " +pr_warning ("No spare slots, try to append...take your risk, " "new mpc_length %x\n" , count);
are not acceptable at all. If there's _anything_ wrong with code like this, if we run out of a static pool of slots, we dont try to hack our way out of it... Instead we inform the user and bail out ASAP!
A predictable, well working way out of a resource shortage is _way_ more important than trying to clinge to some functionality and hoping that it will be all fine ...
So ... please describe under which conditions we can run out of slots, and what the options are in that situation.
Ingo
------------------------------>
Subject: x86: fix alloc_mptable()
From: Yinghai Lu <[email protected]>
Date: Wed, 06 May 2009 10:07:07 -0700
Fix the conditions when we stop updating the mptable due to running out of slots.
[ Impact: fix memory corruption / non-working update_mptable boot parameter ]
LKML-Reference: <[email protected]>
--- arch/x86/kernel/mpparse.c | 25 +++++++++---------------- 1 file changed, 9 insertions(+), 16 deletions(-)
arch/x86/kernel/mpparse.c +9 -16
@@ -870,24 +870,17 @@ staticinline void __init check_irq_src (struct mpc_intsrc *m,int *nr_m_spare) {}#endif /* CONFIG_X86_IO_APIC */ -static int check_slot (unsigned long mpc_new_phys,unsigned long mpc_new_length, -int count) +static int +check_slot (unsigned long mpc_new_phys,unsigned long mpc_new_length,int count) { -if (!mpc_new_phys) { -pr_info ("No spare slots, try to append...take your risk, " -"new mpc_length %x\n" , count); - }else { -if (count <= mpc_new_length) -pr_info ("No spare slots, try to append..., " -"new mpc_length %x\n" , count); -else { -pr_err ("mpc_new_length %lx is too small\n" , - mpc_new_length); -return -1 ; - } +int ret =0 ; + +if (!mpc_new_phys || count <= mpc_new_length) { +WARN (1 ,"update_mptable: No spare slots (length: %x)\n" , count); +return -1 ; } -return 0 ; +return ret; } static int __init replace_intsrc_all(struct mpc_table *mpc,
@@ -946,7 +939,7 @@ static int __init replace_intsrc_all(st }else {struct mpc_intsrc *m = (struct mpc_intsrc *)mpt; count +=sizeof (struct mpc_intsrc ); -if (!check_slot (mpc_new_phys, mpc_new_length, count)) +if (check_slot (mpc_new_phys, mpc_new_length, count) <0 ) goto out;assign_to_mpc_intsrc (&mp_irqs[i], m); mpc->length = count;
[tip:irq/numa] x86: fix alloc_mptable()
In reply to Yinghai LuCommit-ID: ee214558c2e959781a406e76c5b34364da638e1d Gitweb: http://git.kernel.org/tip/ee214558c2e959781a406e76c5b34364da638e1d Author: Yinghai Lu <[email protected]> AuthorDate: Wed, 6 May 2009 10:07:07 -0700 Committer: Ingo Molnar <[email protected]> CommitDate: Mon, 11 May 2009 10:35:07 +0200
x86: fix alloc_mptable()
Fix the conditions when we stop updating the mptable due to running out of slots.
[ Impact: fix memory corruption / non-working update_mptable boot parameter ]
LKML-Reference: <[email protected]>
--- arch/x86/kernel/mpparse.c | 25 +++++++++---------------- 1 files changed, 9 insertions(+), 16 deletions(-)
arch/x86/kernel/mpparse.c +9 -16
@@ -870,24 +870,17 @@ staticinline void __init check_irq_src (struct mpc_intsrc *m,int *nr_m_spare) {}#endif /* CONFIG_X86_IO_APIC */ -static int check_slot (unsigned long mpc_new_phys,unsigned long mpc_new_length, -int count) +static int +check_slot (unsigned long mpc_new_phys,unsigned long mpc_new_length,int count) { -if (!mpc_new_phys) { -pr_info ("No spare slots, try to append...take your risk, " -"new mpc_length %x\n" , count); - }else { -if (count <= mpc_new_length) -pr_info ("No spare slots, try to append..., " -"new mpc_length %x\n" , count); -else { -pr_err ("mpc_new_length %lx is too small\n" , - mpc_new_length); -return -1 ; - } +int ret =0 ; + +if (!mpc_new_phys || count <= mpc_new_length) { +WARN (1 ,"update_mptable: No spare slots (length: %x)\n" , count); +return -1 ; } -return 0 ; +return ret; } static int __init replace_intsrc_all(struct mpc_table *mpc,
@@ -946,7 +939,7 @@ static int __init replace_intsrc_all(struct mpc_table *mpc, }else {struct mpc_intsrc *m = (struct mpc_intsrc *)mpt; count +=sizeof (struct mpc_intsrc ); -if (!check_slot (mpc_new_phys, mpc_new_length, count)) +if (check_slot (mpc_new_phys, mpc_new_length, count) <0 ) goto out;assign_to_mpc_intsrc (&mp_irqs[i], m); mpc->length = count;
PATCH 4/7 x86/acpi: move pin_programmed bit map to io_apic.c
In reply to Yinghai Luprepare to call setup_io_apic_routing in pcibios_irq_enable also remove not needed member apic_id.
--- arch/x86/kernel/acpi/boot.c | 18 ++---------------- arch/x86/kernel/apic/io_apic.c | 25 ++++++++++++++++++++++++- 2 files changed, 26 insertions(+), 17 deletions(-)
arch/x86/kernel/acpi/boot.c +2 -16
@@ -904,10 +904,8 @@ extern int es7000_plat;#endif static struct { -int apic_id;int gsi_base;int gsi_end; - DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1); } mp_ioapic_routing[MAX_IO_APICS ];int mp_find_ioapic (int gsi)
@@ -996,7 +994,6 @@ void __init mp_register_ioapic(int id, u* Build basic GSI lookup table to facilitate gsi->io_apic lookups * and to prevent reprogramming of IOAPIC pins (PCI GSIs). */ - mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].apicid; mp_ioapic_routing[idx].gsi_base = gsi_base; mp_ioapic_routing[idx].gsi_end = gsi_base +io_apic_get_redir_entries (idx);
@@ -1189,7 +1186,7 @@ static int mp_config_acpi_gsi(struct dev mp_irq.srcbus = number; mp_irq.srcbusirq = (((devfn >>3 ) &0x1f ) <<2 ) | ((pin -1 ) &3 ); ioapic =mp_find_ioapic (gsi); - mp_irq.dstapic = mp_ioapic_routing[ioapic].apic_id; + mp_irq.dstapic = mp_ioapics[ioapic].apicid; mp_irq.dstirq =mp_find_ioapic_pin (ioapic, gsi);save_mp_irq (&mp_irq);
@@ -1224,23 +1221,12 @@ int mp_register_gsi(struct device *dev,if (ioapic_pin >MP_MAX_IOAPIC_PIN ) {printk (KERN_ERR "Invalid reference to IOAPIC pin " -"%d-%d\n" , mp_ioapic_routing[ioapic].apic_id, +"%d-%d\n" , mp_ioapics[ioapic].apicid, ioapic_pin);return gsi; }mp_config_acpi_gsi (dev, gsi, triggering, polarity); -/* -* Avoid pin reprogramming. PRTs typically include entries -* with redundant pin->gsi mappings (but unique PCI devices); -* we only program the IOAPIC on the first. -*/ -if (test_bit (ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed)) { -pr_debug ("Pin %d-%d already programmed\n" , - mp_ioapic_routing[ioapic].apic_id, ioapic_pin); -return gsi; - } -set_bit (ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed);io_apic_set_pci_routing (dev, ioapic, ioapic_pin, gsi, triggering ==ACPI_EDGE_SENSITIVE ?0 :1 , polarity ==ACPI_ACTIVE_HIGH ?0 :1 );
arch/x86/kernel/apic/io_apic.c +24 -1
@@ -3923,7 +3923,7 @@ int __init io_apic_get_version(int ioapi }#endif -int io_apic_set_pci_routing (struct device *dev,int ioapic,int pin,int irq, +static int __io_apic_set_pci_routing (struct device *dev,int ioapic,int pin,int irq,int triggering,int polarity) {struct irq_desc *desc;
@@ -3960,6 +3960,29 @@ int io_apic_set_pci_routing(struct devicreturn 0 ; } +static struct { + DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1); +} mp_ioapic_routing[MAX_IO_APICS ]; + +int io_apic_set_pci_routing (struct device *dev,int ioapic,int pin,int irq, +int triggering,int polarity) +{ + +/* +* Avoid pin reprogramming. PRTs typically include entries +* with redundant pin->gsi mappings (but unique PCI devices); +* we only program the IOAPIC on the first. +*/ +if (test_bit (pin, mp_ioapic_routing[ioapic].pin_programmed)) { +pr_debug ("Pin %d-%d already programmed\n" , + mp_ioapics[ioapic].apicid, pin); +return 0 ; + } +set_bit (pin, mp_ioapic_routing[ioapic].pin_programmed); + +return __io_apic_set_pci_routing (dev, ioapic, pin, irq, + triggering, polarity); +}int acpi_get_override_irq (int bus_irq,int *trigger,int *polarity) {
[tip:irq/numa] x86/acpi: move pin_programmed bit map to io_apic.c
Commit-ID: bdfe8ac153546537ed24de69610ea781a734f785 Gitweb: http://git.kernel.org/tip/bdfe8ac153546537ed24de69610ea781a734f785 Author: Yinghai Lu <[email protected]> AuthorDate: Wed, 6 May 2009 10:07:41 -0700 Committer: Ingo Molnar <[email protected]> CommitDate: Mon, 11 May 2009 10:35:08 +0200
x86/acpi: move pin_programmed bit map to io_apic.c
Prepare to call setup_io_apic_routing() in pcibios_irq_enable() also remove not needed member apic_id.
[ Impact: clean up, prepare for future change ]
LKML-Reference: <[email protected]>
--- arch/x86/kernel/acpi/boot.c | 18 ++---------------- arch/x86/kernel/apic/io_apic.c | 25 ++++++++++++++++++++++++- 2 files changed, 26 insertions(+), 17 deletions(-)
arch/x86/kernel/acpi/boot.c +2 -16
@@ -904,10 +904,8 @@ extern int es7000_plat;#endif static struct { -int apic_id;int gsi_base;int gsi_end; - DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1); } mp_ioapic_routing[MAX_IO_APICS ];int mp_find_ioapic (int gsi)
@@ -996,7 +994,6 @@ void __init mp_register_ioapic(int id, u32 address, u32 gsi_base)* Build basic GSI lookup table to facilitate gsi->io_apic lookups * and to prevent reprogramming of IOAPIC pins (PCI GSIs). */ - mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].apicid; mp_ioapic_routing[idx].gsi_base = gsi_base; mp_ioapic_routing[idx].gsi_end = gsi_base +io_apic_get_redir_entries (idx);
@@ -1189,7 +1186,7 @@ static int mp_config_acpi_gsi(struct device *dev, u32 gsi, int triggering, mp_irq.srcbus = number; mp_irq.srcbusirq = (((devfn >>3 ) &0x1f ) <<2 ) | ((pin -1 ) &3 ); ioapic =mp_find_ioapic (gsi); - mp_irq.dstapic = mp_ioapic_routing[ioapic].apic_id; + mp_irq.dstapic = mp_ioapics[ioapic].apicid; mp_irq.dstirq =mp_find_ioapic_pin (ioapic, gsi);save_mp_irq (&mp_irq);
@@ -1224,23 +1221,12 @@ int mp_register_gsi(struct device *dev, u32 gsi, int triggering, int polarity)if (ioapic_pin >MP_MAX_IOAPIC_PIN ) {printk (KERN_ERR "Invalid reference to IOAPIC pin " -"%d-%d\n" , mp_ioapic_routing[ioapic].apic_id, +"%d-%d\n" , mp_ioapics[ioapic].apicid, ioapic_pin);return gsi; }mp_config_acpi_gsi (dev, gsi, triggering, polarity); -/* -* Avoid pin reprogramming. PRTs typically include entries -* with redundant pin->gsi mappings (but unique PCI devices); -* we only program the IOAPIC on the first. -*/ -if (test_bit (ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed)) { -pr_debug ("Pin %d-%d already programmed\n" , - mp_ioapic_routing[ioapic].apic_id, ioapic_pin); -return gsi; - } -set_bit (ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed);io_apic_set_pci_routing (dev, ioapic, ioapic_pin, gsi, triggering ==ACPI_EDGE_SENSITIVE ?0 :1 , polarity ==ACPI_ACTIVE_HIGH ?0 :1 );
arch/x86/kernel/apic/io_apic.c +24 -1
@@ -3922,7 +3922,7 @@ int __init io_apic_get_version(int ioapic) }#endif -int io_apic_set_pci_routing (struct device *dev,int ioapic,int pin,int irq, +static int __io_apic_set_pci_routing (struct device *dev,int ioapic,int pin,int irq,int triggering,int polarity) {struct irq_desc *desc;
@@ -3959,6 +3959,29 @@ int io_apic_set_pci_routing(struct device *dev, int ioapic, int pin, int irq,return 0 ; } +static struct { + DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1); +} mp_ioapic_routing[MAX_IO_APICS ]; + +int io_apic_set_pci_routing (struct device *dev,int ioapic,int pin,int irq, +int triggering,int polarity) +{ + +/* +* Avoid pin reprogramming. PRTs typically include entries +* with redundant pin->gsi mappings (but unique PCI devices); +* we only program the IOAPIC on the first. +*/ +if (test_bit (pin, mp_ioapic_routing[ioapic].pin_programmed)) { +pr_debug ("Pin %d-%d already programmed\n" , + mp_ioapics[ioapic].apicid, pin); +return 0 ; + } +set_bit (pin, mp_ioapic_routing[ioapic].pin_programmed); + +return __io_apic_set_pci_routing (dev, ioapic, pin, irq, + triggering, polarity); +}int acpi_get_override_irq (int bus_irq,int *trigger,int *polarity) {
PATCH 5/7 x86/pci: add 4 more return param in IO_APIC_get_PCI_irq_vector
In reply to Yinghai Luso prepare those params for pcibios_irq_enable to call setup_io_apic_routing
--- arch/x86/include/asm/hw_irq.h | 4 + arch/x86/kernel/apic/io_apic.c | 107 ++++++++++++++++++++------------------ arch/x86/pci/irq.c | 24 +++++++- drivers/pci/hotplug/ibmphp_core.c | 52 +++++++++--------- 4 files changed, 110 insertions(+), 77 deletions(-)
arch/x86/kernel/apic/io_apic.c +59 -48
@@ -874,54 +874,6 @@ static int __init find_isa_irq_apic(intreturn -1 ; } -/* -* Find a specific PCI IRQ entry. -* Not an __init, possibly needed by modules -*/ -static int pin_2_irq (int idx,int apic,int pin); - -int IO_APIC_get_PCI_irq_vector (int bus,int slot,int pin) -{ -int apic, i, best_guess =-1 ; - -apic_printk (APIC_DEBUG ,"querying PCI -> IRQ mapping bus:%d, slot:%d, pin:%d.\n" , - bus, slot, pin); -if (test_bit (bus, mp_bus_not_pci)) { -apic_printk (APIC_VERBOSE ,"PCI BIOS passed nonexistent PCI bus %d!\n" , bus); -return -1 ; - } -for (i =0 ; i < mp_irq_entries; i++) { -int lbus = mp_irqs[i].srcbus; - -for (apic =0 ; apic < nr_ioapics; apic++) -if (mp_ioapics[apic].apicid == mp_irqs[i].dstapic || - mp_irqs[i].dstapic ==MP_APIC_ALL ) -break ; - -if (!test_bit (lbus, mp_bus_not_pci) && - !mp_irqs[i].irqtype && - (bus == lbus) && - (slot == ((mp_irqs[i].srcbusirq >>2 ) &0x1f ))) { -int irq =pin_2_irq (i, apic, mp_irqs[i].dstirq); - -if (!(apic ||IO_APIC_IRQ (irq))) -continue ; - -if (pin == (mp_irqs[i].srcbusirq &3 )) -return irq; -/* -* Use the first all-but-pin matching entry as a -* best-guess fuzzy result for broken mptables. -*/ -if (best_guess <0 ) - best_guess = irq; - } - } -return best_guess; -} - -EXPORT_SYMBOL (IO_APIC_get_PCI_irq_vector); -#if defined(CONFIG_EISA ) || defined(CONFIG_MCA )/* * EISA Edge/Level control register, ELCR
@@ -1140,6 +1092,65 @@ static int pin_2_irq(int idx, int apic,return irq; } +/* +* Find a specific PCI IRQ entry. +* Not an __init, possibly needed by modules +*/ +int IO_APIC_get_PCI_irq_vector (int bus,int slot,int pin, +int *ioapic,int *ioapic_pin, +int *trigger,int *polarity) +{ +int apic, i, best_guess =-1 ; + +apic_printk (APIC_DEBUG , +"querying PCI -> IRQ mapping bus:%d, slot:%d, pin:%d.\n" , + bus, slot, pin); +if (test_bit (bus, mp_bus_not_pci)) { +apic_printk (APIC_VERBOSE , +"PCI BIOS passed nonexistent PCI bus %d!\n" , bus); +return -1 ; + } +for (i =0 ; i < mp_irq_entries; i++) { +int lbus = mp_irqs[i].srcbus; + +for (apic =0 ; apic < nr_ioapics; apic++) +if (mp_ioapics[apic].apicid == mp_irqs[i].dstapic || + mp_irqs[i].dstapic ==MP_APIC_ALL ) +break ; + +if (!test_bit (lbus, mp_bus_not_pci) && + !mp_irqs[i].irqtype && + (bus == lbus) && + (slot == ((mp_irqs[i].srcbusirq >>2 ) &0x1f ))) { +int irq =pin_2_irq (i, apic, mp_irqs[i].dstirq); + +if (!(apic ||IO_APIC_IRQ (irq))) +continue ; + +if (pin == (mp_irqs[i].srcbusirq &3 )) { + *ioapic = apic; + *ioapic_pin = mp_irqs[i].dstirq; + *trigger =irq_trigger (i); + *polarity =irq_polarity (i); +return irq; + } +/* +* Use the first all-but-pin matching entry as a +* best-guess fuzzy result for broken mptables. +*/ +if (best_guess <0 ) { + *ioapic = apic; + *ioapic_pin = mp_irqs[i].dstirq; + *trigger =irq_trigger (i); + *polarity =irq_polarity (i); + best_guess = irq; + } + } + } +return best_guess; +} +EXPORT_SYMBOL (IO_APIC_get_PCI_irq_vector); +void lock_vector_lock (void ) {/* Used to the online set of cpus does not change
arch/x86/include/asm/hw_irq.h +3 -1
@@ -66,7 +66,9 @@ extern unsigned long io_apic_irqs;extern void init_VISWS_APIC_irqs (void );extern void setup_IO_APIC (void );extern void disable_IO_APIC (void ); -extern int IO_APIC_get_PCI_irq_vector (int bus,int slot,int fn); +extern int IO_APIC_get_PCI_irq_vector (int bus,int devfn,int pin, +int *ioapic,int *ioapic_pin, +int *trigger,int *polarity);extern void setup_ioapic_dest (void );extern void enable_IO_APIC (void );
drivers/pci/hotplug/ibmphp_core.c +28 -24
73 lines not on this page · raw message
arch/x86/pci/irq.c +20 -4
@@ -1051,12 +1051,16 @@ static void __init pcibios_fixup_irqs(vo*/ if (io_apic_assign_pci_irqs) {int irq; +int ioapic =-1 , ioapic_pin =-1 ; +int triggering, polarity;/* * interrupt pins are numbered starting from 1 */ irq =IO_APIC_get_PCI_irq_vector (dev->bus->number, -PCI_SLOT (dev->devfn), pin -1 ); +PCI_SLOT (dev->devfn), pin -1 , + &ioapic, &ioapic_pin, + &triggering, &polarity);/* * Busses behind bridges are typically not listed in the * MP-table. In this case we have to look up the IRQ
@@ -1072,7 +1076,10 @@ static void __init pcibios_fixup_irqs(vo pin =pci_swizzle_interrupt_pin (dev, pin); bus = bridge->bus->number; irq =IO_APIC_get_PCI_irq_vector (bus, -PCI_SLOT (bridge->devfn), pin -1 ); +PCI_SLOT (bridge->devfn), + pin -1 , + &ioapic, &ioapic_pin, + &triggering, &polarity);if (irq >=0 )dev_warn (&dev->dev, "using bridge %s INT %c to "
@@ -1221,8 +1228,14 @@ static int pirq_enable_irq(struct pci_deif (io_apic_assign_pci_irqs) {int irq; +int ioapic =-1 , ioapic_pin =-1 ; +int triggering, polarity; - irq =IO_APIC_get_PCI_irq_vector (dev->bus->number,PCI_SLOT (dev->devfn), pin -1 ); + irq =IO_APIC_get_PCI_irq_vector (dev->bus->number, +PCI_SLOT (dev->devfn), + pin -1 , + &ioapic, &ioapic_pin, + &triggering, &polarity);/* * Busses behind bridges are typically not listed in the MP-table. * In this case we have to look up the IRQ based on the parent bus,
@@ -1235,7 +1248,10 @@ static int pirq_enable_irq(struct pci_de pin =pci_swizzle_interrupt_pin (dev, pin); irq =IO_APIC_get_PCI_irq_vector (bridge->bus->number, -PCI_SLOT (bridge->devfn), pin -1 ); +PCI_SLOT (bridge->devfn), + pin -1 , + &ioapic, &ioapic_pin, + &triggering, &polarity);if (irq >=0 ) dev_warn(&dev->dev, "using bridge %s " "INT %c to get IRQ %d\n",
Re: [PATCH 5/7] x86/pci: add 4 more return param in IO_APIC_get_PCI_irq_vector
Quoted 10 lines · Yinghai Lu
so prepare those params for
pcibios_irq_enableto callsetup_io_apic_routingSigned-off-by Yinghai Lu <[email protected]>--- arch/x86/include/asm/hw_irq.h | 4 + arch/x86/kernel/apic/io_apic.c | 107 ++++++++++++++++++++------------------ arch/x86/pci/irq.c | 24 +++++++- drivers/pci/hotplug/ibmphp_core.c | 52 +++++++++--------- 4 files changed, 110 insertions(+), 77 deletions(-)
Hm, didnt Jesse ack this already? If yes then it would be nice to have that Acked-by tag line in the changelog.
Ingo
Re: [PATCH 5/7] x86/pci: add 4 more return param in IO_APIC_get_PCI_irq_vector
In reply to Yinghai Luarch/x86/pci/irq.c static int pirq_enable_irq(struct pci_de · line 1232
Quoted 8 lines · Yinghai Lu
arch/x86/pci/irq.c +5
-0+int IO_APIC_get_PCI_irq_vector (int bus,int slot,int pin, +int *ioapic,int *ioapic_pin, +int *trigger,int *polarity) if (io_apic_assign_pci_irqs) {int irq; +int ioapic =-1 , ioapic_pin =-1 ; +int triggering, polarity;
please put this into a helper function/inline.
Quoted 12 lines
arch/x86/pci/irq.c +5
-1- irq =IO_APIC_get_PCI_irq_vector (dev->bus->number,PCI_SLOT (dev->devfn), pin -1 ); + irq =IO_APIC_get_PCI_irq_vector (dev->bus->number, +PCI_SLOT (dev->devfn), + pin -1 , + &ioapic, &ioapic_pin, + &triggering, &polarity);/* * Busses behind bridges are typically not listed in the MP-table. * In this case we have to look up the IRQ based on the parent bus, @@ -1235,7 +1248,10 @@ static int pirq_enable_irq(struct pci_de
arch/x86/pci/irq.c static int pirq_enable_irq(struct pci_de · line 1257
Quoted 10 lines
arch/x86/pci/irq.c +4
-1pin =pci_swizzle_interrupt_pin (dev, pin); irq =IO_APIC_get_PCI_irq_vector (bridge->bus->number, -PCI_SLOT (bridge->devfn), pin -1 ); +PCI_SLOT (bridge->devfn), + pin -1 , + &ioapic, &ioapic_pin, + &triggering, &polarity);if (irq >=0 ) dev_warn(&dev->dev, "using bridge %s " "INT %c to get IRQ %d\n",
That function has way too many parameters. Please introduce a helper structure (struct io_apic_irq_attr) where the parameters can be passed along in a clean and short fashion. We update them by reference anyway.
I've applied the patch, but we need these cleanups too, the code has become too ugly.
Ingo
Re: [PATCH 5/7] x86/pci: add 4 more return param in IO_APIC_get_PCI_irq_vector
Quoted 9 lines · Ingo Molnar
That function has way too many parameters. Please introduce a helper structure (struct
io_apic_irq_attr) where the parameters can be passed along in a clean and short fashion. We update them by reference anyway.I've applied the patch, but we need these cleanups too, the code has become too ugly.
please check
[PATCH] x86: introduce io_apic_irq_attr
according to Ingo, some io_apic related function get too more parameter So reduce related funcs to get less param by passing io_apic_irq pointer
[ Impact: cleanup ]
--- arch/x86/include/asm/hw_irq.h | 11 ++++++++-- arch/x86/include/asm/io_apic.h | 5 ++-- arch/x86/kernel/acpi/boot.c | 9 +++++--- arch/x86/kernel/apic/io_apic.c | 41 ++++++++++++++++++++++---------------- arch/x86/pci/irq.c | 15 +++---------- drivers/pci/hotplug/ibmphp_core.c | 7 +----- 6 files changed, 48 insertions(+), 40 deletions(-)
arch/x86/include/asm/hw_irq.h +9 -2
@@ -63,9 +63,16 @@ extern unsigned long io_apic_irqs;extern void init_VISWS_APIC_irqs (void );extern void setup_IO_APIC (void );extern void disable_IO_APIC (void ); + +struct io_apic_irq_attr { +int ioapic; +int ioapic_pin; +int trigger; +int polarity; +}; +extern int IO_APIC_get_PCI_irq_vector (int bus,int devfn,int pin, -int *ioapic,int *ioapic_pin, -int *trigger,int *polarity); +struct io_apic_irq_attr *io_apic_irq);extern void setup_ioapic_dest (void );extern void enable_IO_APIC (void );
arch/x86/include/asm/io_apic.h +3 -2
@@ -156,8 +156,9 @@ extern int io_apic_get_version(int ioapiextern int io_apic_get_redir_entries (int ioapic);#endif /* CONFIG_ACPI */ -extern int io_apic_set_pci_routing (struct device *dev,int ioapic,int pin, -int irq,int edge_level,int active_high_low); +struct io_apic_irq_attr ; +extern int io_apic_set_pci_routing (struct device *dev,int irq, +struct io_apic_irq_attr *io_apic_irq);extern int (*ioapic_renumber_irq)(int ioapic,int irq);extern void ioapic_init_mappings (void );
arch/x86/kernel/acpi/boot.c +6 -3
@@ -1198,6 +1198,7 @@ int mp_register_gsi(struct device *dev, {int ioapic;int ioapic_pin; +struct io_apic_irq_attr io_apic_irq;if (acpi_irq_model !=ACPI_IRQ_MODEL_IOAPIC )return gsi;
@@ -1227,9 +1228,11 @@ int mp_register_gsi(struct device *dev, }mp_config_acpi_gsi (dev, gsi, triggering, polarity); -io_apic_set_pci_routing (dev, ioapic, ioapic_pin, gsi, - triggering ==ACPI_EDGE_SENSITIVE ?0 :1 , - polarity ==ACPI_ACTIVE_HIGH ?0 :1 ); + io_apic_irq.ioapic = ioapic; + io_apic_irq.ioapic_pin = ioapic_pin; + io_apic_irq.trigger = (triggering ==ACPI_EDGE_SENSITIVE ?0 :1 ); + io_apic_irq.polarity = (polarity ==ACPI_ACTIVE_HIGH ?0 :1 ); +io_apic_set_pci_routing (dev, gsi, &io_apic_irq);return gsi; }
arch/x86/kernel/apic/io_apic.c +24 -17
94 lines not on this page · raw message
arch/x86/pci/irq.c +4 -11
@@ -1200,14 +1200,11 @@ static int pirq_enable_irq(struct pci_de#ifdef CONFIG_X86_IO_APIC struct pci_dev *temp_dev;int irq; -int ioapic =-1 , ioapic_pin =-1 ; -int triggering, polarity; +struct io_apic_irq_attr io_apic_irq; irq =IO_APIC_get_PCI_irq_vector (dev->bus->number,PCI_SLOT (dev->devfn), - pin -1 , - &ioapic, &ioapic_pin, - &triggering, &polarity); + pin -1 , &io_apic_irq);/* * Busses behind bridges are typically not listed in the MP-table. * In this case we have to look up the IRQ based on the parent bus,
@@ -1221,9 +1218,7 @@ static int pirq_enable_irq(struct pci_de pin =pci_swizzle_interrupt_pin (dev, pin); irq =IO_APIC_get_PCI_irq_vector (bridge->bus->number,PCI_SLOT (bridge->devfn), - pin -1 , - &ioapic, &ioapic_pin, - &triggering, &polarity); + pin -1 , &io_apic_irq);if (irq >=0 ) dev_warn(&dev->dev, "using bridge %s " "INT %c to get IRQ %d\n",
@@ -1233,9 +1228,7 @@ static int pirq_enable_irq(struct pci_de } dev = temp_dev;if (irq >=0 ) { -io_apic_set_pci_routing (&dev->dev, ioapic, - ioapic_pin, irq, - triggering, polarity); +io_apic_set_pci_routing (&dev->dev, irq, &io_apic_irq); dev->irq = irq;dev_info (&dev->dev,"PCI->APIC IRQ transform: " "INT %c -> IRQ %d\n" ,'A' + pin -1 , irq);
drivers/pci/hotplug/ibmphp_core.c +2 -5
@@ -155,15 +155,12 @@ int ibmphp_init_devno(struct slot **cur_for (loop =0 ; loop < len; loop++) {if ((*cur_slot)->number == rtable->slots[loop].slot && (*cur_slot)->bus == rtable->slots[loop].bus) { -int ioapic =-1 , ioapic_pin =-1 ; -int triggering, polarity; +struct io_apic_irq_attr io_apic_irq; (*cur_slot)->device =PCI_SLOT (rtable->slots[loop].devfn);for (i =0 ; i <4 ; i++) (*cur_slot)->irq[i] =IO_APIC_get_PCI_irq_vector ((int ) (*cur_slot)->bus, - (int ) (*cur_slot)->device, i. - &ioapic, &ioapic_pin, - &triggering, &polarity); + (int ) (*cur_slot)->device, i, &io_apic_irq);debug ("(*cur_slot)->irq[0] = %x\n" , (*cur_slot)->irq[0 ]);
Re: [PATCH 5/7] x86/pci: add 4 more return param in IO_APIC_get_PCI_irq_vector
arch/x86/kernel/acpi/boot.c int mp_register_gsi(struct device *dev, · line 1201
Quoted 5 lines · Yinghai Lu
arch/x86/kernel/acpi/boot.c +1
-0@@ -1198,6 +1198,7 @@ int mp_register_gsi(struct device *dev, {int ioapic;int ioapic_pin; +struct io_apic_irq_attr io_apic_irq;
please call the variable name 'irq_attr' or so.
arch/x86/kernel/acpi/boot.c int mp_register_gsi(struct device *dev, · line 1235
Quoted 5 lines
arch/x86/kernel/acpi/boot.c +5
-0+ io_apic_irq.ioapic = ioapic; + io_apic_irq.ioapic_pin = ioapic_pin; + io_apic_irq.trigger = (triggering ==ACPI_EDGE_SENSITIVE ?0 :1 ); + io_apic_irq.polarity = (polarity ==ACPI_ACTIVE_HIGH ?0 :1 ); +io_apic_set_pci_routing (dev, gsi, &io_apic_irq);
I think we've been through this before :-/ Doesnt this:
io_apic_irq.ioapic = ioapic; io_apic_irq.ioapic_pin = ioapic_pin; io_apic_irq.trigger = (triggering == ACPI_EDGE_SENSITIVE ? 0 : 1); io_apic_irq.polarity = (polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
Look nicer?
Also, please do s/triggering/trigger
Thanks,
Ingo
PATCH 1/1 x86: introduce io_apic_irq_attr -v2
according to Ingo, some io_apic related function get too more parameter So reduce related funcs to get less param by passing io_apic_irq pointer
v2: io_apic_irq ==> irq_attr
triggering ==> trigger
[ Impact: cleanup ]
--- arch/x86/include/asm/hw_irq.h | 11 +++++++-- arch/x86/include/asm/io_apic.h | 5 ++-- arch/x86/kernel/acpi/boot.c | 23 +++++++++++--------- arch/x86/kernel/apic/io_apic.c | 43 ++++++++++++++++++++++---------------- arch/x86/pci/irq.c | 16 ++++---------- drivers/pci/hotplug/ibmphp_core.c | 8 ++----- 6 files changed, 58 insertions(+), 48 deletions(-)
arch/x86/include/asm/hw_irq.h +9 -2
@@ -66,9 +66,16 @@ extern unsigned long io_apic_irqs;extern void init_VISWS_APIC_irqs (void );extern void setup_IO_APIC (void );extern void disable_IO_APIC (void ); + +struct io_apic_irq_attr { +int ioapic; +int ioapic_pin; +int trigger; +int polarity; +}; +extern int IO_APIC_get_PCI_irq_vector (int bus,int devfn,int pin, -int *ioapic,int *ioapic_pin, -int *trigger,int *polarity); +struct io_apic_irq_attr *irq_attr);extern void setup_ioapic_dest (void );extern void enable_IO_APIC (void );
arch/x86/include/asm/io_apic.h +3 -2
@@ -156,8 +156,9 @@ extern int io_apic_get_version(int ioapiextern int io_apic_get_redir_entries (int ioapic);#endif /* CONFIG_ACPI */ -extern int io_apic_set_pci_routing (struct device *dev,int ioapic,int pin, -int irq,int edge_level,int active_high_low); +struct io_apic_irq_attr ; +extern int io_apic_set_pci_routing (struct device *dev,int irq, +struct io_apic_irq_attr *irq_attr);extern int (*ioapic_renumber_irq)(int ioapic,int irq);extern void ioapic_init_mappings (void );
arch/x86/kernel/acpi/boot.c +13 -10
@@ -523,7 +523,7 @@ int acpi_gsi_to_irq(u32 gsi, unsigned in* success: return IRQ number (>=0) * failure: return < 0 */ -int acpi_register_gsi (struct device *dev,u32 gsi,int triggering,int polarity) +int acpi_register_gsi (struct device *dev,u32 gsi,int trigger,int polarity) {unsigned int irq;unsigned int plat_gsi = gsi;
@@ -533,14 +533,14 @@ int acpi_register_gsi(struct device *dev* Make sure all (legacy) PCI IRQs are set as level-triggered. */ if (acpi_irq_model ==ACPI_IRQ_MODEL_PIC ) { -if (triggering ==ACPI_LEVEL_SENSITIVE ) +if (trigger ==ACPI_LEVEL_SENSITIVE )eisa_set_level_irq (gsi); }#endif #ifdef CONFIG_X86_IO_APIC if (acpi_irq_model ==ACPI_IRQ_MODEL_IOAPIC ) { - plat_gsi =mp_register_gsi (dev, gsi, triggering, polarity); + plat_gsi =mp_register_gsi (dev, gsi, trigger, polarity); }#endif acpi_gsi_to_irq (plat_gsi, &irq);
@@ -1156,7 +1156,7 @@ void __init mp_config_acpi_legacy_irqs(v } } -static int mp_config_acpi_gsi (struct device *dev,u32 gsi,int triggering, +static int mp_config_acpi_gsi (struct device *dev,u32 gsi,int trigger,int polarity) {#ifdef CONFIG_X86_MPPARSE
@@ -1181,7 +1181,7 @@ static int mp_config_acpi_gsi(struct dev/* print the entry should happen on mptable identically */ mp_irq.type =MP_INTSRC ; mp_irq.irqtype = mp_INT; - mp_irq.irqflag = (triggering ==ACPI_EDGE_SENSITIVE ?4 :0x0c ) | + mp_irq.irqflag = (trigger ==ACPI_EDGE_SENSITIVE ?4 :0x0c ) | (polarity ==ACPI_ACTIVE_HIGH ?1 :3 ); mp_irq.srcbus = number; mp_irq.srcbusirq = (((devfn >>3 ) &0x1f ) <<2 ) | ((pin -1 ) &3 );
@@ -1194,10 +1194,11 @@ static int mp_config_acpi_gsi(struct devreturn 0 ; } -int mp_register_gsi (struct device *dev,u32 gsi,int triggering,int polarity) +int mp_register_gsi (struct device *dev,u32 gsi,int trigger,int polarity) {int ioapic;int ioapic_pin; +struct io_apic_irq_attr irq_attr;if (acpi_irq_model !=ACPI_IRQ_MODEL_IOAPIC )return gsi;
@@ -1225,11 +1226,13 @@ int mp_register_gsi(struct device *dev, ioapic_pin);return gsi; } -mp_config_acpi_gsi (dev, gsi, triggering, polarity); +mp_config_acpi_gsi (dev, gsi, trigger, polarity); -io_apic_set_pci_routing (dev, ioapic, ioapic_pin, gsi, - triggering ==ACPI_EDGE_SENSITIVE ?0 :1 , - polarity ==ACPI_ACTIVE_HIGH ?0 :1 ); + irq_attr.ioapic = ioapic; + irq_attr.ioapic_pin = ioapic_pin; + irq_attr.trigger = (trigger ==ACPI_EDGE_SENSITIVE ?0 :1 ); + irq_attr.polarity = (polarity ==ACPI_ACTIVE_HIGH ?0 :1 ); +io_apic_set_pci_routing (dev, gsi, &irq_attr);return gsi; }
arch/x86/kernel/apic/io_apic.c +25 -18
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arch/x86/pci/irq.c +5 -11
@@ -1200,14 +1200,11 @@ static int pirq_enable_irq(struct pci_de#ifdef CONFIG_X86_IO_APIC struct pci_dev *temp_dev;int irq; -int ioapic =-1 , ioapic_pin =-1 ; -int triggering, polarity; +struct io_apic_irq_attr irq_attr; irq =IO_APIC_get_PCI_irq_vector (dev->bus->number,PCI_SLOT (dev->devfn), - pin -1 , - &ioapic, &ioapic_pin, - &triggering, &polarity); + pin -1 , &irq_attr);/* * Busses behind bridges are typically not listed in the MP-table. * In this case we have to look up the IRQ based on the parent bus,
@@ -1221,9 +1218,7 @@ static int pirq_enable_irq(struct pci_de pin =pci_swizzle_interrupt_pin (dev, pin); irq =IO_APIC_get_PCI_irq_vector (bridge->bus->number,PCI_SLOT (bridge->devfn), - pin -1 , - &ioapic, &ioapic_pin, - &triggering, &polarity); + pin -1 , &irq_attr);if (irq >=0 ) dev_warn(&dev->dev, "using bridge %s " "INT %c to get IRQ %d\n",
@@ -1233,9 +1228,8 @@ static int pirq_enable_irq(struct pci_de } dev = temp_dev;if (irq >=0 ) { -io_apic_set_pci_routing (&dev->dev, ioapic, - ioapic_pin, irq, - triggering, polarity); +io_apic_set_pci_routing (&dev->dev, irq, + &irq_attr); dev->irq = irq;dev_info (&dev->dev,"PCI->APIC IRQ transform: " "INT %c -> IRQ %d\n" ,'A' + pin -1 , irq);
drivers/pci/hotplug/ibmphp_core.c +3 -5
@@ -155,15 +155,13 @@ int ibmphp_init_devno(struct slot **cur_for (loop =0 ; loop < len; loop++) {if ((*cur_slot)->number == rtable->slots[loop].slot && (*cur_slot)->bus == rtable->slots[loop].bus) { -int ioapic =-1 , ioapic_pin =-1 ; -int triggering, polarity; +struct io_apic_irq_attr irq_attr; (*cur_slot)->device =PCI_SLOT (rtable->slots[loop].devfn);for (i =0 ; i <4 ; i++) (*cur_slot)->irq[i] =IO_APIC_get_PCI_irq_vector ((int ) (*cur_slot)->bus, - (int ) (*cur_slot)->device, i. - &ioapic, &ioapic_pin, - &triggering, &polarity); + (int ) (*cur_slot)->device, i, + &irq_attr);debug ("(*cur_slot)->irq[0] = %x\n" , (*cur_slot)->irq[0 ]);
Re: [PATCH] x86: introduce io_apic_irq_attr -v2
Review
Quoted 9 lines · Yinghai Lu
(quoted diff) +8
-0+ irq_attr->ioapic = apic; + irq_attr->ioapic_pin = mp_irqs[i].dstirq; + irq_attr->trigger = irq_trigger(i); + irq_attr->polarity = irq_polarity(i); + irq_attr->ioapic = apic; + irq_attr->ioapic_pin = mp_irqs[i].dstirq; + irq_attr->trigger = irq_trigger(i); + irq_attr->polarity = irq_polarity(i);
Shouldnt this be factored out ino a helper function?
Ingo
Re: [PATCH] x86: introduce io_apic_irq_attr -v2
Quoted 8 lines · Ingo Molnar
Quoted 4 lines · Yinghai Lu
+
irq_attr->ioapic= apic;
+irq_attr->ioapic_pin= mp_irqs[i].dstirq;
+irq_attr->trigger=irq_trigger(i);
+irq_attr->polarity=irq_polarity(i);
Quoted 7 lines
Quoted 4 lines
+
irq_attr->ioapic= apic;
+irq_attr->ioapic_pin= mp_irqs[i].dstirq;
+irq_attr->trigger=irq_trigger(i);
+irq_attr->polarity=irq_polarity(i);Shouldnt this be factored out ino a helper function?
set_io_apic_irq_attr()?
YH
Re: [PATCH] x86: introduce io_apic_irq_attr -v2
In reply to Ingo Molnar[PATCH] x86: introduce io_apic_irq_attr -v3
according to Ingo, some io_apic related function get too more parameter So reduce related funcs to get less param by passing io_apic_irq pointer
v2: io_apic_irq ==> irq_attr
triggering ==> trigger
v3: add set_io_apic_irq_attr
[ Impact: cleanup ]
--- arch/x86/include/asm/hw_irq.h | 21 ++++++++++++++++-- arch/x86/include/asm/io_apic.h | 5 ++-- arch/x86/kernel/acpi/boot.c | 22 ++++++++++--------- arch/x86/kernel/apic/io_apic.c | 43 ++++++++++++++++++++++---------------- arch/x86/pci/irq.c | 16 ++++---------- drivers/pci/hotplug/ibmphp_core.c | 6 +---- 6 files changed, 66 insertions(+), 47 deletions(-)
arch/x86/include/asm/hw_irq.h +19 -2
@@ -66,9 +66,26 @@ extern unsigned long io_apic_irqs;extern void init_VISWS_APIC_irqs (void );extern void setup_IO_APIC (void );extern void disable_IO_APIC (void ); + +struct io_apic_irq_attr { +int ioapic; +int ioapic_pin; +int trigger; +int polarity; +}; + +static inline void set_io_apic_irq_attr (struct io_apic_irq_attr *irq_attr, +int ioapic,int ioapic_pin, +int trigger,int polarity) +{ + irq_attr->ioapic = ioapic; + irq_attr->ioapic_pin = ioapic_pin; + irq_attr->trigger = trigger; + irq_attr->polarity = polarity; +} +extern int IO_APIC_get_PCI_irq_vector (int bus,int devfn,int pin, -int *ioapic,int *ioapic_pin, -int *trigger,int *polarity); +struct io_apic_irq_attr *irq_attr);extern void setup_ioapic_dest (void );extern void enable_IO_APIC (void );
arch/x86/include/asm/io_apic.h +3 -2
@@ -156,8 +156,9 @@ extern int io_apic_get_version(int ioapiextern int io_apic_get_redir_entries (int ioapic);#endif /* CONFIG_ACPI */ -extern int io_apic_set_pci_routing (struct device *dev,int ioapic,int pin, -int irq,int edge_level,int active_high_low); +struct io_apic_irq_attr ; +extern int io_apic_set_pci_routing (struct device *dev,int irq, +struct io_apic_irq_attr *irq_attr);extern int (*ioapic_renumber_irq)(int ioapic,int irq);extern void ioapic_init_mappings (void );
arch/x86/kernel/acpi/boot.c +12 -10
@@ -523,7 +523,7 @@ int acpi_gsi_to_irq(u32 gsi, unsigned in* success: return IRQ number (>=0) * failure: return < 0 */ -int acpi_register_gsi (struct device *dev,u32 gsi,int triggering,int polarity) +int acpi_register_gsi (struct device *dev,u32 gsi,int trigger,int polarity) {unsigned int irq;unsigned int plat_gsi = gsi;
@@ -533,14 +533,14 @@ int acpi_register_gsi(struct device *dev* Make sure all (legacy) PCI IRQs are set as level-triggered. */ if (acpi_irq_model ==ACPI_IRQ_MODEL_PIC ) { -if (triggering ==ACPI_LEVEL_SENSITIVE ) +if (trigger ==ACPI_LEVEL_SENSITIVE )eisa_set_level_irq (gsi); }#endif #ifdef CONFIG_X86_IO_APIC if (acpi_irq_model ==ACPI_IRQ_MODEL_IOAPIC ) { - plat_gsi =mp_register_gsi (dev, gsi, triggering, polarity); + plat_gsi =mp_register_gsi (dev, gsi, trigger, polarity); }#endif acpi_gsi_to_irq (plat_gsi, &irq);
@@ -1156,7 +1156,7 @@ void __init mp_config_acpi_legacy_irqs(v } } -static int mp_config_acpi_gsi (struct device *dev,u32 gsi,int triggering, +static int mp_config_acpi_gsi (struct device *dev,u32 gsi,int trigger,int polarity) {#ifdef CONFIG_X86_MPPARSE
@@ -1181,7 +1181,7 @@ static int mp_config_acpi_gsi(struct dev/* print the entry should happen on mptable identically */ mp_irq.type =MP_INTSRC ; mp_irq.irqtype = mp_INT; - mp_irq.irqflag = (triggering ==ACPI_EDGE_SENSITIVE ?4 :0x0c ) | + mp_irq.irqflag = (trigger ==ACPI_EDGE_SENSITIVE ?4 :0x0c ) | (polarity ==ACPI_ACTIVE_HIGH ?1 :3 ); mp_irq.srcbus = number; mp_irq.srcbusirq = (((devfn >>3 ) &0x1f ) <<2 ) | ((pin -1 ) &3 );
@@ -1194,10 +1194,11 @@ static int mp_config_acpi_gsi(struct devreturn 0 ; } -int mp_register_gsi (struct device *dev,u32 gsi,int triggering,int polarity) +int mp_register_gsi (struct device *dev,u32 gsi,int trigger,int polarity) {int ioapic;int ioapic_pin; +struct io_apic_irq_attr irq_attr;if (acpi_irq_model !=ACPI_IRQ_MODEL_IOAPIC )return gsi;
@@ -1225,11 +1226,12 @@ int mp_register_gsi(struct device *dev, ioapic_pin);return gsi; } -mp_config_acpi_gsi (dev, gsi, triggering, polarity); +mp_config_acpi_gsi (dev, gsi, trigger, polarity); -io_apic_set_pci_routing (dev, ioapic, ioapic_pin, gsi, - triggering ==ACPI_EDGE_SENSITIVE ?0 :1 , - polarity ==ACPI_ACTIVE_HIGH ?0 :1 ); +set_io_apic_irq_attr (&irq_attr, ioapic, ioapic_pin, + trigger ==ACPI_EDGE_SENSITIVE ?0 :1 , + polarity ==ACPI_ACTIVE_HIGH ?0 :1 ); +io_apic_set_pci_routing (dev, gsi, &irq_attr);return gsi; }
arch/x86/kernel/apic/io_apic.c +25 -18
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arch/x86/pci/irq.c +5 -11
@@ -1200,14 +1200,11 @@ static int pirq_enable_irq(struct pci_de#ifdef CONFIG_X86_IO_APIC struct pci_dev *temp_dev;int irq; -int ioapic =-1 , ioapic_pin =-1 ; -int triggering, polarity; +struct io_apic_irq_attr irq_attr; irq =IO_APIC_get_PCI_irq_vector (dev->bus->number,PCI_SLOT (dev->devfn), - pin -1 , - &ioapic, &ioapic_pin, - &triggering, &polarity); + pin -1 , &irq_attr);/* * Busses behind bridges are typically not listed in the MP-table. * In this case we have to look up the IRQ based on the parent bus,
@@ -1221,9 +1218,7 @@ static int pirq_enable_irq(struct pci_de pin =pci_swizzle_interrupt_pin (dev, pin); irq =IO_APIC_get_PCI_irq_vector (bridge->bus->number,PCI_SLOT (bridge->devfn), - pin -1 , - &ioapic, &ioapic_pin, - &triggering, &polarity); + pin -1 , &irq_attr);if (irq >=0 ) dev_warn(&dev->dev, "using bridge %s " "INT %c to get IRQ %d\n",
@@ -1233,9 +1228,8 @@ static int pirq_enable_irq(struct pci_de } dev = temp_dev;if (irq >=0 ) { -io_apic_set_pci_routing (&dev->dev, ioapic, - ioapic_pin, irq, - triggering, polarity); +io_apic_set_pci_routing (&dev->dev, irq, + &irq_attr); dev->irq = irq;dev_info (&dev->dev,"PCI->APIC IRQ transform: " "INT %c -> IRQ %d\n" ,'A' + pin -1 , irq);
drivers/pci/hotplug/ibmphp_core.c +2 -4
@@ -155,15 +155,13 @@ int ibmphp_init_devno(struct slot **cur_for (loop =0 ; loop < len; loop++) {if ((*cur_slot)->number == rtable->slots[loop].slot && (*cur_slot)->bus == rtable->slots[loop].bus) { -int ioapic =-1 , ioapic_pin =-1 ; -int triggering, polarity; +struct io_apic_irq_attr irq_attr; (*cur_slot)->device =PCI_SLOT (rtable->slots[loop].devfn);for (i =0 ; i <4 ; i++) (*cur_slot)->irq[i] =IO_APIC_get_PCI_irq_vector ((int ) (*cur_slot)->bus, (int ) (*cur_slot)->device, i, - &ioapic, &ioapic_pin, - &triggering, &polarity); + &irq_attr);debug ("(*cur_slot)->irq[0] = %x\n" , (*cur_slot)->irq[0 ]);
[tip:irq/numa] x86, apic: introduce io_apic_irq_attr
In reply to Yinghai LuCommit-ID: e5198075c67a22ec9a09565b1ce88d3d3f5ba855 Gitweb: http://git.kernel.org/tip/e5198075c67a22ec9a09565b1ce88d3d3f5ba855 Author: Yinghai Lu <[email protected]> AuthorDate: Fri, 15 May 2009 13:05:16 -0700 Committer: Ingo Molnar <[email protected]> CommitDate: Mon, 18 May 2009 08:38:55 +0200
x86, apic: introduce io_apic_irq_attr
according to Ingo, io_apic irq-setup related functions have too many parameters with a repetitive signature.
So reduce related funcs to get less params by passing a pointer to a newly defined io_apic_irq_attr structure.
v2: io_apic_irq ==> irq_attr
triggering ==> trigger
v3: add set_io_apic_irq_attr
[ Impact: cleanup ]
LKML-Reference: <[email protected]>
--- arch/x86/include/asm/hw_irq.h | 21 ++++++++++++++++- arch/x86/include/asm/io_apic.h | 5 ++- arch/x86/kernel/acpi/boot.c | 22 ++++++++++-------- arch/x86/kernel/apic/io_apic.c | 43 +++++++++++++++++++++--------------- arch/x86/pci/irq.c | 16 ++++--------- drivers/pci/hotplug/ibmphp_core.c | 6 +--- 6 files changed, 66 insertions(+), 47 deletions(-)
arch/x86/include/asm/hw_irq.h +19 -2
@@ -63,9 +63,26 @@ extern unsigned long io_apic_irqs;extern void init_VISWS_APIC_irqs (void );extern void setup_IO_APIC (void );extern void disable_IO_APIC (void ); + +struct io_apic_irq_attr { +int ioapic; +int ioapic_pin; +int trigger; +int polarity; +}; + +static inline void set_io_apic_irq_attr (struct io_apic_irq_attr *irq_attr, +int ioapic,int ioapic_pin, +int trigger,int polarity) +{ + irq_attr->ioapic = ioapic; + irq_attr->ioapic_pin = ioapic_pin; + irq_attr->trigger = trigger; + irq_attr->polarity = polarity; +} +extern int IO_APIC_get_PCI_irq_vector (int bus,int devfn,int pin, -int *ioapic,int *ioapic_pin, -int *trigger,int *polarity); +struct io_apic_irq_attr *irq_attr);extern void setup_ioapic_dest (void );extern void enable_IO_APIC (void );
arch/x86/include/asm/io_apic.h +3 -2
@@ -156,8 +156,9 @@ extern int io_apic_get_version(int ioapic);extern int io_apic_get_redir_entries (int ioapic);#endif /* CONFIG_ACPI */ -extern int io_apic_set_pci_routing (struct device *dev,int ioapic,int pin, -int irq,int edge_level,int active_high_low); +struct io_apic_irq_attr ; +extern int io_apic_set_pci_routing (struct device *dev,int irq, +struct io_apic_irq_attr *irq_attr);extern int (*ioapic_renumber_irq)(int ioapic,int irq);extern void ioapic_init_mappings (void );
arch/x86/kernel/acpi/boot.c +12 -10
@@ -523,7 +523,7 @@ int acpi_gsi_to_irq(u32 gsi, unsigned int *irq)* success: return IRQ number (>=0) * failure: return < 0 */ -int acpi_register_gsi (struct device *dev,u32 gsi,int triggering,int polarity) +int acpi_register_gsi (struct device *dev,u32 gsi,int trigger,int polarity) {unsigned int irq;unsigned int plat_gsi = gsi;
@@ -533,14 +533,14 @@ int acpi_register_gsi(struct device *dev, u32 gsi, int triggering, int polarity)* Make sure all (legacy) PCI IRQs are set as level-triggered. */ if (acpi_irq_model ==ACPI_IRQ_MODEL_PIC ) { -if (triggering ==ACPI_LEVEL_SENSITIVE ) +if (trigger ==ACPI_LEVEL_SENSITIVE )eisa_set_level_irq (gsi); }#endif #ifdef CONFIG_X86_IO_APIC if (acpi_irq_model ==ACPI_IRQ_MODEL_IOAPIC ) { - plat_gsi =mp_register_gsi (dev, gsi, triggering, polarity); + plat_gsi =mp_register_gsi (dev, gsi, trigger, polarity); }#endif acpi_gsi_to_irq (plat_gsi, &irq);
@@ -1156,7 +1156,7 @@ void __init mp_config_acpi_legacy_irqs(void) } } -static int mp_config_acpi_gsi (struct device *dev,u32 gsi,int triggering, +static int mp_config_acpi_gsi (struct device *dev,u32 gsi,int trigger,int polarity) {#ifdef CONFIG_X86_MPPARSE
@@ -1181,7 +1181,7 @@ static int mp_config_acpi_gsi(struct device *dev, u32 gsi, int triggering,/* print the entry should happen on mptable identically */ mp_irq.type =MP_INTSRC ; mp_irq.irqtype = mp_INT; - mp_irq.irqflag = (triggering ==ACPI_EDGE_SENSITIVE ?4 :0x0c ) | + mp_irq.irqflag = (trigger ==ACPI_EDGE_SENSITIVE ?4 :0x0c ) | (polarity ==ACPI_ACTIVE_HIGH ?1 :3 ); mp_irq.srcbus = number; mp_irq.srcbusirq = (((devfn >>3 ) &0x1f ) <<2 ) | ((pin -1 ) &3 );
@@ -1194,10 +1194,11 @@ static int mp_config_acpi_gsi(struct device *dev, u32 gsi, int triggering,return 0 ; } -int mp_register_gsi (struct device *dev,u32 gsi,int triggering,int polarity) +int mp_register_gsi (struct device *dev,u32 gsi,int trigger,int polarity) {int ioapic;int ioapic_pin; +struct io_apic_irq_attr irq_attr;if (acpi_irq_model !=ACPI_IRQ_MODEL_IOAPIC )return gsi;
@@ -1225,11 +1226,12 @@ int mp_register_gsi(struct device *dev, u32 gsi, int triggering, int polarity) ioapic_pin);return gsi; } -mp_config_acpi_gsi (dev, gsi, triggering, polarity); +mp_config_acpi_gsi (dev, gsi, trigger, polarity); -io_apic_set_pci_routing (dev, ioapic, ioapic_pin, gsi, - triggering ==ACPI_EDGE_SENSITIVE ?0 :1 , - polarity ==ACPI_ACTIVE_HIGH ?0 :1 ); +set_io_apic_irq_attr (&irq_attr, ioapic, ioapic_pin, + trigger ==ACPI_EDGE_SENSITIVE ?0 :1 , + polarity ==ACPI_ACTIVE_HIGH ?0 :1 ); +io_apic_set_pci_routing (dev, gsi, &irq_attr);return gsi; }
arch/x86/kernel/apic/io_apic.c +25 -18
100 lines not on this page · raw message
arch/x86/pci/irq.c +5 -11
@@ -1200,14 +1200,11 @@ static int pirq_enable_irq(struct pci_dev *dev)#ifdef CONFIG_X86_IO_APIC struct pci_dev *temp_dev;int irq; -int ioapic =-1 , ioapic_pin =-1 ; -int triggering, polarity; +struct io_apic_irq_attr irq_attr; irq =IO_APIC_get_PCI_irq_vector (dev->bus->number,PCI_SLOT (dev->devfn), - pin -1 , - &ioapic, &ioapic_pin, - &triggering, &polarity); + pin -1 , &irq_attr);/* * Busses behind bridges are typically not listed in the MP-table. * In this case we have to look up the IRQ based on the parent bus,
@@ -1221,9 +1218,7 @@ static int pirq_enable_irq(struct pci_dev *dev) pin =pci_swizzle_interrupt_pin (dev, pin); irq =IO_APIC_get_PCI_irq_vector (bridge->bus->number,PCI_SLOT (bridge->devfn), - pin -1 , - &ioapic, &ioapic_pin, - &triggering, &polarity); + pin -1 , &irq_attr);if (irq >=0 ) dev_warn(&dev->dev, "using bridge %s " "INT %c to get IRQ %d\n",
@@ -1233,9 +1228,8 @@ static int pirq_enable_irq(struct pci_dev *dev) } dev = temp_dev;if (irq >=0 ) { -io_apic_set_pci_routing (&dev->dev, ioapic, - ioapic_pin, irq, - triggering, polarity); +io_apic_set_pci_routing (&dev->dev, irq, + &irq_attr); dev->irq = irq;dev_info (&dev->dev,"PCI->APIC IRQ transform: " "INT %c -> IRQ %d\n" ,'A' + pin -1 , irq);
drivers/pci/hotplug/ibmphp_core.c +2 -4
@@ -155,15 +155,13 @@ int ibmphp_init_devno(struct slot **cur_slot)for (loop =0 ; loop < len; loop++) {if ((*cur_slot)->number == rtable->slots[loop].slot && (*cur_slot)->bus == rtable->slots[loop].bus) { -int ioapic =-1 , ioapic_pin =-1 ; -int triggering, polarity; +struct io_apic_irq_attr irq_attr; (*cur_slot)->device =PCI_SLOT (rtable->slots[loop].devfn);for (i =0 ; i <4 ; i++) (*cur_slot)->irq[i] =IO_APIC_get_PCI_irq_vector ((int ) (*cur_slot)->bus, (int ) (*cur_slot)->device, i, - &ioapic, &ioapic_pin, - &triggering, &polarity); + &irq_attr);debug ("(*cur_slot)->irq[0] = %x\n" , (*cur_slot)->irq[0 ]);
Re: [PATCH 5/7] x86/pci: add 4 more return param in IO_APIC_get_PCI_irq_vector
In reply to Yinghai Luhm, you broke the build:
drivers/pci/hotplug/ibmphp_core.c: In function ‘ibmphp_init_devno’:drivers/pci/hotplug/ibmphp_core.c:165: error: expected identifier before ‘&’ token drivers/pci/hotplug/ibmphp_core.c:166: error: too few arguments to function ‘IO_APIC_get_PCI_irq_vector’
Ingo
[tip:irq/numa] x86/pci: add 4 more return parameters to IO_APIC_get_PCI_irq_vector()
In reply to Yinghai LuCommit-ID: e20c06fd6950265a899edd96a02dc2e6ae2d1ce5 Gitweb: http://git.kernel.org/tip/e20c06fd6950265a899edd96a02dc2e6ae2d1ce5 Author: Yinghai Lu <[email protected]> AuthorDate: Wed, 6 May 2009 10:08:22 -0700 Committer: Ingo Molnar <[email protected]> CommitDate: Mon, 11 May 2009 10:35:09 +0200
x86/pci: add 4 more return parameters to IO_APIC_get_PCI_irq_vector()
To prepare those params for pcibios_irq_enable() to call setup_io_apic_routing().
[ Impact: extend function call API to prepare for new functionality ]
LKML-Reference: <[email protected]>
--- arch/x86/include/asm/hw_irq.h | 4 +- arch/x86/kernel/apic/io_apic.c | 107 ++++++++++++++++++++---------------- arch/x86/pci/irq.c | 24 +++++++-- drivers/pci/hotplug/ibmphp_core.c | 56 ++++++++++--------- 4 files changed, 112 insertions(+), 79 deletions(-)
arch/x86/include/asm/hw_irq.h +3 -1
@@ -63,7 +63,9 @@ extern unsigned long io_apic_irqs;extern void init_VISWS_APIC_irqs (void );extern void setup_IO_APIC (void );extern void disable_IO_APIC (void ); -extern int IO_APIC_get_PCI_irq_vector (int bus,int slot,int fn); +extern int IO_APIC_get_PCI_irq_vector (int bus,int devfn,int pin, +int *ioapic,int *ioapic_pin, +int *trigger,int *polarity);extern void setup_ioapic_dest (void );extern void enable_IO_APIC (void );
arch/x86/kernel/apic/io_apic.c +59 -48
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arch/x86/pci/irq.c +20 -4
@@ -1051,12 +1051,16 @@ static void __init pcibios_fixup_irqs(void)*/ if (io_apic_assign_pci_irqs) {int irq; +int ioapic =-1 , ioapic_pin =-1 ; +int triggering, polarity;/* * interrupt pins are numbered starting from 1 */ irq =IO_APIC_get_PCI_irq_vector (dev->bus->number, -PCI_SLOT (dev->devfn), pin -1 ); +PCI_SLOT (dev->devfn), pin -1 , + &ioapic, &ioapic_pin, + &triggering, &polarity);/* * Busses behind bridges are typically not listed in the * MP-table. In this case we have to look up the IRQ
@@ -1072,7 +1076,10 @@ static void __init pcibios_fixup_irqs(void) pin =pci_swizzle_interrupt_pin (dev, pin); bus = bridge->bus->number; irq =IO_APIC_get_PCI_irq_vector (bus, -PCI_SLOT (bridge->devfn), pin -1 ); +PCI_SLOT (bridge->devfn), + pin -1 , + &ioapic, &ioapic_pin, + &triggering, &polarity);if (irq >=0 )dev_warn (&dev->dev, "using bridge %s INT %c to "
@@ -1221,8 +1228,14 @@ static int pirq_enable_irq(struct pci_dev *dev)if (io_apic_assign_pci_irqs) {int irq; +int ioapic =-1 , ioapic_pin =-1 ; +int triggering, polarity; - irq =IO_APIC_get_PCI_irq_vector (dev->bus->number,PCI_SLOT (dev->devfn), pin -1 ); + irq =IO_APIC_get_PCI_irq_vector (dev->bus->number, +PCI_SLOT (dev->devfn), + pin -1 , + &ioapic, &ioapic_pin, + &triggering, &polarity);/* * Busses behind bridges are typically not listed in the MP-table. * In this case we have to look up the IRQ based on the parent bus,
@@ -1235,7 +1248,10 @@ static int pirq_enable_irq(struct pci_dev *dev) pin =pci_swizzle_interrupt_pin (dev, pin); irq =IO_APIC_get_PCI_irq_vector (bridge->bus->number, -PCI_SLOT (bridge->devfn), pin -1 ); +PCI_SLOT (bridge->devfn), + pin -1 , + &ioapic, &ioapic_pin, + &triggering, &polarity);if (irq >=0 ) dev_warn(&dev->dev, "using bridge %s " "INT %c to get IRQ %d\n",
drivers/pci/hotplug/ibmphp_core.c +30 -26
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PATCH 6/7 x86/acpi: move setup io apic routing out of ACPI macro scope
In reply to Yinghai Luso we could set io apic routing when ACPI is not set
--- arch/x86/include/asm/io_apic.h | 4 - arch/x86/kernel/apic/io_apic.c | 122 ++++++++++++++++++++--------------------- 2 files changed, 63 insertions(+), 63 deletions(-)
arch/x86/kernel/apic/io_apic.c +61 -61
@@ -3840,6 +3840,67 @@ int __init arch_probe_nr_irqs(void) }#endif +static int __io_apic_set_pci_routing (struct device *dev,int ioapic,int pin,int irq, +int triggering,int polarity) +{ +struct irq_desc *desc; +struct irq_cfg *cfg; +int node; + +if (!IO_APIC_IRQ (irq)) { +apic_printk (APIC_QUIET ,KERN_ERR "IOAPIC[%d]: Invalid reference to IRQ 0\n" , + ioapic); +return -EINVAL ; + } + +if (dev) + node =dev_to_node (dev); +else + node =cpu_to_node (boot_cpu_id); + + desc =irq_to_desc_alloc_node (irq, node); +if (!desc) { +printk (KERN_INFO "can not get irq_desc %d\n" , irq); +return 0 ; + } + +/* +* IRQs < 16 are already in the irq_2_pin[] map +*/ +if (irq >=NR_IRQS_LEGACY ) { + cfg = desc->chip_data; +add_pin_to_irq_node (cfg, node, ioapic, pin); + } + +setup_IO_APIC_irq (ioapic, pin, irq, desc, triggering, polarity); + +return 0 ; +} + +static struct { + DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1); +} mp_ioapic_routing[MAX_IO_APICS ]; + +int io_apic_set_pci_routing (struct device *dev,int ioapic,int pin,int irq, +int triggering,int polarity) +{ + +/* +* Avoid pin reprogramming. PRTs typically include entries +* with redundant pin->gsi mappings (but unique PCI devices); +* we only program the IOAPIC on the first. +*/ +if (test_bit (pin, mp_ioapic_routing[ioapic].pin_programmed)) { +pr_debug ("Pin %d-%d already programmed\n" , + mp_ioapics[ioapic].apicid, pin); +return 0 ; + } +set_bit (pin, mp_ioapic_routing[ioapic].pin_programmed); + +return __io_apic_set_pci_routing (dev, ioapic, pin, irq, + triggering, polarity); +} +/* -------------------------------------------------------------------------- ACPI-based IOAPIC Configuration -------------------------------------------------------------------------- */
@@ -3934,67 +3995,6 @@ int __init io_apic_get_version(int ioapi }#endif -static int __io_apic_set_pci_routing (struct device *dev,int ioapic,int pin,int irq, -int triggering,int polarity) -{ -struct irq_desc *desc; -struct irq_cfg *cfg; -int node; - -if (!IO_APIC_IRQ (irq)) { -apic_printk (APIC_QUIET ,KERN_ERR "IOAPIC[%d]: Invalid reference to IRQ 0\n" , - ioapic); -return -EINVAL ; - } - -if (dev) - node =dev_to_node (dev); -else - node =cpu_to_node (boot_cpu_id); - - desc =irq_to_desc_alloc_node (irq, node); -if (!desc) { -printk (KERN_INFO "can not get irq_desc %d\n" , irq); -return 0 ; - } - -/* -* IRQs < 16 are already in the irq_2_pin[] map -*/ -if (irq >=NR_IRQS_LEGACY ) { - cfg = desc->chip_data; -add_pin_to_irq_node (cfg, node, ioapic, pin); - } - -setup_IO_APIC_irq (ioapic, pin, irq, desc, triggering, polarity); - -return 0 ; -} - -static struct { - DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1); -} mp_ioapic_routing[MAX_IO_APICS ]; - -int io_apic_set_pci_routing (struct device *dev,int ioapic,int pin,int irq, -int triggering,int polarity) -{ - -/* -* Avoid pin reprogramming. PRTs typically include entries -* with redundant pin->gsi mappings (but unique PCI devices); -* we only program the IOAPIC on the first. -*/ -if (test_bit (pin, mp_ioapic_routing[ioapic].pin_programmed)) { -pr_debug ("Pin %d-%d already programmed\n" , - mp_ioapics[ioapic].apicid, pin); -return 0 ; - } -set_bit (pin, mp_ioapic_routing[ioapic].pin_programmed); - -return __io_apic_set_pci_routing (dev, ioapic, pin, irq, - triggering, polarity); -} -int acpi_get_override_irq (int bus_irq,int *trigger,int *polarity) {int i;
arch/x86/include/asm/io_apic.h +2 -2
@@ -154,10 +154,10 @@ extern int timer_through_8259;extern int io_apic_get_unique_id (int ioapic,int apic_id);extern int io_apic_get_version (int ioapic);extern int io_apic_get_redir_entries (int ioapic); -extern int io_apic_set_pci_routing (struct device *dev,int ioapic,int pin, -int irq,int edge_level,int active_high_low);#endif /* CONFIG_ACPI */ +extern int io_apic_set_pci_routing (struct device *dev,int ioapic,int pin, +int irq,int edge_level,int active_high_low);extern int (*ioapic_renumber_irq)(int ioapic,int irq);extern void ioapic_init_mappings (void );
[tip:irq/numa] x86/acpi: move setup io apic routing out of CONFIG_ACPI scope
Commit-ID: 5ef2183768bb7d64b85eccbfa1537a61cbefa97c Gitweb: http://git.kernel.org/tip/5ef2183768bb7d64b85eccbfa1537a61cbefa97c Author: Yinghai Lu <[email protected]> AuthorDate: Wed, 6 May 2009 10:08:50 -0700 Committer: Ingo Molnar <[email protected]> CommitDate: Mon, 11 May 2009 10:35:09 +0200
x86/acpi: move setup io apic routing out of CONFIG_ACPI scope
So we could set io apic routing when ACPI is not enabled.
[ Impact: prepare for new functionality ]
LKML-Reference: <[email protected]>
--- arch/x86/include/asm/io_apic.h | 4 +- arch/x86/kernel/apic/io_apic.c | 122 ++++++++++++++++++++-------------------- 2 files changed, 63 insertions(+), 63 deletions(-)
arch/x86/include/asm/io_apic.h +2 -2
@@ -154,10 +154,10 @@ extern int timer_through_8259;extern int io_apic_get_unique_id (int ioapic,int apic_id);extern int io_apic_get_version (int ioapic);extern int io_apic_get_redir_entries (int ioapic); -extern int io_apic_set_pci_routing (struct device *dev,int ioapic,int pin, -int irq,int edge_level,int active_high_low);#endif /* CONFIG_ACPI */ +extern int io_apic_set_pci_routing (struct device *dev,int ioapic,int pin, +int irq,int edge_level,int active_high_low);extern int (*ioapic_renumber_irq)(int ioapic,int irq);extern void ioapic_init_mappings (void );
arch/x86/kernel/apic/io_apic.c +61 -61
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PATCH 7/7 x86/pci: update pirq_enable_irq to setup io apic routing -v2
In reply to Yinghai Luso we could set io apic routing only when enable device irq.
also could make setup_IO_APIC_irqs and setup_ioapic_dest only handle first ioapic...
v2: remove one one not needed style change.
merge the patch only setup io_apic for acpi on in setup_IO_APIC_irqs
[ Impact: make mptable irq enable more like acpi is used, and numa_irq_desc could get correct node when acpi=off ]
--- arch/x86/kernel/apic/io_apic.c | 148 ++++++++++++++++++++--------------------- arch/x86/pci/irq.c | 84 ++++++++--------------- 2 files changed, 103 insertions(+), 129 deletions(-)
arch/x86/kernel/apic/io_apic.c +73 -75
@@ -1481,9 +1481,13 @@ static void setup_IO_APIC_irq(int apic_iioapic_write_entry (apic_id, pin, entry); } +static struct { + DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1); +} mp_ioapic_routing[MAX_IO_APICS ]; +static void __init setup_IO_APIC_irqs (void ) { -int apic_id, pin, idx, irq; +int apic_id =0 , pin, idx, irq;int notcon =0 ;struct irq_desc *desc;struct irq_cfg *cfg;
@@ -1491,48 +1495,53 @@ static void __init setup_IO_APIC_irqs(voapic_printk (APIC_VERBOSE ,KERN_DEBUG "init IO_APIC IRQs\n" ); -for (apic_id =0 ; apic_id < nr_ioapics; apic_id++) { -for (pin =0 ; pin < nr_ioapic_registers[apic_id]; pin++) { +#ifdef CONFIG_ACPI +if (!acpi_disabled && acpi_ioapic) { + apic_id =mp_find_ioapic (0 ); +if (apic_id <0 ) + apic_id =0 ; + } +#endif - idx =find_irq_entry (apic_id, pin, mp_INT); -if (idx ==-1 ) { -if (!notcon) { - notcon =1 ; -apic_printk (APIC_VERBOSE , -KERN_DEBUG " %d-%d" , - mp_ioapics[apic_id].apicid, pin); - }else -apic_printk (APIC_VERBOSE ," %d-%d" , - mp_ioapics[apic_id].apicid, pin); -continue ; - } -if (notcon) { +for (pin =0 ; pin < nr_ioapic_registers[apic_id]; pin++) { + idx =find_irq_entry (apic_id, pin, mp_INT); +if (idx ==-1 ) { +if (!notcon) { + notcon =1 ;apic_printk (APIC_VERBOSE , -" (apicid-pin) not connected\n" ); - notcon =0 ; - } +KERN_DEBUG " %d-%d" , + mp_ioapics[apic_id].apicid, pin); + }else +apic_printk (APIC_VERBOSE ," %d-%d" , + mp_ioapics[apic_id].apicid, pin); +continue ; + } +if (notcon) { +apic_printk (APIC_VERBOSE , +" (apicid-pin) not connected\n" ); + notcon =0 ; + } - irq =pin_2_irq (idx, apic_id, pin); + irq =pin_2_irq (idx, apic_id, pin); -/* -* Skip the timer IRQ if there's a quirk handler -* installed and if it returns 1: -*/ -if (apic->multi_timer_check && - apic->multi_timer_check (apic_id, irq)) -continue ; - - desc =irq_to_desc_alloc_node (irq, node); -if (!desc) { -printk (KERN_INFO "can not get irq_desc for %d\n" , irq); -continue ; - } - cfg = desc->chip_data; -add_pin_to_irq_node (cfg, node, apic_id, pin); +/* +* Skip the timer IRQ if there's a quirk handler +* installed and if it returns 1: +*/ +if (apic->multi_timer_check && + apic->multi_timer_check (apic_id, irq)) +continue ; -setup_IO_APIC_irq (apic_id, pin, irq, desc, -irq_trigger (idx),irq_polarity (idx)); + desc =irq_to_desc_alloc_node (irq, node); +if (!desc) { +printk (KERN_INFO "can not get irq_desc for %d\n" , irq); +continue ; } + cfg = desc->chip_data; +add_pin_to_irq_node (cfg, node, apic_id, pin); +set_bit (pin, mp_ioapic_routing[apic_id].pin_programmed); +setup_IO_APIC_irq (apic_id, pin, irq, desc, +irq_trigger (idx),irq_polarity (idx)); }if (notcon)
@@ -3877,10 +3886,6 @@ static int __io_apic_set_pci_routing(strreturn 0 ; } -static struct { - DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1); -} mp_ioapic_routing[MAX_IO_APICS ]; -int io_apic_set_pci_routing (struct device *dev,int ioapic,int pin,int irq,int triggering,int polarity) {
@@ -4024,51 +4029,44 @@ int acpi_get_override_irq(int bus_irq, i#ifdef CONFIG_SMP void __init setup_ioapic_dest (void ) { -int pin, ioapic, irq, irq_entry; +int pin, ioapic =0 , irq, irq_entry;struct irq_desc *desc; -struct irq_cfg *cfg;const struct cpumask *mask;if (skip_ioapic_setup ==1 )return ; -for (ioapic =0 ; ioapic < nr_ioapics; ioapic++) { -for (pin =0 ; pin < nr_ioapic_registers[ioapic]; pin++) { - irq_entry =find_irq_entry (ioapic, pin, mp_INT); -if (irq_entry ==-1 ) -continue ; - irq =pin_2_irq (irq_entry, ioapic, pin); - -/* setup_IO_APIC_irqs could fail to get vector for some device -* when you have too many devices, because at that time only boot -* cpu is online. -*/ - desc =irq_to_desc (irq); - cfg = desc->chip_data; -if (!cfg->vector) { -setup_IO_APIC_irq (ioapic, pin, irq, desc, -irq_trigger (irq_entry), -irq_polarity (irq_entry)); -continue ; +#ifdef CONFIG_ACPI +if (!acpi_disabled && acpi_ioapic) { + ioapic =mp_find_ioapic (0 ); +if (ioapic <0 ) + ioapic =0 ; + } +#endif - } +for (pin =0 ; pin < nr_ioapic_registers[ioapic]; pin++) { + irq_entry =find_irq_entry (ioapic, pin, mp_INT); +if (irq_entry ==-1 ) +continue ; + irq =pin_2_irq (irq_entry, ioapic, pin); -/* -* Honour affinities which have been set in early boot -*/ -if (desc->status & - (IRQ_NO_BALANCING |IRQ_AFFINITY_SET )) - mask = desc->affinity; -else - mask = apic->target_cpus (); + desc =irq_to_desc (irq); -if (intr_remapping_enabled) -set_ir_ioapic_affinity_irq_desc (desc, mask); -else -set_ioapic_affinity_irq_desc (desc, mask); - } +/* +* Honour affinities which have been set in early boot +*/ +if (desc->status & + (IRQ_NO_BALANCING |IRQ_AFFINITY_SET )) + mask = desc->affinity; +else + mask = apic->target_cpus (); +if (intr_remapping_enabled) +set_ir_ioapic_affinity_irq_desc (desc, mask); +else +set_ioapic_affinity_irq_desc (desc, mask); } + }#endif
arch/x86/pci/irq.c +30 -54
130 lines not on this page · raw message
Re: [PATCH 7/7] x86/pci: update pirq_enable_irq to setup io apic routing -v2
Quoted 9 lines · Yinghai Lu
so we could set io apic routing only when enable device irq.
also could make
setup_IO_APIC_irqsandsetup_ioapic_destonly handle first ioapic...v2: remove one one not needed style change.
merge the patch only setupio_apicfor acpi on insetup_IO_APIC_irqs
Quoted 8 lines
[ Impact: make mptable irq enable more like acpi is used, and
numa_irq_desccould get correct node when acpi=off ]Signed-off-by Yinghai Lu <[email protected]>--- arch/x86/kernel/apic/io_apic.c | 148 ++++++++++++++++++++--------------------- arch/x86/pci/irq.c | 84 ++++++++--------------- 2 files changed, 103 insertions(+), 129 deletions(-)
Jesse, did this patch have your Acked-by?
Ingo
Jesse Barnes
Acked-byRe: [PATCH 7/7] x86/pci: update pirq_enable_irq to setup io apic routing -v2
Quoted 18 lines · On Thu, 7 May 2009 16:12:22 +0200 Ingo Molnar <[email protected]> wrote:
Quoted 15 lines · Yinghai Lu
so we could set io apic routing only when enable device irq.
also could make
setup_IO_APIC_irqsandsetup_ioapic_destonly handle first ioapic...v2: remove one one not needed style change.
merge the patch only setupio_apicfor acpi on insetup_IO_APIC_irqs[ Impact: make mptable irq enable more like acpi is used, and
numa_irq_desccould get correct node when acpi=off ]Signed-off-by Yinghai Lu <[email protected]>
Quoted 7 lines
Quoted 5 lines
--- arch/x86/kernel/apic/io_apic.c | 148++++++++++++++++++++---------------------
arch/x86/pci/irq.c| 84 ++++++++--------------- 2
files changed, 103 insertions(+), 129 deletions(-)Jesse, did this patch have your Acked-by?
Yeah, both of them are fine with me. Ultimately you get to keep any broken pieces from io_apic changes anyway, right? :)
Re: [PATCH 7/7] x86/pci: update pirq_enable_irq to setup io apic routing -v2
Quoted 27 lines · Jesse Barnes
Quoted 24 lines · On Thu, 7 May 2009 16:12:22 +0200 Ingo Molnar <[email protected]> wrote:
Quoted 20 lines · Yinghai Lu
so we could set io apic routing only when enable device irq.
also could make
setup_IO_APIC_irqsandsetup_ioapic_destonly handle first ioapic...v2: remove one one not needed style change.
merge the patch only setupio_apicfor acpi on insetup_IO_APIC_irqs[ Impact: make mptable irq enable more like acpi is used, and
numa_irq_desccould get correct node when acpi=off ]Signed-off-by Yinghai Lu <[email protected]>--- arch/x86/kernel/apic/io_apic.c | 148++++++++++++++++++++---------------------
arch/x86/pci/irq.c| 84 ++++++++--------------- 2
files changed, 103 insertions(+), 129 deletions(-)
Quoted 4 lines
Quoted 1 line
Jesse, did this patch have your Acked-by?
Yeah, both of them are fine with me. Ultimately you get to keep any broken pieces from
io_apicchanges anyway, right? :)
Yeah, generally. But the wider the blame can be spread when it does break, the better! ;-)
Quoted 1 line
Acked-by Jesse Barnes <[email protected]>
Thanks!
Ingo
[tip:irq/numa] x86/pci: update pirq_enable_irq() to setup io apic routing
In reply to Yinghai LuCommit-ID: b9c61b70075c87a8612624736faf4a2de5b1ed30 Gitweb: http://git.kernel.org/tip/b9c61b70075c87a8612624736faf4a2de5b1ed30 Author: Yinghai Lu <[email protected]> AuthorDate: Wed, 6 May 2009 10:10:06 -0700 Committer: Ingo Molnar <[email protected]> CommitDate: Mon, 11 May 2009 10:35:10 +0200
x86/pci: update pirq_enable_irq() to setup io apic routing
So we can set io apic routing only when enabling the device irq.
This is advantageous for IRQ descriptor allocation affinity: if we set up the IO-APIC entry later, we have a chance to allocate the IRQ descriptor later and know which device it is on and can set affinity accordingly.
[ Impact: standardize/enhance irq-enabling sequence for mptable irqs ]
LKML-Reference: <[email protected]>
--- arch/x86/kernel/apic/io_apic.c | 150 ++++++++++++++++++++-------------------- arch/x86/pci/irq.c | 84 ++++++++-------------- 2 files changed, 104 insertions(+), 130 deletions(-)
arch/x86/kernel/apic/io_apic.c +74 -76
@@ -1480,9 +1480,13 @@ static void setup_IO_APIC_irq(int apic_id, int pin, unsigned int irq, struct irqioapic_write_entry (apic_id, pin, entry); } +static struct { + DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1); +} mp_ioapic_routing[MAX_IO_APICS ]; +static void __init setup_IO_APIC_irqs (void ) { -int apic_id, pin, idx, irq; +int apic_id =0 , pin, idx, irq;int notcon =0 ;struct irq_desc *desc;struct irq_cfg *cfg;
@@ -1490,48 +1494,53 @@ static void __init setup_IO_APIC_irqs(void)apic_printk (APIC_VERBOSE ,KERN_DEBUG "init IO_APIC IRQs\n" ); -for (apic_id =0 ; apic_id < nr_ioapics; apic_id++) { -for (pin =0 ; pin < nr_ioapic_registers[apic_id]; pin++) { - - idx =find_irq_entry (apic_id, pin, mp_INT); -if (idx ==-1 ) { -if (!notcon) { - notcon =1 ; -apic_printk (APIC_VERBOSE , -KERN_DEBUG " %d-%d" , - mp_ioapics[apic_id].apicid, pin); - }else -apic_printk (APIC_VERBOSE ," %d-%d" , - mp_ioapics[apic_id].apicid, pin); -continue ; - } -if (notcon) { -apic_printk (APIC_VERBOSE , -" (apicid-pin) not connected\n" ); - notcon =0 ; - } +#ifdef CONFIG_ACPI +if (!acpi_disabled && acpi_ioapic) { + apic_id =mp_find_ioapic (0 ); +if (apic_id <0 ) + apic_id =0 ; + } +#endif - irq =pin_2_irq (idx, apic_id, pin); +for (pin =0 ; pin < nr_ioapic_registers[apic_id]; pin++) { + idx =find_irq_entry (apic_id, pin, mp_INT); +if (idx ==-1 ) { +if (!notcon) { + notcon =1 ; +apic_printk (APIC_VERBOSE , +KERN_DEBUG " %d-%d" , + mp_ioapics[apic_id].apicid, pin); + }else +apic_printk (APIC_VERBOSE ," %d-%d" , + mp_ioapics[apic_id].apicid, pin); +continue ; + } +if (notcon) { +apic_printk (APIC_VERBOSE , +" (apicid-pin) not connected\n" ); + notcon =0 ; + } -/* -* Skip the timer IRQ if there's a quirk handler -* installed and if it returns 1: -*/ -if (apic->multi_timer_check && - apic->multi_timer_check (apic_id, irq)) -continue ; + irq =pin_2_irq (idx, apic_id, pin); - desc =irq_to_desc_alloc_node (irq, node); -if (!desc) { -printk (KERN_INFO "can not get irq_desc for %d\n" , irq); -continue ; - } - cfg = desc->chip_data; -add_pin_to_irq_node (cfg, node, apic_id, pin); +/* +* Skip the timer IRQ if there's a quirk handler +* installed and if it returns 1: +*/ +if (apic->multi_timer_check && + apic->multi_timer_check (apic_id, irq)) +continue ; -setup_IO_APIC_irq (apic_id, pin, irq, desc, -irq_trigger (idx),irq_polarity (idx)); + desc =irq_to_desc_alloc_node (irq, node); +if (!desc) { +printk (KERN_INFO "can not get irq_desc for %d\n" , irq); +continue ; } + cfg = desc->chip_data; +add_pin_to_irq_node (cfg, node, apic_id, pin); +set_bit (pin, mp_ioapic_routing[apic_id].pin_programmed); +setup_IO_APIC_irq (apic_id, pin, irq, desc, +irq_trigger (idx),irq_polarity (idx)); }if (notcon)
@@ -3876,10 +3885,6 @@ static int __io_apic_set_pci_routing(struct device *dev, int ioapic, int pin, inreturn 0 ; } -static struct { - DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1); -} mp_ioapic_routing[MAX_IO_APICS ]; -int io_apic_set_pci_routing (struct device *dev,int ioapic,int pin,int irq,int triggering,int polarity) {
@@ -4023,51 +4028,44 @@ int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity)#ifdef CONFIG_SMP void __init setup_ioapic_dest (void ) { -int pin, ioapic, irq, irq_entry; +int pin, ioapic =0 , irq, irq_entry;struct irq_desc *desc; -struct irq_cfg *cfg;const struct cpumask *mask;if (skip_ioapic_setup ==1 )return ; -for (ioapic =0 ; ioapic < nr_ioapics; ioapic++) { -for (pin =0 ; pin < nr_ioapic_registers[ioapic]; pin++) { - irq_entry =find_irq_entry (ioapic, pin, mp_INT); -if (irq_entry ==-1 ) -continue ; - irq =pin_2_irq (irq_entry, ioapic, pin); - -/* setup_IO_APIC_irqs could fail to get vector for some device -* when you have too many devices, because at that time only boot -* cpu is online. -*/ - desc =irq_to_desc (irq); - cfg = desc->chip_data; -if (!cfg->vector) { -setup_IO_APIC_irq (ioapic, pin, irq, desc, -irq_trigger (irq_entry), -irq_polarity (irq_entry)); -continue ; +#ifdef CONFIG_ACPI +if (!acpi_disabled && acpi_ioapic) { + ioapic =mp_find_ioapic (0 ); +if (ioapic <0 ) + ioapic =0 ; + } +#endif - } +for (pin =0 ; pin < nr_ioapic_registers[ioapic]; pin++) { + irq_entry =find_irq_entry (ioapic, pin, mp_INT); +if (irq_entry ==-1 ) +continue ; + irq =pin_2_irq (irq_entry, ioapic, pin); -/* -* Honour affinities which have been set in early boot -*/ -if (desc->status & - (IRQ_NO_BALANCING |IRQ_AFFINITY_SET )) - mask = desc->affinity; -else - mask = apic->target_cpus (); + desc =irq_to_desc (irq); -if (intr_remapping_enabled) -set_ir_ioapic_affinity_irq_desc (desc, mask); -else -set_ioapic_affinity_irq_desc (desc, mask); - } +/* +* Honour affinities which have been set in early boot +*/ +if (desc->status & + (IRQ_NO_BALANCING |IRQ_AFFINITY_SET )) + mask = desc->affinity; +else + mask = apic->target_cpus (); +if (intr_remapping_enabled) +set_ir_ioapic_affinity_irq_desc (desc, mask); +else +set_ioapic_affinity_irq_desc (desc, mask); } + }#endif
arch/x86/pci/irq.c +30 -54
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[tip:irq/numa] x86/acpi: remove irq-compression trick on 32-bit
In reply to Yinghai LuCommit-ID: b9e0353fc85dab4ef5ebcef2bd09ebc4ce6d5a7b Gitweb: http://git.kernel.org/tip/b9e0353fc85dab4ef5ebcef2bd09ebc4ce6d5a7b Author: Yinghai Lu <[email protected]> AuthorDate: Wed, 6 May 2009 10:05:32 -0700 Committer: Ingo Molnar <[email protected]> CommitDate: Mon, 11 May 2009 10:35:06 +0200
x86/acpi: remove irq-compression trick on 32-bit
We already have a per cpu vector on 32-bit via recent changes, and don't need this trick any more (which trick obfuscates the real GSI mappings and which only triggers on larger systems to begin with):
On 3 ioapic system (24 per ioapic) before patch I got:
ACPI: PCI Interrupt Link [ILSB] enabled at IRQ 71
IOAPIC[2]: Set routing entry (10-23 -> 0xa9 -> IRQ 64 Mode:1 Active:1) pci 0000:80:01.1: PCI INT A -> Link[ILSB] -> GSI 71 (level, low) -> IRQ 64
ACPI: PCI Interrupt Link [LE5B] enabled at IRQ 67
IOAPIC[2]: Set routing entry (10-19 -> 0xb1 -> IRQ 65 Mode:1 Active:1) pci 0000:83:00.0: PCI INT B -> Link[LE5B] -> GSI 67 (level, low) -> IRQ 65
ACPI: PCI Interrupt Link [LE5A] enabled at IRQ 66
IOAPIC[2]: Set routing entry (10-18 -> 0xb9 -> IRQ 66 Mode:1 Active:1) pci 0000:83:00.1: PCI INT A -> Link[LE5A] -> GSI 66 (level, low) -> IRQ 66
ACPI: PCI Interrupt Link [LE5D] enabled at IRQ 65
IOAPIC[2]: Set routing entry (10-17 -> 0xc1 -> IRQ 67 Mode:1 Active:1) pci 0000:84:00.0: PCI INT B -> Link[LE5D] -> GSI 65 (level, low) -> IRQ 67
ACPI: PCI Interrupt Link [LE5C] enabled at IRQ 64
IOAPIC[2]: Set routing entry (10-16 -> 0xc9 -> IRQ 68 Mode:1 Active:1) pci 0000:84:00.1: PCI INT A -> Link[LE5C] -> GSI 64 (level, low) -> IRQ 68 pci 0000:87:00.0: PCI INT B -> Link[LE5A] -> GSI 66 (level, low) -> IRQ 66 pci 0000:87:00.1: PCI INT A -> Link[LE5D] -> GSI 65 (level, low) -> IRQ 67 pci 0000:88:00.0: PCI INT B -> Link[LE5C] -> GSI 64 (level, low) -> IRQ 68 pci 0000:88:00.1: PCI INT A -> Link[LE5B] -> GSI 67 (level, low) -> IRQ 65 pci 0000:8b:00.0: PCI INT B -> Link[LE5A] -> GSI 66 (level, low) -> IRQ 66 pci 0000:8b:00.1: PCI INT A -> Link[LE5D] -> GSI 65 (level, low) -> IRQ 67 pci 0000:8c:00.0: PCI INT B -> Link[LE5C] -> GSI 64 (level, low) -> IRQ 68 pci 0000:8c:00.1: PCI INT A -> Link[LE5B] -> GSI 67 (level, low) -> IRQ 65
after the patch we get:
ACPI: PCI Interrupt Link [ILSB] enabled at IRQ 71
IOAPIC[2]: Set routing entry (10-23 -> 0xa9 -> IRQ 71 Mode:1 Active:1) pci 0000:80:01.1: PCI INT A -> Link[ILSB] -> GSI 71 (level, low) -> IRQ 71
ACPI: PCI Interrupt Link [LE5B] enabled at IRQ 67
IOAPIC[2]: Set routing entry (10-19 -> 0xb1 -> IRQ 67 Mode:1 Active:1) pci 0000:83:00.0: PCI INT B -> Link[LE5B] -> GSI 67 (level, low) -> IRQ 67
ACPI: PCI Interrupt Link [LE5A] enabled at IRQ 66
IOAPIC[2]: Set routing entry (10-18 -> 0xb9 -> IRQ 66 Mode:1 Active:1) pci 0000:83:00.1: PCI INT A -> Link[LE5A] -> GSI 66 (level, low) -> IRQ 66
ACPI: PCI Interrupt Link [LE5D] enabled at IRQ 65
IOAPIC[2]: Set routing entry (10-17 -> 0xc1 -> IRQ 65 Mode:1 Active:1) pci 0000:84:00.0: PCI INT B -> Link[LE5D] -> GSI 65 (level, low) -> IRQ 65
ACPI: PCI Interrupt Link [LE5C] enabled at IRQ 64
IOAPIC[2]: Set routing entry (10-16 -> 0xc9 -> IRQ 64 Mode:1 Active:1) pci 0000:84:00.1: PCI INT A -> Link[LE5C] -> GSI 64 (level, low) -> IRQ 64 pci 0000:87:00.0: PCI INT B -> Link[LE5A] -> GSI 66 (level, low) -> IRQ 66 pci 0000:87:00.1: PCI INT A -> Link[LE5D] -> GSI 65 (level, low) -> IRQ 65 pci 0000:88:00.0: PCI INT B -> Link[LE5C] -> GSI 64 (level, low) -> IRQ 64 pci 0000:88:00.1: PCI INT A -> Link[LE5B] -> GSI 67 (level, low) -> IRQ 67 pci 0000:8b:00.0: PCI INT B -> Link[LE5A] -> GSI 66 (level, low) -> IRQ 66 pci 0000:8b:00.1: PCI INT A -> Link[LE5D] -> GSI 65 (level, low) -> IRQ 65 pci 0000:8c:00.0: PCI INT B -> Link[LE5C] -> GSI 64 (level, low) -> IRQ 64 pci 0000:8c:00.1: PCI INT A -> Link[LE5B] -> GSI 67 (level, low) -> IRQ 67
As it can be seen that GSIs now get mapped lineary.
[ Impact: simplify irq number mapping on bigger 32-bit systems ]
LKML-Reference: <[email protected]>
--- arch/x86/kernel/acpi/boot.c | 65 ++++-------------------------------------- 1 files changed, 7 insertions(+), 58 deletions(-)
arch/x86/kernel/acpi/boot.c +7 -58
@@ -1162,22 +1162,9 @@ int mp_register_gsi(struct device *dev, u32 gsi, int triggering, int polarity) {int ioapic;int ioapic_pin; -#ifdef CONFIG_X86_32 -#define MAX_GSI_NUM 4096 -#define IRQ_COMPRESSION_START 64 - -static int pci_irq =IRQ_COMPRESSION_START ; -/* -* Mapping between Global System Interrupts, which -* represent all possible interrupts, and IRQs -* assigned to actual devices. -*/ -static int gsi_to_irq[MAX_GSI_NUM ]; -#else if (acpi_irq_model !=ACPI_IRQ_MODEL_IOAPIC )return gsi; -#endif /* Don't set up the ACPI SCI because it's already set up */ if (acpi_gbl_FADT.sci_interrupt == gsi)
@@ -1196,66 +1183,28 @@ int mp_register_gsi(struct device *dev, u32 gsi, int triggering, int polarity) gsi =ioapic_renumber_irq (ioapic, gsi);#endif -/* -* Avoid pin reprogramming. PRTs typically include entries -* with redundant pin->gsi mappings (but unique PCI devices); -* we only program the IOAPIC on the first. -*/ if (ioapic_pin >MP_MAX_IOAPIC_PIN ) {printk (KERN_ERR "Invalid reference to IOAPIC pin " "%d-%d\n" , mp_ioapic_routing[ioapic].apic_id, ioapic_pin);return gsi; } + +/* +* Avoid pin reprogramming. PRTs typically include entries +* with redundant pin->gsi mappings (but unique PCI devices); +* we only program the IOAPIC on the first. +*/ if (test_bit (ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed)) {pr_debug ("Pin %d-%d already programmed\n" , mp_ioapic_routing[ioapic].apic_id, ioapic_pin); -#ifdef CONFIG_X86_32 -return (gsi <IRQ_COMPRESSION_START ? gsi : gsi_to_irq[gsi]); -#else return gsi; -#endif } -set_bit (ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed); -#ifdef CONFIG_X86_32 -/* -* For GSI >= 64, use IRQ compression -*/ -if ((gsi >=IRQ_COMPRESSION_START ) - && (triggering ==ACPI_LEVEL_SENSITIVE )) { -/* -* For PCI devices assign IRQs in order, avoiding gaps -* due to unused I/O APIC pins. -*/ -int irq = gsi; -if (gsi <MAX_GSI_NUM ) { -/* -* Retain the VIA chipset work-around (gsi > 15), but -* avoid a problem where the 8254 timer (IRQ0) is setup -* via an override (so it's not on pin 0 of the ioapic), -* and at the same time, the pin 0 interrupt is a PCI -* type. The gsi > 15 test could cause these two pins -* to be shared as IRQ0, and they are not shareable. -* So test for this condition, and if necessary, avoid -* the pin collision. -*/ - gsi = pci_irq++; -/* -* Don't assign IRQ used by ACPI SCI -*/ -if (gsi == acpi_gbl_FADT.sci_interrupt) - gsi = pci_irq++; - gsi_to_irq[irq] = gsi; - }else { -printk (KERN_ERR "GSI %u is too high\n" , gsi); -return gsi; - } - } -#endif io_apic_set_pci_routing (dev, ioapic, ioapic_pin, gsi, triggering ==ACPI_EDGE_SENSITIVE ?0 :1 , polarity ==ACPI_ACTIVE_HIGH ?0 :1 ); +return gsi; }