x86/mid: Remove Intel Moorestown

tip:x86/platform tip-bot for Alan Cox 1 participant 1 message Jan 26, 2012 x86

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2012-01-26 21:41 UTC #0 lore raw

Commit-ID:  1a8359e411eb5055405412a7da812dae63c64a55
Gitweb:     http://git.kernel.org/tip/1a8359e411eb5055405412a7da812dae63c64a55
Author:     Alan Cox <[email protected]>
AuthorDate: Thu, 26 Jan 2012 17:33:30 +0000
Committer:  Ingo Molnar <[email protected]>
CommitDate: Thu, 26 Jan 2012 21:23:53 +0100

x86/mid: Remove Intel Moorestown

All production devices operate in the Oaktrail configuration with legacy PC elements present and an ACPI BIOS. Continue stripping out the Moorestown elements from the tree leaving Medfield.

Signed-off-by Alan Cox <[email protected]>

Cc [email protected]

Link http://lkml.kernel.org/n/[email protected] open here

Signed-off-by Ingo Molnar <[email protected]>

---
 arch/x86/Kconfig                |   21 -
 arch/x86/include/asm/mrst.h     |    4 +-
 arch/x86/platform/mrst/Makefile |    1 -
 arch/x86/platform/mrst/mrst.c   |   62 ++--
 arch/x86/platform/mrst/pmu.c    |  817 ---------------------------------------
 arch/x86/platform/mrst/pmu.h    |  234 -----------
 6 files changed, 25 insertions(+), 1114 deletions(-)

arch/x86/Kconfig +0 ~~-21~~

index 864cc6e..a13addb 100644
@@ -418,27 +418,6 @@ if X86_WANT_INTEL_MID
 config X86_INTEL_MID
 	bool
 
-config X86_MRST
-       bool "Moorestown MID platform"
-	depends on PCI
-	depends on PCI_GOANY
-	depends on X86_IO_APIC
-	select X86_INTEL_MID
-	select SFI
-	select DW_APB_TIMER
-	select APB_TIMER
-	select I2C
-	select SPI
-	select INTEL_SCU_IPC
-	select X86_PLATFORM_DEVICES
-	---help---
-	  Moorestown is Intel's Low Power Intel Architecture (LPIA) based Moblin
-	  Internet Device(MID) platform. Moorestown consists of two chips:
-	  Lincroft (CPU core, graphics, and memory controller) and Langwell IOH.
-	  Unlike standard x86 PCs, Moorestown does not have many legacy devices
-	  nor standard legacy replacement devices/features. e.g. Moorestown does
-	  not contain i8259, i8254, HPET, legacy BIOS, most of the io ports.
-
 config X86_MDFLD
        bool "Medfield MID platform"
 	depends on PCI

arch/x86/include/asm/mrst.h +2 -2

index 0a0a954..fc18bf3 100644
@@ -26,8 +26,8 @@ extern struct sfi_rtc_table_entry sfi_mrtc_array[];
  * identified via MSRs.
  */
 enum mrst_cpu_type {
-	MRST_CPU_CHIP_LINCROFT = 1,
-	MRST_CPU_CHIP_PENWELL,
+	/* 1 was Moorestown */
+	MRST_CPU_CHIP_PENWELL = 2,
 };
 
 extern enum mrst_cpu_type __mrst_cpu_chip;

arch/x86/platform/mrst/Makefile +0 -1

index 7baed51..af1da7e 100644
@@ -1,4 +1,3 @@
 obj-$(CONFIG_X86_INTEL_MID)	+= mrst.o
 obj-$(CONFIG_X86_INTEL_MID)	+= vrtc.o
 obj-$(CONFIG_EARLY_PRINTK_INTEL_MID)	+= early_printk_mrst.o
-obj-$(CONFIG_X86_MRST)		+= pmu.o

arch/x86/platform/mrst/mrst.c +24 ~~-40~~

90 lines not on this page · raw message

arch/x86/platform/mrst/pmu.c deleted +0 ~~-817~~

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arch/x86/platform/mrst/pmu.h deleted +0 ~~-234~~

234 lines not on this page · raw message