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iommu: arm-smmu: set a more appropriate DMA mask

PATCH New Robin Murphy 3 participants 3 messages Mar 5, 2015 – Mar 9, 2015 IOMMU

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Robin Murphy

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PATCH 1/1 iommu: arm-smmu: set a more appropriate DMA mask

Since we use dma_map_page() as an architecture-independent means of making page table updates visible to non-coherent SMMUs, we need to have a suitable DMA mask set to discourage the DMA mapping layer from creating bounce buffers and flushing those instead, if said page tables happen to lie outside the default 32-bit mask.

Signed-off-by Robin Murphy <[email protected]>
---
 drivers/iommu/arm-smmu.c | 7 +++++++
 1 file changed, 7 insertions(+)
drivers/iommu/arm-smmu.c +7 -0
index fc13dd5..dc0ae62 100644
@@ -1630,6 +1630,13 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu)
 	size = arm_smmu_id_size_to_bits((id >> ID2_OAS_SHIFT) & ID2_OAS_MASK);
 	smmu->pa_size = size;
 
+	/*
+	 * What the page table walker can address actually depends on which
+	 * descriptor format is in use, but since a) we don't know that yet,
+	 * and b) it can vary per context bank, this will have to do...
+	 */
+	dma_set_mask_and_coherent(smmu->dev, DMA_BIT_MASK(size));
+
 	if (smmu->version == ARM_SMMU_V1) {
 		smmu->va_size = smmu->ipa_size;
 		size = SZ_4K | SZ_2M | SZ_1G;
Signature · 1 line
1.9.1
#1 lore raw

PATCH 1/1 iommu: arm-smmu: set a more appropriate DMA mask

Quoted 7 lines · Robin Murphy

Since we use dma_map_page() as an architecture-independent means of making page table updates visible to non-coherent SMMUs, we need to have a suitable DMA mask set to discourage the DMA mapping layer from creating bounce buffers and flushing those instead, if said page tables happen to lie outside the default 32-bit mask.

Signed-off-by Robin Murphy <[email protected]>
Tested-by Mitchel Humpherys <[email protected]>

Thanks Robin!

-Mitch

Signature · 3 lines
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
#2 lore raw

PATCH 1/1 iommu: arm-smmu: set a more appropriate DMA mask

In reply to Robin Murphy
Quoted 5 lines · On Thursday 05 March 2015 18:56:36 Robin Murphy wrote:
drivers/iommu/arm-smmu.c +0 -0
@@ -1630,6 +1630,13 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu)
        size = arm_smmu_id_size_to_bits((id >> ID2_OAS_SHIFT) & ID2_OAS_MASK);
        smmu->pa_size = size;

drivers/iommu/arm-smmu.c static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu) · line 1642

Quoted 10 lines
drivers/iommu/arm-smmu.c +7 -0
+       /*
+        * What the page table walker can address actually depends on which
+        * descriptor format is in use, but since a) we don't know that yet,
+        * and b) it can vary per context bank, this will have to do...
+        */
+       dma_set_mask_and_coherent(smmu->dev, DMA_BIT_MASK(size));
+
        if (smmu->version == ARM_SMMU_V1) {
                smmu->va_size = smmu->ipa_size;
                size = SZ_4K | SZ_2M | SZ_1G;

dma_set_mask_and_coherent() can fail if the parent bus cannot access all of RAM. While that would be serious misdesign for an IOMMU, you should not just ignore that failure and at least print a message once.

Why not just attempt to set a 64-bit mask?

Arnd