armv5te: make 'ret lr' produce iinterworking 'bx lr'
PATCH 1/1 armv5te: make 'ret lr' produce iinterworking 'bx lr'
Current ARM assembler helper for the 'return to caller' pseudo-instruction turns 'ret lr' into 'mov pc, lr' for ARMv5TE. This causes the core to remain in its current ARM state even when the routine doing the 'ret' was called from Thumb-1 state, triggering an undefined instruction exception.
This causes early run-time failures in all boards compiled using the Thumb-1 instruction set (for instance the Open-RD family).
ARMv5TE supports 'bx lr' which properly implements interworking and thus correctly returns to Thumb-1 state from ARM state.
This change makes 'ret lr' turn into 'bx lr' for ARMv5TE.
---
Note: this patch supersedes patch "openrd: disable private arch memset, memcpy and libgcc" dated Sun, 26 Feb 2017 16:29:32 +0100.
arch/arm/include/asm/assembler.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/include/asm/assembler.h +1 -1
@@ -59,7 +59,7 @@ .irp c,,eq,ne,cs,cc,mi,pl,vs,vc,hi,ls,ge,lt,gt,le,hs,lo .macro ret\c, reg -#if defined(__ARM_ARCH_5E__) || defined(__ARM_ARCH_5TE__) +#if defined(__ARM_ARCH_5E__) mov\c pc, \reg #else .ifeqs "\reg", "lr"
Signature · 1 line
2.11.0
PATCH 1/1 armv5te: make 'ret lr' produce iinterworking 'bx lr'
Quoted 26 lines · Albert ARIBAUD
Current ARM assembler helper for the 'return to caller' pseudo-instruction turns 'ret lr' into 'mov pc, lr' for ARMv5TE. This causes the core to remain in its current ARM state even when the routine doing the 'ret' was called from Thumb-1 state, triggering an undefined instruction exception.
This causes early run-time failures in all boards compiled using the Thumb-1 instruction set (for instance the Open-RD family).
ARMv5TE supports 'bx lr' which properly implements interworking and thus correctly returns to Thumb-1 state from ARM state.
This change makes 'ret lr' turn into 'bx lr' for ARMv5TE.
Signed-off-by Albert ARIBAUD <[email protected]>---
Note: this patch supersedes patch "openrd: disable private arch memset, memcpy and libgcc" dated Sun, 26 Feb 2017 16:29:32 +0100.arch/arm/include/asm/assembler.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)arch/arm/include/asm/assembler.h +0
-0
arch/arm/include/asm/assembler.h line 65
Quoted 8 lines
arch/arm/include/asm/assembler.h +1
-1@@ -59,7 +59,7 @@ .irp c,,eq,ne,cs,cc,mi,pl,vs,vc,hi,ls,ge,lt,gt,le,hs,lo .macro ret\c, reg -#if defined(__ARM_ARCH_5E__) || defined(__ARM_ARCH_5TE__) +#if defined(__ARM_ARCH_5E__) mov\c pc, \reg #else .ifeqs "\reg", "lr"
Emperical wins over theory, so I'll take this patch so we don't break things. But looking at the kernel, the above is a test for __LINUX_ARM_ARCH__ < 6 instead. But the kernel is hardly ever built and run in Thumb mode rather than ARM mode, so they wouldn't be tickling this particular issue. I guess my big question now is, when can / should we not just use 'bx lr' over 'mov pc, lr' ?
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PATCH 1/1 armv5te: make 'ret lr' produce iinterworking 'bx lr'
Quoted 28 lines · Tom Rini
Quoted 27 lines · Albert ARIBAUD
Current ARM assembler helper for the 'return to caller' pseudo-instruction turns 'ret lr' into 'mov pc, lr' for ARMv5TE. This causes the core to remain in its current ARM state even when the routine doing the 'ret' was called from Thumb-1 state, triggering an undefined instruction exception.
This causes early run-time failures in all boards compiled using the Thumb-1 instruction set (for instance the Open-RD family).
ARMv5TE supports 'bx lr' which properly implements interworking and thus correctly returns to Thumb-1 state from ARM state.
This change makes 'ret lr' turn into 'bx lr' for ARMv5TE.
Signed-off-by Albert ARIBAUD <[email protected]>---
Note: this patch supersedes patch "openrd: disable private arch memset, memcpy and libgcc" dated Sun, 26 Feb 2017 16:29:32 +0100.arch/arm/include/asm/assembler.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)arch/arm/include/asm/assembler.h +0
-0@@ -59,7 +59,7 @@
Quoted 13 lines
arch/arm/include/asm/assembler.h line 65
Quoted 7 lines
arch/arm/include/asm/assembler.h +1
-1.irp c,,eq,ne,cs,cc,mi,pl,vs,vc,hi,ls,ge,lt,gt,le,hs,lo .macro ret\c, reg -#if defined(__ARM_ARCH_5E__) || defined(__ARM_ARCH_5TE__) +#if defined(__ARM_ARCH_5E__) mov\c pc, \reg #else .ifeqs "\reg", "lr"Emperical wins over theory, so I'll take this patch so we don't break things. But looking at the kernel, the above is a test for
__LINUX_ARM_ARCH__< 6 instead. But the kernel is hardly ever built and run in Thumb mode rather than ARM mode, so they wouldn't be tickling this particular issue.
The kernel needs Thumb-2, so the requirements are a bit different there.
Quoted 2 lines
I guess my big question now is, when can / should we not just use 'bx lr' over 'mov pc, lr' ?
All cores with Thumb support the bx instruction. The only time you want to use "mov pc" is with non-Thumb v4 and v5 cores.
Signature · 1 line
Måns Rullgård
PATCH 1/1 armv5te: make 'ret lr' produce iinterworking 'bx lr'
Quoted 44 lines · Måns Rullgård
Quoted 28 lines · Tom Rini
Quoted 27 lines · Albert ARIBAUD
Current ARM assembler helper for the 'return to caller' pseudo-instruction turns 'ret lr' into 'mov pc, lr' for ARMv5TE. This causes the core to remain in its current ARM state even when the routine doing the 'ret' was called from Thumb-1 state, triggering an undefined instruction exception.
This causes early run-time failures in all boards compiled using the Thumb-1 instruction set (for instance the Open-RD family).
ARMv5TE supports 'bx lr' which properly implements interworking and thus correctly returns to Thumb-1 state from ARM state.
This change makes 'ret lr' turn into 'bx lr' for ARMv5TE.
Signed-off-by Albert ARIBAUD <[email protected]>---
Note: this patch supersedes patch "openrd: disable private arch memset, memcpy and libgcc" dated Sun, 26 Feb 2017 16:29:32 +0100.arch/arm/include/asm/assembler.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)arch/arm/include/asm/assembler.h +0
-0@@ -59,7 +59,7 @@Quoted 13 lines
arch/arm/include/asm/assembler.h line 65
Quoted 7 lines
arch/arm/include/asm/assembler.h +1
-1.irp c,,eq,ne,cs,cc,mi,pl,vs,vc,hi,ls,ge,lt,gt,le,hs,lo .macro ret\c, reg -#if defined(__ARM_ARCH_5E__) || defined(__ARM_ARCH_5TE__) +#if defined(__ARM_ARCH_5E__) mov\c pc, \reg #else .ifeqs "\reg", "lr"Emperical wins over theory, so I'll take this patch so we don't break things. But looking at the kernel, the above is a test for
__LINUX_ARM_ARCH__< 6 instead. But the kernel is hardly ever built and run in Thumb mode rather than ARM mode, so they wouldn't be tickling this particular issue.
Quoted 1 line
The kernel needs Thumb-2, so the requirements are a bit different there.
Ah, right.
Quoted 5 lines
Quoted 2 lines
I guess my big question now is, when can / should we not just use 'bx lr' over 'mov pc, lr' ?
All cores with Thumb support the bx instruction. The only time you want to use "mov pc" is with non-Thumb v4 and v5 cores.
So, of ARM720T, ARM920T, ARM926EJS and ARM946ES, which fall into that category? Or is it harder to say than that?
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PATCH 1/1 armv5te: make 'ret lr' produce iinterworking 'bx lr'
Quoted 49 lines · Tom Rini
Quoted 44 lines · M책ns Rullg책rd
Quoted 28 lines · Tom Rini
Quoted 27 lines · Albert ARIBAUD
Current ARM assembler helper for the 'return to caller' pseudo-instruction turns 'ret lr' into 'mov pc, lr' for ARMv5TE. This causes the core to remain in its current ARM state even when the routine doing the 'ret' was called from Thumb-1 state, triggering an undefined instruction exception.
This causes early run-time failures in all boards compiled using the Thumb-1 instruction set (for instance the Open-RD family).
ARMv5TE supports 'bx lr' which properly implements interworking and thus correctly returns to Thumb-1 state from ARM state.
This change makes 'ret lr' turn into 'bx lr' for ARMv5TE.
Signed-off-by Albert ARIBAUD <[email protected]>---
Note: this patch supersedes patch "openrd: disable private arch memset, memcpy and libgcc" dated Sun, 26 Feb 2017 16:29:32 +0100.arch/arm/include/asm/assembler.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)arch/arm/include/asm/assembler.h +0
-0@@ -59,7 +59,7 @@Quoted 13 lines
arch/arm/include/asm/assembler.h line 65
Quoted 7 lines
arch/arm/include/asm/assembler.h +1
-1.irp c,,eq,ne,cs,cc,mi,pl,vs,vc,hi,ls,ge,lt,gt,le,hs,lo .macro ret\c, reg -#if defined(__ARM_ARCH_5E__) || defined(__ARM_ARCH_5TE__) +#if defined(__ARM_ARCH_5E__) mov\c pc, \reg #else .ifeqs "\reg", "lr"Emperical wins over theory, so I'll take this patch so we don't break things. But looking at the kernel, the above is a test for
__LINUX_ARM_ARCH__< 6 instead. But the kernel is hardly ever built and run in Thumb mode rather than ARM mode, so they wouldn't be tickling this particular issue.Quoted 1 line
The kernel needs Thumb-2, so the requirements are a bit different there.
Ah, right.
Quoted 8 lines
Quoted 5 lines
Quoted 2 lines
I guess my big question now is, when can / should we not just use 'bx lr' over 'mov pc, lr' ?
All cores with Thumb support the bx instruction. The only time you want to use "mov pc" is with non-Thumb v4 and v5 cores.
So, of ARM720T, ARM920T, ARM926EJS and ARM946ES, which fall into that category? Or is it harder to say than that?
All of those support Thumb and thus the bx instruction.
The blx instruction, which simplifies interworking, is only available from v5T, but that's not relevant here.
Signature · 1 line
M책ns Rullg책rd
Quoted 8 lines · Albert ARIBAUD
Current ARM assembler helper for the 'return to caller' pseudo-instruction turns 'ret lr' into 'mov pc, lr' for ARMv5TE. This causes the core to remain in its current ARM state even when the routine doing the 'ret' was called from Thumb-1 state, triggering an undefined instruction exception.
This causes early run-time failures in all boards compiled using the Thumb-1 instruction set (for instance the Open-RD family).
Quoted 6 lines
ARMv5TE supports 'bx lr' which properly implements interworking and thus correctly returns to Thumb-1 state from ARM state.
This change makes 'ret lr' turn into 'bx lr' for ARMv5TE.
Signed-off-by Albert ARIBAUD <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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