mmc: distinguish DDR timing mode for eMMC/UHS
Get series with b4
b4 am '003201cf3f7e$933ea860$b9bbf920$%[email protected]'Versions newest first · linked by author and title
- v3 Latest posting 2/27 patches 2 repliesIn review
- v3 posting 1/27 patches 2 repliesSuperseded
- v27 patches 2 repliesSuperseded
Earlier versions · 1
| Version | Posted | Patches | Replies | Status |
|---|---|---|---|---|
| v1 | 7 patches | 15 replies | Superseded |
Changes in v3 from the cover letter
(6/7) Added MMC-DDR52 mode instead of replacing UHS-DDR50 in dw_mmc-exynos
Patches in v3 posting 2/2 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/7 | mmc: clarify DDR timing mode between SD-UHS and eMMCdrivers/ drivers/ include/ | +6 | 0 replies | |
| 2/7 | mmc: mmci: clarify DDR timing mode between SD-UHS and eMMCdrivers/ | +4 | 0 replies | |
| 3/7 | mmc: omap: clarify DDR timing mode between SD-UHS and eMMCdrivers/ | +2 | 0 replies | |
| 4/7 | mmc: sh_mmcif: clarify DDR timing mode between SD-UHS and eMMCdrivers/ | +5 | 0 replies | |
| 5/7 | mmc: rtsx: clarify DDR timing mode between SD-UHS and eMMCdrivers/ | +2 | 0 replies | |
| 6/7 | mmc: dw_mmc: clarify DDR timing mode between SD-UHS and eMMCdrivers/ drivers/ | +3 | 0 replies | |
| 7/7 | mmc: sdhci: clarify DDR timing mode between SD-UHS and eMMCdrivers/ | +3 | 0 replies |
Reviews trailers per patch
6 of 7 patches have a Reviewed-by or Acked-by.
| Patch | Ulf Hansson | Jaehoon Chung | Balaji T K |
|---|---|---|---|
| 1/7 | A-b | A-b | |
| 2/7 | A-b | ||
| 3/7 | A-b | ||
| 4/7 | |||
| 5/7 | R-b | ||
| 6/7 | R-b | A-b | |
| 7/7 | R-b |
Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes. Scroll the table sideways for all 3 reviewers.
Cover letter [PATCH RESEND v3 0/7] mmc: distinguish DDR timing mode for eMMC/UHS
These changes intend to distinguish two DDR timing modes related to eMMC & UHS. Even though two modes are different actually, UHS_DDR50 is used as eMMC DDR mode. MMC_TIMING_MMC_DDR52 mode is added.
Changes in V3:
(6/7) Added MMC-DDR52 mode instead of replacing UHS-DDR50 in dw_mmc-exynos
Changes in V2:
(2/7) Added MMC-DDR52 mode instead of replacing UHS-DDR50 in mmci
Seungwon Jeon (7):
mmc: clarify DDR timing mode between SD-UHS and eMMC
mmc: mmci: clarify DDR timing mode between SD-UHS and eMMC
mmc: omap: clarify DDR timing mode between SD-UHS and eMMC
mmc: sh_mmcif: clarify DDR timing mode between SD-UHS and eMMC
mmc: rtsx: clarify DDR timing mode between SD-UHS and eMMC
mmc: dw_mmc: clarify DDR timing mode between SD-UHS and eMMC
mmc: sdhci: clarify DDR timing mode between SD-UHS and eMMC
drivers/mmc/core/debugfs.c | 3 +++ drivers/mmc/core/mmc.c | 2 +- drivers/mmc/host/dw_mmc-exynos.c | 5 ++--- drivers/mmc/host/dw_mmc.c | 2 +- drivers/mmc/host/mmci.c | 6 ++++-- drivers/mmc/host/omap_hsmmc.c | 4 ++-- drivers/mmc/host/rtsx_pci_sdmmc.c | 2 ++ drivers/mmc/host/sdhci.c | 4 +++- drivers/mmc/host/sh_mmcif.c | 9 +++++---- include/linux/mmc/host.h | 3 ++- 10 files changed, 25 insertions(+), 15 deletions(-)>
Thanks,
sw-j