ARMv6 and ARMv7 mm fixes
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Cover letter [PATCH 0/5] ARMv6 and ARMv7 mm fixes
Hi Stephen,
Quoted 6 lines · Will Deacon
Quoted 5 lines
Hello,
There are a few issues with ASID handling and cache flushing on v6/v7 CPUs that have been identified when running Linux on the Cortex-A15.
Quoted 7 lines
Quoted 4 lines
These patches solve the problems for the classic page tables. Additional LPAE changes will be posted separately.
Tested on a Realview-PBX platform with a dual-core Cortex-A9.
Should these patches be sent to the stable tree? Or do the problems only manifest on Cortex-A15?
I was planning to CC stable for patches 1 ("ARM: cache: ensure MVA is cacheline aligned in flush_kern_dcache_area") and 4 ("ARM: mm: fix racy ASID rollover broadcast on SMP platforms") as these affect existing v6 and v7 cores. The remainder of the patches, although nice to have, only kick in on A15 as far as I'm aware (due to aggressive caching of speculative level 1 entries).
I was hoping for some acks/tested-bys before then since these changes affect a lot of platforms and the code is fairly scary.
Will