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V3 Hypervisor detection and tsc_reliable feature definition

Alok Kataria lkml 1 version In review

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  1. v1 Latest4 patches 8 repliesIn review

Patches in v1 No applies recorded yet

#Subject and filesSizeRepliesApplied
1/4Check for serial key in dmi_name_in_vendorsdrivers/firmware/dmi_scan.c+2 -12 replies
2/4Hypervisor detection and get tsc_freq from hypervisorarch/x86/include/asm/cpufeature.h arch/x86/include/asm/hypervisor.h arch/x86/include/asm/processor.h +7 more+211 -15 replies
3/4Add a synthetic TSC_RELIABLE feature bit.arch/x86/include/asm/cpufeature.h arch/x86/include/asm/vmware.h arch/x86/kernel/cpu/hypervisor.c +2 more+37 -20 replies
4/4Skip verification by the watchdog for TSC clocksource.Documentation/kernel-parameters.txt arch/x86/kernel/tsc.c+28 -120 replies

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Cover letter [PATCH 0/4] V3 Hypervisor detection and tsc_reliable feature definition

Hi,

These patches define a framework for hypervisor detection and setting of hypervisor feature bits. We define a X86_FEATURE_TSC_RELIABLE bit which is a synthetic bit. This is set when running under VMware. This feature bit is used to skip TSC checks which can fail on virtualization platform due to timing differences when running on virtual cpus.

Thanks,
Alok

Read the cover letter in its thread