Blackfin SPI Driver: ensure cache coherency before doing DMA
Bryan Wu linux-spi lkml 1 version In review
Get series with b4
Patches in v1 No applies recorded yet
Reviews trailers per patch
9 of 16 patches have a Reviewed-by or Acked-by.
| Patch | David Brownell |
| 1/16Blackfin SPI Driver: ensure cache coherency before doing DMA | |
| 2/16Blackfin SPI Driver: Fix erroneous SPI Clock divisor calculation | A-b |
| 3/16Blackfin SPI Driver: move bfin_addr_dcachable() and friends into the cacheflush header where it belongs | A-b |
| 4/16Blackfin SPI Driver: use len_in_bytes when we care about the number of bytes transferred | A-b |
| 5/16Blackfin SPI Driver: pass DMA overflow error to the higher level | A-b |
| 6/16Blackfin SPI Driver: unify duplicated code in dma read/write paths | A-b |
| 7/16Blackfin SPI Driver: drop bogus cast and touchup dma label | A-b |
| 8/16Blackfin SPI Driver: add a few more debug messages in useful places | |
| 9/16Blackfin SPI Driver: do not check for SPI errors if DMA itself did not flag any | |
| 10/16Blackfin SPI Driver: use the properl BIT_CTL_xxx defines | |
| 11/16Blackfin SPI Driver: remove duplicated MAX_SPI_SSEL and remove unnecessary array size | |
| 12/16Blackfin SPI Driver: get dma working for SPI flashes | A-b |
| 13/16Blackfin SPI Driver: add timeout while waiting for SPIF in dma irq handler | |
| 14/16Blackfin SPI Driver: tweak magic spi dma sequence to get it working on BF54x | |
| 15/16Blackfin SPI Driver: fix bug - spi controller driver does not assert/deassert CS correctly | A-b |
| 16/16Blackfin SPI Driver: fix bug - correct usage of struct spi_transfer.cs_change | A-b |
Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes.
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