DSPBRIDGE: 128 bytes alignment check
Status from this message: Pushed to dspbridge.
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Patches in v1 Applied
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/2 | DSPBRIDGE: add checking 128 byte alignment for dsp cache line sizedrivers/ drivers/ | +25 | 0 replies | |
| 2/2 | DSPBRIDGE: Distinguish between read or write buffersarch/ drivers/ drivers/ | +20 | 0 replies |
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Cover letter [PATCH 0/2] DSPBRIDGE: 128 bytes alignment check
Technical info:
https://omapzoom.org/gf/download/docmanfileversion/52/985/DSP_cache.pdf
This set of patches introduces the 128 byte alignment check, needed to avoid corruption if the dsp is meant to write to boundary portions of an unaligned chunk of memory.
The second patch uses a field composed of 2 bits to distinguish if the mapped chunk is readable/writeable, so the check can be performed on w/rw chunks of memory.
Omar Ramirez Luna (2):
DSPBRIDGE: add checking 128 byte alignment for dsp cache line size
DSPBRIDGE: Distinguish between read or write buffers
arch/arm/plat-omap/include/dspbridge/dbdefs.h | 7 ++++++- drivers/dsp/bridge/Kconfig | 14 ++++++++++++++ drivers/dsp/bridge/rmgr/proc.c | 19 +++++++++++++++++++ drivers/dsp/bridge/wmd/tiomap3430.c | 4 ++-- 4 files changed, 41 insertions(+), 3 deletions(-)