perf: introduce model specific events and AMD IBS

Robert Richter lkml 1 version Apr 13, 2010 In review

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v1 Latest Apr 13, 201012 patches 34 repliesIn review

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#	Subject and files	Size	Replies
1/12	perf, x86: move perfctr init code to x86_setup_perfctr()`arch/x86/kernel/cpu/perf_event.c`	+14 -6	1 reply
2/12	perf, x86: moving x86_setup_perfctr()`arch/x86/kernel/cpu/perf_event.c`	+59 ~~-61~~	1 reply
3/12	perf, x86: call x86_setup_perfctr() from .hw_config()`arch/x86/kernel/cpu/perf_event.c` `arch/x86/kernel/cpu/perf_event_p4.c`	+3 -8	1 reply
4/12	perf: introduce flag for model specific events`arch/powerpc/kernel/perf_event.c` `arch/sh/kernel/perf_event.c` `arch/sparc/kernel/perf_event.c` +2 more	+14 -1	0 replies
5/12	perf, x86: pass enable bit mask to __x86_pmu_enable_event()`arch/x86/kernel/cpu/perf_event.c` `arch/x86/kernel/cpu/perf_event_intel.c`	+8 -6	1 reply
6/12	perf, x86: use weight instead of cmask in for_each_event_constraint()`arch/x86/kernel/cpu/perf_event.c`	+1 -1	1 reply
7/12	perf, x86: introduce bit range for special pmu events`arch/x86/include/asm/perf_event.h` `arch/x86/kernel/cpu/perf_event.c` `arch/x86/kernel/cpu/perf_event_intel.c` +1 more	+12 ~~-11~~	0 replies
8/12	perf, x86: modify some code to allow the introduction of ibs events`arch/x86/kernel/cpu/perf_event.c`	+9 -9	0 replies
9/12	perf, x86: implement IBS feature detection`arch/x86/kernel/cpu/perf_event.c` `arch/x86/kernel/cpu/perf_event_amd.c`	+7 -0	0 replies
10/12	perf, x86: setup NMI handler for IBS`arch/x86/kernel/cpu/perf_event.c` `arch/x86/kernel/cpu/perf_event_amd.c`	+97 -0	3 replies
11/12	perf, x86: implement AMD IBS event configuration`arch/x86/include/asm/perf_event.h` `arch/x86/kernel/cpu/perf_event.c` `arch/x86/kernel/cpu/perf_event_amd.c`	+179 -6	11 replies
12/12	perf, x86: implement the ibs interrupt handler`arch/x86/include/asm/msr-index.h` `arch/x86/kernel/cpu/perf_event_amd.c`	+67 -1	11 replies

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Cover letter [PATCH 00/12] perf: introduce model specific events and AMD IBS

This patch series introduces model specific events and impments AMD IBS (Instruction Based Sampling) for perf_events.

IBS is documented here:

BIOS and Kernel Developer’s Guide (BKDG) For AMD Family 10h Processors
http://support.amd.com/us/Processor_TechDocs/31116.pdf

AMD64 Architecture Programmer’s Manual Volume 2: System Programming
http://support.amd.com/us/Processor_TechDocs/24593.pdf

The general approach is to introduce a flag to mark an event as model specific. With that flag set a model specific ibs (raw) config value can be passed to the pmu for setup. When there are ibs samples available, it is sent back as a raw data sample to the userland. So we have a raw config value and raw sampling data. This requires the userland to setup ibs and further extract and process sampling data.

Patches 1-8 rework and refactor the code to prepare the ibs implementation. This is done in patches 9-12.

I will add ibs example code to libpfm4.

-Robert

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